Home
last modified time | relevance | path

Searched full:mask (Results 1 – 25 of 21874) sorted by relevance

12345678910>>...875

/aosp_15_r20/external/trusty/arm-trusted-firmware/drivers/marvell/comphy/
Dphy-comphy-cp110.c116 uint32_t reg, mask, field; in mvebu_cp110_comphy_clr_pipe_selector() local
120 mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; in mvebu_cp110_comphy_clr_pipe_selector()
122 field = reg & mask; in mvebu_cp110_comphy_clr_pipe_selector()
125 reg &= ~mask; in mvebu_cp110_comphy_clr_pipe_selector()
135 uint32_t reg, mask, field; in mvebu_cp110_comphy_clr_phy_selector() local
139 mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; in mvebu_cp110_comphy_clr_phy_selector()
141 field = reg & mask; in mvebu_cp110_comphy_clr_phy_selector()
149 reg &= ~mask; in mvebu_cp110_comphy_clr_phy_selector()
159 uint32_t reg, mask; in mvebu_cp110_comphy_set_phy_selector() local
174 mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; in mvebu_cp110_comphy_set_phy_selector()
[all …]
/aosp_15_r20/external/arm-trusted-firmware/drivers/marvell/comphy/
H A Dphy-comphy-cp110.c116 uint32_t reg, mask, field; in mvebu_cp110_comphy_clr_pipe_selector() local
120 mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; in mvebu_cp110_comphy_clr_pipe_selector()
122 field = reg & mask; in mvebu_cp110_comphy_clr_pipe_selector()
125 reg &= ~mask; in mvebu_cp110_comphy_clr_pipe_selector()
135 uint32_t reg, mask, field; in mvebu_cp110_comphy_clr_phy_selector() local
139 mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; in mvebu_cp110_comphy_clr_phy_selector()
141 field = reg & mask; in mvebu_cp110_comphy_clr_phy_selector()
149 reg &= ~mask; in mvebu_cp110_comphy_clr_phy_selector()
159 uint32_t reg, mask; in mvebu_cp110_comphy_set_phy_selector() local
174 mask = COMMON_SELECTOR_COMPHY_MASK << comphy_offset; in mvebu_cp110_comphy_set_phy_selector()
[all …]
/aosp_15_r20/frameworks/av/services/audiopolicy/engineconfigurable/parameter-framework/examples/Settings/
H A DPolicyConfigurableDomains.xml11 <ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/fm"/>
12 …<ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/speaker_sa…
13 …<ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/earpiece"/>
14 …<ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/bluetooth_…
15 …<ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/bluetooth_…
16 …<ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/bluetooth_…
17 …<ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/telephony_…
18 <ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/ip"/>
19 <ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/bus"/>
20 … <ConfigurableElement Path="/Policy/policy/strategies/media/selected_output_devices/mask/stub"/>
[all …]
/aosp_15_r20/system/usb_info_tools/typec_connector_class_helper/src/
H A Dusb_pd_utils.rs21 pub mask: u32, field
28 let field_val: u32 = (vdo & self.mask) >> self.index; in decode_vdo()
80 VdoField { index: 0, mask: 0x0000ffff, description: "USB Vendor ID" },
81 VdoField { index: 16, mask: 0x03ff0000, description: "Reserved" },
82 VdoField { index: 26, mask: 0x04000000, description: "Modal Operation Supported" },
83 VdoField { index: 27, mask: 0x38000000, description: "Product Type" },
84 VdoField { index: 30, mask: 0x40000000, description: "USB Capable as a USB Device" },
85 VdoField { index: 31, mask: 0x80000000, description: "USB Capable as a USB Host" },
89 &[VdoField { index: 0, mask: 0xffffffff, description: "XID" }];
92 VdoField { index: 0, mask: 0x0000ffff, description: "bcdDevice" },
[all …]
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/include/llvm/IR/
H A DIntrinsicsRISCV.h78 riscv_th_vmaqa_mask, // llvm.riscv.th.vmaqa.mask
80 riscv_th_vmaqasu_mask, // llvm.riscv.th.vmaqasu.mask
82 riscv_th_vmaqau_mask, // llvm.riscv.th.vmaqau.mask
84 riscv_th_vmaqaus_mask, // llvm.riscv.th.vmaqaus.mask
87 riscv_vaadd_mask, // llvm.riscv.vaadd.mask
89 riscv_vaaddu_mask, // llvm.riscv.vaaddu.mask
92 riscv_vadd_mask, // llvm.riscv.vadd.mask
94 riscv_vand_mask, // llvm.riscv.vand.mask
96 riscv_vasub_mask, // llvm.riscv.vasub.mask
98 riscv_vasubu_mask, // llvm.riscv.vasubu.mask
[all …]
H A DIntrinsicsX86.h307 x86_avx512_mask_add_sd_round, // llvm.x86.avx512.mask.add.sd.round
308 x86_avx512_mask_add_ss_round, // llvm.x86.avx512.mask.add.ss.round
309 x86_avx512_mask_cmp_pd_128, // llvm.x86.avx512.mask.cmp.pd.128
310 x86_avx512_mask_cmp_pd_256, // llvm.x86.avx512.mask.cmp.pd.256
311 x86_avx512_mask_cmp_pd_512, // llvm.x86.avx512.mask.cmp.pd.512
312 x86_avx512_mask_cmp_ps_128, // llvm.x86.avx512.mask.cmp.ps.128
313 x86_avx512_mask_cmp_ps_256, // llvm.x86.avx512.mask.cmp.ps.256
314 x86_avx512_mask_cmp_ps_512, // llvm.x86.avx512.mask.cmp.ps.512
315 x86_avx512_mask_cmp_sd, // llvm.x86.avx512.mask.cmp.sd
316 x86_avx512_mask_cmp_ss, // llvm.x86.avx512.mask.cmp.ss
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/IR/
DIntrinsicsRISCV.h118 riscv_sf_vfnrclip_x_f_qf_mask, // llvm.riscv.sf.vfnrclip.x.f.qf.mask
120 riscv_sf_vfnrclip_xu_f_qf_mask, // llvm.riscv.sf.vfnrclip.xu.f.qf.mask
149 riscv_th_vmaqa_mask, // llvm.riscv.th.vmaqa.mask
151 riscv_th_vmaqasu_mask, // llvm.riscv.th.vmaqasu.mask
153 riscv_th_vmaqau_mask, // llvm.riscv.th.vmaqau.mask
155 riscv_th_vmaqaus_mask, // llvm.riscv.th.vmaqaus.mask
158 riscv_vaadd_mask, // llvm.riscv.vaadd.mask
160 riscv_vaaddu_mask, // llvm.riscv.vaaddu.mask
163 riscv_vadd_mask, // llvm.riscv.vadd.mask
176 riscv_vand_mask, // llvm.riscv.vand.mask
[all …]
DIntrinsicsX86.h319 x86_avx512_mask_add_sd_round, // llvm.x86.avx512.mask.add.sd.round
320 x86_avx512_mask_add_ss_round, // llvm.x86.avx512.mask.add.ss.round
321 x86_avx512_mask_cmp_pd_128, // llvm.x86.avx512.mask.cmp.pd.128
322 x86_avx512_mask_cmp_pd_256, // llvm.x86.avx512.mask.cmp.pd.256
323 x86_avx512_mask_cmp_pd_512, // llvm.x86.avx512.mask.cmp.pd.512
324 x86_avx512_mask_cmp_ps_128, // llvm.x86.avx512.mask.cmp.ps.128
325 x86_avx512_mask_cmp_ps_256, // llvm.x86.avx512.mask.cmp.ps.256
326 x86_avx512_mask_cmp_ps_512, // llvm.x86.avx512.mask.cmp.ps.512
327 x86_avx512_mask_cmp_sd, // llvm.x86.avx512.mask.cmp.sd
328 x86_avx512_mask_cmp_ss, // llvm.x86.avx512.mask.cmp.ss
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/IR/
DIntrinsicsRISCV.h118 riscv_sf_vfnrclip_x_f_qf_mask, // llvm.riscv.sf.vfnrclip.x.f.qf.mask
120 riscv_sf_vfnrclip_xu_f_qf_mask, // llvm.riscv.sf.vfnrclip.xu.f.qf.mask
149 riscv_th_vmaqa_mask, // llvm.riscv.th.vmaqa.mask
151 riscv_th_vmaqasu_mask, // llvm.riscv.th.vmaqasu.mask
153 riscv_th_vmaqau_mask, // llvm.riscv.th.vmaqau.mask
155 riscv_th_vmaqaus_mask, // llvm.riscv.th.vmaqaus.mask
158 riscv_vaadd_mask, // llvm.riscv.vaadd.mask
160 riscv_vaaddu_mask, // llvm.riscv.vaaddu.mask
163 riscv_vadd_mask, // llvm.riscv.vadd.mask
176 riscv_vand_mask, // llvm.riscv.vand.mask
[all …]
DIntrinsicsX86.h319 x86_avx512_mask_add_sd_round, // llvm.x86.avx512.mask.add.sd.round
320 x86_avx512_mask_add_ss_round, // llvm.x86.avx512.mask.add.ss.round
321 x86_avx512_mask_cmp_pd_128, // llvm.x86.avx512.mask.cmp.pd.128
322 x86_avx512_mask_cmp_pd_256, // llvm.x86.avx512.mask.cmp.pd.256
323 x86_avx512_mask_cmp_pd_512, // llvm.x86.avx512.mask.cmp.pd.512
324 x86_avx512_mask_cmp_ps_128, // llvm.x86.avx512.mask.cmp.ps.128
325 x86_avx512_mask_cmp_ps_256, // llvm.x86.avx512.mask.cmp.ps.256
326 x86_avx512_mask_cmp_ps_512, // llvm.x86.avx512.mask.cmp.ps.512
327 x86_avx512_mask_cmp_sd, // llvm.x86.avx512.mask.cmp.sd
328 x86_avx512_mask_cmp_ss, // llvm.x86.avx512.mask.cmp.ss
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/IR/
DIntrinsicsRISCV.h118 riscv_sf_vfnrclip_x_f_qf_mask, // llvm.riscv.sf.vfnrclip.x.f.qf.mask
120 riscv_sf_vfnrclip_xu_f_qf_mask, // llvm.riscv.sf.vfnrclip.xu.f.qf.mask
149 riscv_th_vmaqa_mask, // llvm.riscv.th.vmaqa.mask
151 riscv_th_vmaqasu_mask, // llvm.riscv.th.vmaqasu.mask
153 riscv_th_vmaqau_mask, // llvm.riscv.th.vmaqau.mask
155 riscv_th_vmaqaus_mask, // llvm.riscv.th.vmaqaus.mask
158 riscv_vaadd_mask, // llvm.riscv.vaadd.mask
160 riscv_vaaddu_mask, // llvm.riscv.vaaddu.mask
163 riscv_vadd_mask, // llvm.riscv.vadd.mask
176 riscv_vand_mask, // llvm.riscv.vand.mask
[all …]
DIntrinsicsX86.h319 x86_avx512_mask_add_sd_round, // llvm.x86.avx512.mask.add.sd.round
320 x86_avx512_mask_add_ss_round, // llvm.x86.avx512.mask.add.ss.round
321 x86_avx512_mask_cmp_pd_128, // llvm.x86.avx512.mask.cmp.pd.128
322 x86_avx512_mask_cmp_pd_256, // llvm.x86.avx512.mask.cmp.pd.256
323 x86_avx512_mask_cmp_pd_512, // llvm.x86.avx512.mask.cmp.pd.512
324 x86_avx512_mask_cmp_ps_128, // llvm.x86.avx512.mask.cmp.ps.128
325 x86_avx512_mask_cmp_ps_256, // llvm.x86.avx512.mask.cmp.ps.256
326 x86_avx512_mask_cmp_ps_512, // llvm.x86.avx512.mask.cmp.ps.512
327 x86_avx512_mask_cmp_sd, // llvm.x86.avx512.mask.cmp.sd
328 x86_avx512_mask_cmp_ss, // llvm.x86.avx512.mask.cmp.ss
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/IR/
DIntrinsicsRISCV.h158 riscv_sf_vfnrclip_x_f_qf_mask, // llvm.riscv.sf.vfnrclip.x.f.qf.mask
160 riscv_sf_vfnrclip_xu_f_qf_mask, // llvm.riscv.sf.vfnrclip.xu.f.qf.mask
189 riscv_th_vmaqa_mask, // llvm.riscv.th.vmaqa.mask
191 riscv_th_vmaqasu_mask, // llvm.riscv.th.vmaqasu.mask
193 riscv_th_vmaqau_mask, // llvm.riscv.th.vmaqau.mask
195 riscv_th_vmaqaus_mask, // llvm.riscv.th.vmaqaus.mask
198 riscv_vaadd_mask, // llvm.riscv.vaadd.mask
200 riscv_vaaddu_mask, // llvm.riscv.vaaddu.mask
203 riscv_vadd_mask, // llvm.riscv.vadd.mask
216 riscv_vand_mask, // llvm.riscv.vand.mask
[all …]
DIntrinsicsX86.h319 x86_avx512_mask_add_sd_round, // llvm.x86.avx512.mask.add.sd.round
320 x86_avx512_mask_add_ss_round, // llvm.x86.avx512.mask.add.ss.round
321 x86_avx512_mask_cmp_pd_128, // llvm.x86.avx512.mask.cmp.pd.128
322 x86_avx512_mask_cmp_pd_256, // llvm.x86.avx512.mask.cmp.pd.256
323 x86_avx512_mask_cmp_pd_512, // llvm.x86.avx512.mask.cmp.pd.512
324 x86_avx512_mask_cmp_ps_128, // llvm.x86.avx512.mask.cmp.ps.128
325 x86_avx512_mask_cmp_ps_256, // llvm.x86.avx512.mask.cmp.ps.256
326 x86_avx512_mask_cmp_ps_512, // llvm.x86.avx512.mask.cmp.ps.512
327 x86_avx512_mask_cmp_sd, // llvm.x86.avx512.mask.cmp.sd
328 x86_avx512_mask_cmp_ss, // llvm.x86.avx512.mask.cmp.ss
[all …]
/aosp_15_r20/external/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_ir_common.c42 func_ctx(struct lp_exec_mask *mask) in func_ctx() argument
44 assert(mask->function_stack_size > 0); in func_ctx()
45 assert(mask->function_stack_size <= LP_MAX_NUM_FUNCS); in func_ctx()
46 return &mask->function_stack[mask->function_stack_size - 1]; in func_ctx()
56 mask_has_loop(struct lp_exec_mask *mask) in mask_has_loop() argument
59 for (i = mask->function_stack_size - 1; i >= 0; --i) { in mask_has_loop()
60 const struct function_ctx *ctx = &mask->function_stack[i]; in mask_has_loop()
74 mask_has_switch(struct lp_exec_mask *mask) in mask_has_switch() argument
77 for (i = mask->function_stack_size - 1; i >= 0; --i) { in mask_has_switch()
78 const struct function_ctx *ctx = &mask->function_stack[i]; in mask_has_switch()
[all …]
/aosp_15_r20/out/soong/.intermediates/external/clang/clang-gen-arm-neon/gen/clang/Basic/
Darm_neon.inc666 case NEON::BI__builtin_neon_vabd_v: mask = 0x70607ULL; break;
667 case NEON::BI__builtin_neon_vabdq_v: mask = 0x7060700000000ULL; break;
668 case NEON::BI__builtin_neon_vabs_v: mask = 0x60FULL; break;
669 case NEON::BI__builtin_neon_vabsq_v: mask = 0x60F00000000ULL; break;
670 case NEON::BI__builtin_neon_vaddhn_v: mask = 0x70007ULL; break;
671 case NEON::BI__builtin_neon_vaesdq_v: mask = 0x1000000000000ULL; break;
672 case NEON::BI__builtin_neon_vaeseq_v: mask = 0x1000000000000ULL; break;
673 case NEON::BI__builtin_neon_vaesimcq_v: mask = 0x1000000000000ULL; break;
674 case NEON::BI__builtin_neon_vaesmcq_v: mask = 0x1000000000000ULL; break;
675 case NEON::BI__builtin_neon_vbsl_v: mask = 0xF067FULL; break;
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/clang/Basic/
Darm_neon.inc1007 case NEON::BI__builtin_neon___a32_vcvt_bf16_f32: mask = 0x800ULL; break;
1008 case NEON::BI__builtin_neon___a64_vcvtq_low_bf16_f32: mask = 0x80000000000ULL; break;
1009 case NEON::BI__builtin_neon_splat_lane_bf16: mask = 0x800ULL; break;
1010 case NEON::BI__builtin_neon_splat_lane_v: mask = 0xf077fULL; break;
1011 case NEON::BI__builtin_neon_splat_laneq_bf16: mask = 0x80000000000ULL; break;
1012 case NEON::BI__builtin_neon_splat_laneq_v: mask = 0xf077f00000000ULL; break;
1013 case NEON::BI__builtin_neon_splatq_lane_bf16: mask = 0x800ULL; break;
1014 case NEON::BI__builtin_neon_splatq_lane_v: mask = 0xf077fULL; break;
1015 case NEON::BI__builtin_neon_splatq_laneq_bf16: mask = 0x80000000000ULL; break;
1016 case NEON::BI__builtin_neon_splatq_laneq_v: mask = 0xf077f00000000ULL; break;
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/clang/Basic/
Darm_neon.inc1007 case NEON::BI__builtin_neon___a32_vcvt_bf16_f32: mask = 0x800ULL; break;
1008 case NEON::BI__builtin_neon___a64_vcvtq_low_bf16_f32: mask = 0x80000000000ULL; break;
1009 case NEON::BI__builtin_neon_splat_lane_bf16: mask = 0x800ULL; break;
1010 case NEON::BI__builtin_neon_splat_lane_v: mask = 0xf077fULL; break;
1011 case NEON::BI__builtin_neon_splat_laneq_bf16: mask = 0x80000000000ULL; break;
1012 case NEON::BI__builtin_neon_splat_laneq_v: mask = 0xf077f00000000ULL; break;
1013 case NEON::BI__builtin_neon_splatq_lane_bf16: mask = 0x800ULL; break;
1014 case NEON::BI__builtin_neon_splatq_lane_v: mask = 0xf077fULL; break;
1015 case NEON::BI__builtin_neon_splatq_laneq_bf16: mask = 0x80000000000ULL; break;
1016 case NEON::BI__builtin_neon_splatq_laneq_v: mask = 0xf077f00000000ULL; break;
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/clang/Basic/
Darm_neon.inc1007 case NEON::BI__builtin_neon___a32_vcvt_bf16_f32: mask = 0x800ULL; break;
1008 case NEON::BI__builtin_neon___a64_vcvtq_low_bf16_f32: mask = 0x80000000000ULL; break;
1009 case NEON::BI__builtin_neon_splat_lane_bf16: mask = 0x800ULL; break;
1010 case NEON::BI__builtin_neon_splat_lane_v: mask = 0xf077fULL; break;
1011 case NEON::BI__builtin_neon_splat_laneq_bf16: mask = 0x80000000000ULL; break;
1012 case NEON::BI__builtin_neon_splat_laneq_v: mask = 0xf077f00000000ULL; break;
1013 case NEON::BI__builtin_neon_splatq_lane_bf16: mask = 0x800ULL; break;
1014 case NEON::BI__builtin_neon_splatq_lane_v: mask = 0xf077fULL; break;
1015 case NEON::BI__builtin_neon_splatq_laneq_bf16: mask = 0x80000000000ULL; break;
1016 case NEON::BI__builtin_neon_splatq_laneq_v: mask = 0xf077f00000000ULL; break;
[all …]
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/clang/Basic/
Darm_neon.inc997 case NEON::BI__builtin_neon___a32_vcvt_bf16_f32: mask = 0x800ULL; break;
998 case NEON::BI__builtin_neon___a64_vcvtq_low_bf16_f32: mask = 0x80000000000ULL; break;
999 case NEON::BI__builtin_neon_splat_lane_bf16: mask = 0x800ULL; break;
1000 case NEON::BI__builtin_neon_splat_lane_v: mask = 0xf077fULL; break;
1001 case NEON::BI__builtin_neon_splat_laneq_bf16: mask = 0x80000000000ULL; break;
1002 case NEON::BI__builtin_neon_splat_laneq_v: mask = 0xf077f00000000ULL; break;
1003 case NEON::BI__builtin_neon_splatq_lane_bf16: mask = 0x800ULL; break;
1004 case NEON::BI__builtin_neon_splatq_lane_v: mask = 0xf077fULL; break;
1005 case NEON::BI__builtin_neon_splatq_laneq_bf16: mask = 0x80000000000ULL; break;
1006 case NEON::BI__builtin_neon_splatq_laneq_v: mask = 0xf077f00000000ULL; break;
[all …]
/aosp_15_r20/external/pytorch/torch/masked/
H A D_docs.py11 amax_docstring = """amax(input, dim, *, keepdim=False, dtype=None, mask=None) -> Tensor
16 :attr:`mask`.
28 The boolean tensor :attr:`mask` defines the "validity" of
29 :attr:`input` tensor elements: if :attr:`mask` element is True
41 The mask of the output tensor can be computed as
42 ``torch.any(torch.broadcast_to(mask, input.shape), dim, keepdim=keepdim,
45 The shapes of the :attr:`mask` tensor and the :attr:`input` tensor
47 <broadcasting-semantics>` and the dimensionality of the :attr:`mask`
62 mask (:class:`torch.Tensor`, optional): the boolean tensor
63 containing the binary mask of validity of input tensor
[all …]
/aosp_15_r20/external/cronet/third_party/protobuf/src/google/protobuf/util/
H A Dfield_mask_util_test.cc125 FieldMask mask; in TEST() local
126 EXPECT_EQ("", FieldMaskUtil::ToString(mask)); in TEST()
127 mask.add_paths("foo_bar"); in TEST()
128 EXPECT_EQ("foo_bar", FieldMaskUtil::ToString(mask)); in TEST()
129 mask.add_paths("baz_quz"); in TEST()
130 EXPECT_EQ("foo_bar,baz_quz", FieldMaskUtil::ToString(mask)); in TEST()
132 FieldMaskUtil::FromString("", &mask); in TEST()
133 EXPECT_EQ(0, mask.paths_size()); in TEST()
134 FieldMaskUtil::FromString("fooBar", &mask); in TEST()
135 EXPECT_EQ(1, mask.paths_size()); in TEST()
[all …]
/aosp_15_r20/external/protobuf/src/google/protobuf/util/
H A Dfield_mask_util_test.cc125 FieldMask mask; in TEST() local
126 EXPECT_EQ("", FieldMaskUtil::ToString(mask)); in TEST()
127 mask.add_paths("foo_bar"); in TEST()
128 EXPECT_EQ("foo_bar", FieldMaskUtil::ToString(mask)); in TEST()
129 mask.add_paths("baz_quz"); in TEST()
130 EXPECT_EQ("foo_bar,baz_quz", FieldMaskUtil::ToString(mask)); in TEST()
132 FieldMaskUtil::FromString("", &mask); in TEST()
133 EXPECT_EQ(0, mask.paths_size()); in TEST()
134 FieldMaskUtil::FromString("fooBar", &mask); in TEST()
135 EXPECT_EQ(1, mask.paths_size()); in TEST()
[all …]
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
H A DIntrinsicsX86.h276 x86_avx512_mask_add_sd_round, // llvm.x86.avx512.mask.add.sd.round
277 x86_avx512_mask_add_ss_round, // llvm.x86.avx512.mask.add.ss.round
278 x86_avx512_mask_cmp_sd, // llvm.x86.avx512.mask.cmp.sd
279 x86_avx512_mask_cmp_ss, // llvm.x86.avx512.mask.cmp.ss
280 x86_avx512_mask_compress, // llvm.x86.avx512.mask.compress
281 x86_avx512_mask_cvtpd2dq_128, // llvm.x86.avx512.mask.cvtpd2dq.128
282 x86_avx512_mask_cvtpd2dq_512, // llvm.x86.avx512.mask.cvtpd2dq.512
283 x86_avx512_mask_cvtpd2ps, // llvm.x86.avx512.mask.cvtpd2ps
284 x86_avx512_mask_cvtpd2ps_512, // llvm.x86.avx512.mask.cvtpd2ps.512
285 x86_avx512_mask_cvtpd2qq_128, // llvm.x86.avx512.mask.cvtpd2qq.128
[all …]
/aosp_15_r20/external/capstone/arch/X86/
H A DX86MappingInsnOp.inc2444 { /* X86_EXTRQ, X86_INS_EXTRQ: extrq $src, $mask */
3096 { /* X86_INSERTQ, X86_INS_INSERTQ: insertq $src, $mask */
4676 { /* X86_MASKMOVDQU, X86_INS_MASKMOVDQU: maskmovdqu $src, $mask */
4680 { /* X86_MASKMOVDQU64, X86_INS_MASKMOVDQU: maskmovdqu $src, $mask */
4900 { /* X86_MMX_MASKMOVQ, X86_INS_MASKMOVQ: maskmovq $src, $mask */
4904 { /* X86_MMX_MASKMOVQ64, X86_INS_MASKMOVQ: maskmovq $src, $mask */
10684 { /* X86_VADDPDZ128rmbk, X86_INS_VADDPD: vaddpd {${src2}{1to2}, $src1, $dst {${mask}}|$dst {${mask}…
10688 …Z128rmbkz, X86_INS_VADDPD: vaddpd {${src2}{1to2}, $src1, $dst {${mask}} {z}|$dst {${mask}} {z}, $s…
10692 { /* X86_VADDPDZ128rmk, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1,…
10696 { /* X86_VADDPDZ128rmkz, X86_INS_VADDPD: vaddpd {$src2, $src1, $dst {${mask}} {z}|$dst {${mask}} {z…
[all …]

12345678910>>...875