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/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Dmediatek,smi-larb.yaml5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
20 - mediatek,mt2701-smi-larb
21 - mediatek,mt2712-smi-larb
22 - mediatek,mt6779-smi-larb
23 - mediatek,mt6795-smi-larb
24 - mediatek,mt8167-smi-larb
25 - mediatek,mt8173-smi-larb
26 - mediatek,mt8183-smi-larb
27 - mediatek,mt8186-smi-larb
28 - mediatek,mt8188-smi-larb
[all …]
/linux-6.14.4/drivers/memory/
Dmtk-smi.c20 #include <dt-bindings/memory/mt2701-larb-port.h>
39 /* SMI LARB */
152 struct mtk_smi_larb { /* larb: local arbiter */
165 struct mtk_smi_larb *larb = dev_get_drvdata(dev); in mtk_smi_larb_bind() local
171 larb->larbid = i; in mtk_smi_larb_bind()
172 larb->mmu = &larb_mmu[i].mmu; in mtk_smi_larb_bind()
173 larb->bank = larb_mmu[i].bank; in mtk_smi_larb_bind()
193 struct mtk_smi_larb *larb = dev_get_drvdata(dev); in mtk_smi_larb_config_port_gen1() local
194 const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; in mtk_smi_larb_config_port_gen1()
195 struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev); in mtk_smi_larb_config_port_gen1()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/iommu/
Dmediatek,iommu.yaml42 SMI larb0 SMI larb1 ... SoCs have several SMI local arbiter(larb).
48 | | |... | | | ... There are different ports in each larb.
59 Normally we specify a local arbiter(larb) for each multimedia HW
61 in each larb. Take a example, There are many ports like MC, PP, VLD in the
65 smi-common and m4u, and additional GALS module between smi-larb and
121 Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
130 dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,
131 dt-binding/memory/mt2712-larb-port.h for mt2712,
132 dt-binding/memory/mt6779-larb-port.h for mt6779,
133 dt-binding/memory/mt6795-larb-port.h for mt6795,
[all …]
/linux-6.14.4/include/dt-bindings/memory/
Dmediatek,mt8188-memory-port.h14 * the index of larb is not in order. So we reindexed these larbs from a
48 * a) Make sure all the ports inside a larb are in one range.
69 /* LARB 0 -- VDO-0 */
78 /* LARB 1 -- VD0-0 */
87 /* LARB 2 -- VDO-1 */
94 /* LARB 3 -- VDO-1 */
103 /* LARB 4 -- VPP-0 */
112 /* LARB 5 -- VPP-1 */
122 /* LARB 6 -- VPP-1 */
128 /* LARB 7 -- WPE */
[all …]
Dmt8186-memory-port.h17 * a) Make sure all the ports inside a larb are in one range.
32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
45 /* LARB 2 -- MMSYS */
52 /* LARB 4 -- VDEC */
68 /* LARB 7 -- VENC */
83 /* LARB 8 -- WPE */
88 /* LARB 9 -- IMG-1 */
119 /* LARB 11 -- IMG-2 */
150 /* LARB 13 -- CAM */
[all …]
Dmt2701-larb-port.h12 * the first port's id for larb[N] would be the last port's id of larb[N - 1]
13 * plus one while larb[0]'s first port number is 0. The definition of
16 * offset for each larb, the first port's id for larb[N] would be (N * 32).
Dmtk-memory-port.h11 #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) argument
/linux-6.14.4/arch/arm/boot/dts/mediatek/
Dmt7623n.dtsi10 #include <dt-bindings/memory/mt2701-larb-port.h>
59 larb0: larb@14010000 {
60 compatible = "mediatek,mt7623-smi-larb",
61 "mediatek,mt2701-smi-larb";
64 mediatek,larb-id = <0>;
71 larb1: larb@16010000 {
72 compatible = "mediatek,mt7623-smi-larb",
73 "mediatek,mt2701-smi-larb";
76 mediatek,larb-id = <1>;
83 larb2: larb@15001000 {
[all …]
Dmt2701.dtsi13 #include <dt-bindings/memory/mt2701-larb-port.h>
529 larb0: larb@14010000 {
530 compatible = "mediatek,mt2701-smi-larb";
533 mediatek,larb-id = <0>;
546 larb2: larb@15001000 {
547 compatible = "mediatek,mt2701-smi-larb";
550 mediatek,larb-id = <2>;
588 larb1: larb@16010000 {
589 compatible = "mediatek,mt2701-smi-larb";
592 mediatek,larb-id = <1>;
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt8167.dtsi9 #include <dt-bindings/memory/mt8167-larb-port.h>
142 larb0: larb@14016000 {
143 compatible = "mediatek,mt8167-smi-larb";
152 larb1: larb@15001000 {
153 compatible = "mediatek,mt8167-smi-larb";
162 larb2: larb@16010000 {
163 compatible = "mediatek,mt8167-smi-larb";
Dmt8195.dtsi631 clock-names = "venc1-larb";
695 clock-names = "venc0-larb";
2183 larb4: larb@14013000 {
2184 compatible = "mediatek,mt8195-smi-larb";
2186 mediatek,larb-id = <4>;
2226 larb7: larb@14e04000 {
2227 compatible = "mediatek,mt8195-smi-larb";
2229 mediatek,larb-id = <7>;
2237 larb8: larb@14e05000 {
2238 compatible = "mediatek,mt8195-smi-larb";
[all …]
Dmt2712e.dtsi11 #include <dt-bindings/memory/mt2712-larb-port.h>
1000 larb0: larb@14021000 {
1001 compatible = "mediatek,mt2712-smi-larb";
1004 mediatek,larb-id = <0>;
1020 larb4: larb@14027000 {
1021 compatible = "mediatek,mt2712-smi-larb";
1024 mediatek,larb-id = <4>;
1031 larb5: larb@14030000 {
1032 compatible = "mediatek,mt2712-smi-larb";
1035 mediatek,larb-id = <5>;
[all …]
Dmt8192.dtsi12 #include <dt-bindings/memory/mt8192-larb-port.h>
1484 larb0: larb@14003000 {
1485 compatible = "mediatek,mt8192-smi-larb";
1487 mediatek,larb-id = <0>;
1494 larb1: larb@14004000 {
1495 compatible = "mediatek,mt8192-smi-larb";
1497 mediatek,larb-id = <1>;
1670 larb9: larb@1502e000 {
1671 compatible = "mediatek,mt8192-smi-larb";
1673 mediatek,larb-id = <9>;
[all …]
Dmt8365.dtsi748 larb0: larb@14003000 {
749 compatible = "mediatek,mt8365-smi-larb",
750 "mediatek,mt8186-smi-larb";
757 mediatek,larb-id = <0>;
766 larb2: larb@15001000 {
767 compatible = "mediatek,mt8365-smi-larb",
768 "mediatek,mt8186-smi-larb";
775 mediatek,larb-id = <2>;
784 larb3: larb@16010000 {
785 compatible = "mediatek,mt8365-smi-larb",
[all …]
Dmt8186.dtsi1009 clock-names = "vdec0", "larb";
1079 clock-names = "venc0", "subsys-larb";
1090 "subsys-larb-ck",
1091 "subsys-larb-pclk";
1801 compatible = "mediatek,mt8186-smi-larb";
1806 mediatek,larb-id = <0>;
1812 compatible = "mediatek,mt8186-smi-larb";
1817 mediatek,larb-id = <1>;
1975 compatible = "mediatek,mt8186-smi-larb";
1980 mediatek,larb-id = <8>;
[all …]
Dmt6795.dtsi13 #include <dt-bindings/memory/mt6795-larb-port.h>
937 larb0: larb@14021000 {
938 compatible = "mediatek,mt6795-smi-larb";
943 mediatek,larb-id = <0>;
962 larb2: larb@15001000 {
963 compatible = "mediatek,mt6795-smi-larb";
968 mediatek,larb-id = <2>;
978 larb1: larb@16010000 {
979 compatible = "mediatek,mt6795-smi-larb";
982 mediatek,larb-id = <1>;
[all …]
Dmt8173.dtsi10 #include <dt-bindings/memory/mt8173-larb-port.h>
1288 larb0: larb@14021000 {
1289 compatible = "mediatek,mt8173-smi-larb";
1346 larb4: larb@14027000 {
1347 compatible = "mediatek,mt8173-smi-larb";
1362 larb2: larb@15001000 {
1363 compatible = "mediatek,mt8173-smi-larb";
1432 larb1: larb@16010000 {
1433 compatible = "mediatek,mt8173-smi-larb";
1448 larb3: larb@18001000 {
[all …]
Dmt8188.dtsi1095 "ss-larb", "ss-rsi", "ss-bus";
1227 clock-names = "ss-ve1-larb", "ss-ve1-core",
2184 compatible = "mediatek,mt8188-smi-larb";
2190 mediatek,larb-id = <SMI_L4_ID>;
2218 compatible = "mediatek,mt8188-smi-larb";
2224 mediatek,larb-id = <SMI_L7_ID>;
2235 compatible = "mediatek,mt8188-smi-larb";
2241 mediatek,larb-id = <SMI_L5_ID>;
2246 compatible = "mediatek,mt8188-smi-larb";
2252 mediatek,larb-id = <SMI_L6_ID>;
[all …]
Dmt8183.dtsi12 #include <dt-bindings/memory/mt8183-larb-port.h>
1867 larb0: larb@14017000 {
1868 compatible = "mediatek,mt8183-smi-larb";
1903 larb5: larb@15021000 {
1904 compatible = "mediatek,mt8183-smi-larb";
1913 larb2: larb@1502f000 {
1914 compatible = "mediatek,mt8183-smi-larb";
1959 larb1: larb@16010000 {
1960 compatible = "mediatek,mt8183-smi-larb";
1974 larb4: larb@17010000 {
[all …]
/linux-6.14.4/drivers/iommu/
Dmtk_iommu_v1.c32 #include <dt-bindings/memory/mt2701-larb-port.h>
157 int larb = mt2701_m4u_to_larb(id); in mt2701_m4u_to_port() local
159 return id - mt2701_m4u_in_larb[larb]; in mt2701_m4u_to_port()
219 "fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d\n", in mtk_iommu_v1_isr()
481 /* Link the consumer device with the smi-larb device(supplier) */ in mtk_iommu_v1_probe_device()
489 dev_err(dev, "Can only use one larb. Fail@larb%d-%d.\n", in mtk_iommu_v1_probe_device()
Dmtk_iommu.c222 * The index is the same as iova_region and larb port numbers are
224 * For example, storing BIT(0) at index 2,1 means "larb 1, port0 is in region 2".
512 "fault type=0x%x iova=0x%llx pa=0x%llx master=0x%x(larb=%d port=%d) layer=%d %s\n", in mtk_iommu_isr()
575 dev_err(dev, "Can NOT find the region for larb(%d-%x).\n", in mtk_iommu_get_iova_region_id()
597 /* All ports should be in the same larb. just use 0 here */ in mtk_iommu_config()
605 dev_dbg(dev, "%s iommu for larb(%s) port 0x%lx region %d rgn-bank %d.\n", in mtk_iommu_config()
876 * Link the consumer device with the smi-larb device(supplier). in mtk_iommu_probe_device()
877 * The device that connects with each a larb is a independent HW. in mtk_iommu_probe_device()
887 dev_err(dev, "Can only use one larb. Fail@larb%d-%d.\n", in mtk_iommu_probe_device()
1157 ret = of_property_read_u32(larbnode, "mediatek,larb-id", &id); in mtk_iommu_mm_dts_parse()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/media/
Dmediatek,vcodec-subdev-decoder.yaml47 Lat soc is a hardware which is related with some larb(local arbiter) ports. For mt8195
48 platform, there are some ports like RDMA, UFO in lat soc larb, need to enable its power and
200 #include <dt-bindings/memory/mt8192-larb-port.h>
Dmediatek-jpeg-encoder.yaml63 #include <dt-bindings/memory/mt2701-larb-port.h>
Dmediatek-jpeg-decoder.yaml68 #include <dt-bindings/memory/mt2701-larb-port.h>
/linux-6.14.4/Documentation/devicetree/bindings/soc/mediatek/
Dmediatek,wdma.yaml70 #include <dt-bindings/memory/mt8183-larb-port.h>

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