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/linux-6.14.4/sound/soc/tegra/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
10 Say Y or M here if you want support for SoC audio on Tegra.
83 Config to enable the Inter-IC Sound (I2S) Controller which
84 implements full-duplex and bidirectional and single direction
85 point-to-point serial interfaces. It can interface with I2S
114 converts the multi-bit Pulse Code Modulation (PCM) audio input to
115 oversampled 1-bit Pulse Density Modulation (PDM) output. From the
117 that up-samples the input to the desired sampling rate by
119 the desired 1-bit output via Delta Sigma Modulation (DSM).
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/soc/tegra/
Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <[email protected]>
11 - Jonathan Hunter <[email protected]>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
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Dnvidia,nvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,nvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
26 - description: divider clock
27 - description: fast clock
29 clock-names:
32 - const: div-clk
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/linux-6.14.4/drivers/staging/nvec/
DREADME4 embedded controller (EC) via I2C bus. The EC is an I2C master while the host
5 processor is the I2C slave. Requests from the host processor to the EC are
11 that other Tegra boards (not yet mainlined, if ever) also use it.
13 [1] e.g. https://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=tree;f=arch/arm/mach-tegra/nvec;hb=a…
/linux-6.14.4/drivers/i2c/busses/
Di2c-tegra-bpmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/i2c/busses/i2c-tegra-bpmp.c
11 #include <linux/i2c.h>
19 #include <soc/tegra/bpmp-abi.h>
20 #include <soc/tegra/bpmp.h>
23 * Serialized I2C message header size is 6 bytes and includes address, flags
37 * Linux flags are translated to BPMP defined I2C flags that are used in BPMP
38 * firmware I2C driver to avoid any issues in future if Linux I2C flags are
69 * The serialized I2C format is simply the following:
70 * [addr little-endian][flags little-endian][len little-endian][data if write]
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the i2c bus drivers.
7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
9 # Auxiliary I2C/SMBus modules
10 obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o
13 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
14 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
15 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
16 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
17 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
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/linux-6.14.4/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra DisplayPort AUX Interface
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
14 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two
15 pins which can be assigned to either the DPAUX channel or to an I2C
24 pattern: "^dpaux@[0-9a-f]+$"
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Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra HDMI Output Encoder
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
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Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra SOR Output Encoder
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
[all …]
Dnvidia,tegra20-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Display Serial Interface
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
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Dnvidia,tegra20-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Display Controller
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
15 pattern: "^dc@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-dc
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/linux-6.14.4/drivers/soc/tegra/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
21 Support for NVIDIA Tegra AP20 and T20 processors, based on the
35 Support for NVIDIA Tegra T30 processor family, based on the
47 Support for NVIDIA Tegra T114 processor family, based on the
58 Support for NVIDIA Tegra T124 processor family, based on the
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
84 Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
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/linux-6.14.4/sound/pci/hda/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "HD-Audio"
23 This option enables the HD-audio controller. Don't forget
27 will be called snd-hda-intel.
30 tristate "NVIDIA Tegra HD Audio"
36 Tegra SoCs
39 present in some NVIDIA Tegra SoCs, used to communicate audio
43 will be called snd-hda-tegra.
48 bool "Build hwdep interface for HD-audio driver"
51 Say Y here to build a hwdep interface for HD-audio driver.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 snd-hda-intel-y := hda_intel.o
3 snd-hda-tegra-y := hda_tegra.o
5 snd-hda-codec-y := hda_bind.o hda_codec.o hda_jack.o hda_auto_parser.o hda_sysfs.o
6 snd-hda-codec-y += hda_controller.o
7 snd-hda-codec-$(CONFIG_SND_PROC_FS) += hda_proc.o
9 snd-hda-codec-$(CONFIG_SND_HDA_HWDEP) += hda_hwdep.o
10 snd-hda-codec-$(CONFIG_SND_HDA_INPUT_BEEP) += hda_beep.o
12 # for trace-points
13 CFLAGS_hda_controller.o := -I$(src)
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/linux-6.14.4/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <[email protected]>
9 - Jon Hunter <[email protected]>
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
[all …]
/linux-6.14.4/drivers/gpu/drm/nouveau/include/nvif/
Dos.h1 /* SPDX-License-Identifier: MIT */
14 #include <linux/i2c.h>
15 #include <linux/i2c-algo-bit.h>
17 #include <linux/io-mapping.h>
35 #include <soc/tegra/fuse.h>
36 #include <soc/tegra/pmc.h>
/linux-6.14.4/arch/arm/boot/dts/nvidia/
Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-opp-microvolt.dtsi"
15 rtc0 = "/i2c@7000d000/tps6586x@34";
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
[all …]
Dtegra30-asus-nexus7-grouper-ti-pmic.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/gpio/gpio.h>
7 i2c@7000d000 {
13 #interrupt-cells = <2>;
14 interrupt-controller;
15 wakeup-source;
17 ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
18 ti,system-power-controller;
19 ti,sleep-keep-ck32k;
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Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
17 * tegra30-cardhu-a04.dts.
20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
22 * The (downstream internal) U-Boot of Cardhu display the board-id as
26 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
[all …]
Dtegra30-asus-nexus7-grouper-maxim-pmic.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/mfd/max77620.h>
8 i2c@7000d000 {
14 #interrupt-cells = <2>;
15 interrupt-controller;
17 #gpio-cells = <2>;
18 gpio-controller;
20 system-power-controller;
[all …]
Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
18 rtc0 = "/i2c@7000d000/tps6586x@34";
25 stdout-path = "serial0:115200n8";
44 vdd-supply = <&hdmi_vdd_reg>;
45 pll-supply = <&hdmi_pll_reg>;
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
14 The BPMP is a specific processor in Tegra chip, which is designed for
25 - .../mailbox/mailbox.txt
26 - .../mailbox/nvidia,tegra186-hsp.yaml
[all …]
/linux-6.14.4/drivers/clk/tegra/
Dclk-tegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
13 #include <linux/clk/tegra.h>
15 #include <dt-bindings/clock/tegra20-car.h>
18 #include "clk-id.h"
113 /* Tegra CPU clock and reset control regs */
444 { .dev_id = "tegra20-ac97", .dt_id = TEGRA20_CLK_AC97 },
445 { .dev_id = "tegra-apbdma", .dt_id = TEGRA20_CLK_APBDMA },
446 { .dev_id = "rtc-tegra", .dt_id = TEGRA20_CLK_RTC },
448 { .dev_id = "tegra-kbc", .dt_id = TEGRA20_CLK_KBC },
[all …]
Dclk-tegra30.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
14 #include <linux/clk/tegra.h>
16 #include <soc/tegra/pmc.h>
18 #include <dt-bindings/clock/tegra30-car.h>
21 #include "clk-id.h"
112 /* Tegra CPU clock and reset control regs */
595 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_VCP },
596 { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_BSEA },
597 { .con_id = "bsev", .dev_id = "tegra-aes", .dt_id = TEGRA30_CLK_BSEV },
[all …]
/linux-6.14.4/Documentation/devicetree/
Dusage-model.rst1 .. SPDX-License-Identifier: GPL-2.0
39 incompatible, bindings for i2c busses that came about because the new
40 binding was created without first investigating how i2c devices were
44 ----------
56 In 2005, when PowerPC Linux began a major cleanup and to merge 32-bit
57 and 64-bit support, the decision was made to require DT support on all
61 blob without requiring a real Open Firmware implementation. U-Boot,
66 existing non-DT aware firmware.
74 -------------
79 -------------------
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