Lines Matching +full:i2c +full:- +full:tegra

1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
21 	  Support for NVIDIA Tegra AP20 and T20 processors, based on the
35 	  Support for NVIDIA Tegra T30 processor family, based on the
47 	  Support for NVIDIA Tegra T114 processor family, based on the
58 	  Support for NVIDIA Tegra T124 processor family, based on the
63 # 64-bit ARM SoCs
75 	  Tegra124's "4+1" Cortex-A15 CPU complex.
84 	  Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1,
85 	  the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
88 	  and providing 256 CUDA cores. It supports hardware-accelerated en-
93 	  controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to
106 	  combination of Denver and Cortex-A57 CPU cores and a GPU based on
107 	  the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU
109 	  multi-format support, ISP for image capture processing and BPMP for
171 	tristate "Tegra driver to handle error from CBB"
175 	  Support for handling error from Tegra Control Backbone(CBB).