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/linux-6.14.4/arch/parisc/kernel/
Dsignal32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Signal support for 32-bit kernel builds
4 * Copyright (C) 2001 Matthew Wilcox <willy at parisc-linux.org>
5 * Copyright (C) 2006 Kyle McMartin <kyle at parisc-linux.org>
44 /* When loading 32-bit values into 64-bit registers make in restore_sigcontext32()
45 sure to clear the upper 32-bits */ in restore_sigcontext32()
50 err |= __get_user(compat_reg,&sc->sc_gr[regn]); in restore_sigcontext32()
51 regs->gr[regn] = compat_reg; in restore_sigcontext32()
52 /* Load upper half */ in restore_sigcontext32()
53 err |= __get_user(compat_regt,&rf->rf_gr[regn]); in restore_sigcontext32()
[all …]
Dsignal32.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2001 Matthew Wilcox <willy at parisc-linux.org>
4 * Copyright (C) 2003 Carlos O'Donell <carlos at parisc-linux.org>
11 /* 32-bit ucontext as seen from an 64-bit kernel */
16 /* FIXME: Pad out to get uc_mcontext to start at an 8-byte aligned boundary */
24 /* In a deft move of uber-hackery, we decide to carry the top half of all
25 * 64-bit registers in a non-portable, non-ABI, hidden structure.
31 /* Upper half of all the 64-bit registers that were truncated
32 on a copy to a 32-bit userspace */
48 * The 32-bit ABI wants at least 48 bytes for a function call frame:
[all …]
/linux-6.14.4/drivers/media/usb/stk1160/
Dstk1160-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * <elezegarcia--a.t--gmail.com>
10 * <rmthomas--a.t--sciolus.org>
19 /* Power-on Strapping Data */
24 #define STK1160_POSV_L_ACDOUT BIT(3)
25 #define STK1160_POSV_L_ACSYNC BIT(2)
30 * with bit #7 (0x?? OR 0x80 to activate).
39 * Bit 0 - Horizontal Decimation Control
42 * Bit 1 - Decimates Half or More Column
43 * 0 Decimates less than half from original column,
[all …]
/linux-6.14.4/include/uapi/linux/dvb/
Dosd.h1 /* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
3 * osd.h - DEPRECATED On Screen Display API
18 /* All functions return -2 on "not open" */
26 * Opens OSD with this size and bit depth
27 * returns 0 on success, -1 on DRAM allocation error, -2 on "already open"
57 * returns 0 on success, -1 on error
64 * R,G,B, and a opacity value: 0->transparent, 1..254->mix, 255->pixel
74 * returns 0 on success, -1 on error
77 /* returns color number of pixel <x>,<y>, or -1 */
81 * returns 0 on success, -1 on clipping all pixel (no pixel drawn)
[all …]
/linux-6.14.4/sound/soc/fsl/
Dlpc3xxx-i2s.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
19 struct mutex lock; /* To serialize user-space access */
43 #define LPC3XXX_I2S_WW8 FIELD_PREP(0x3, 0) /* Word width is 8bit */
44 #define LPC3XXX_I2S_WW16 FIELD_PREP(0x3, 1) /* Word width is 16bit */
45 #define LPC3XXX_I2S_WW32 FIELD_PREP(0x3, 3) /* Word width is 32bit */
46 #define LPC3XXX_I2S_MONO BIT(2) /* Mono */
47 #define LPC3XXX_I2S_STOP BIT(3) /* Stop, diables the access to FIFO, mutes the channel */
48 #define LPC3XXX_I2S_RESET BIT(4) /* Reset the channel */
49 #define LPC3XXX_I2S_WS_SEL BIT(5) /* Channel Master(0) or slave(1) mode select */
50 #define LPC3XXX_I2S_WS_HP(s) FIELD_PREP(0x7FC0, s) /* Word select half period - 1 */
[all …]
/linux-6.14.4/drivers/soc/fsl/qe/
Dtsa.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
12 #include <dt-bindings/soc/qe-fsl,tsa.h>
24 #define TSA_CPM1_SIRAM_ENTRY_LAST BIT(16)
25 #define TSA_CPM1_SIRAM_ENTRY_BYTE BIT(17)
37 #define TSA_QE_SIRAM_ENTRY_LAST BIT(0)
38 #define TSA_QE_SIRAM_ENTRY_BYTE BIT(1)
51 * - CPM1: 32bit register split in 2*16bit (16bit TDM)
52 * - QE: 4x16bit registers, one per TDM
59 #define TSA_CPM1_SIMODE_SMC2 BIT(31)
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/linux-6.14.4/arch/parisc/include/asm/
Dchecksum.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * and adds in "sum" (32-bit)
11 * returns a 32-bit number suitable for feeding into itself
17 * it's best to have buff aligned on a 32-bit boundary
34 " addib,<= -4, %2, 2f\n" in ip_fast_csum()
43 " addib,> -1, %2, 1b\n" in ip_fast_csum()
51 " subi -1, %0, %0\n" in ip_fast_csum()
66 /* add the swapped two 16-bit halves of sum, in csum_fold()
67 a possible carry from adding the two 16-bit halves, in csum_fold()
68 will carry from the lower half into the upper half, in csum_fold()
[all …]
/linux-6.14.4/drivers/soc/ixp4xx/
Dixp4xx-qmgr.c1 // SPDX-License-Identifier: GPL-2.0-only
21 static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
37 __raw_writel(val, &qmgr_regs->acc[queue][0]); in qmgr_put_entry()
43 val = __raw_readl(&qmgr_regs->acc[queue][0]); in qmgr_get_entry()
55 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) in __qmgr_get_stat1()
62 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) in __qmgr_get_stat2()
67 * qmgr_stat_empty() - checks if a hardware queue is empty
70 * Returns non-zero value if the queue is empty.
79 * qmgr_stat_below_low_watermark() - checks if a queue is below low watermark
82 * Returns non-zero value if the queue is below low watermark.
[all …]
/linux-6.14.4/arch/x86/math-emu/
Dreg_round.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 /*---------------------------------------------------------------------------+
10 | Australia. E-mail [email protected] |
20 | Return value is the tag of the answer, or-ed with FPU_Exception if |
21 | one was raised, or -1 on internal error. |
26 +---------------------------------------------------------------------------*/
28 /*---------------------------------------------------------------------------+
32 | %eax:%ebx 64 bit significand |
33 | %edx 32 bit extension of the significand |
47 | must be non-zero. |
[all …]
/linux-6.14.4/arch/loongarch/include/asm/
Dchecksum.h1 /* SPDX-License-Identifier: GPL-2.0-only */
18 * turns a 32-bit partial checksum (e.g. from csum_partial) into a
19 * 1's complement 16-bit checksum.
26 * swap the two 16-bit halves of sum in csum_fold()
27 * if there is a carry from adding the two 16-bit halves, in csum_fold()
28 * it will carry from the lower half into the upper half, in csum_fold()
29 * giving us the correct sum in the upper half. in csum_fold()
38 * of 32-bit words and is always >= 5.
48 n -= 4; in ip_fast_csum()
54 } while (--n > 0); in ip_fast_csum()
[all …]
/linux-6.14.4/include/linux/
Dcnt32_to_63.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Extend a 32-bit counter to 63 bits
31 * cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter
35 * a relatively short period making wrap-arounds rather frequent. This
36 * is a problem when implementing sched_clock() for example, where a 64-bit
37 * non-wrapping monotonic value is expected to be returned.
39 * To overcome that limitation, let's extend a 32-bit counter to 63 bits
41 * by the hardware while bits 32 to 62 are stored in memory. The top bit in
42 * memory is used to synchronize with the hardware clock half-period. When
43 * the top bit of both counters (hardware and in memory) differ then the
[all …]
/linux-6.14.4/include/uapi/linux/
Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
63 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
64 #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
[all …]
/linux-6.14.4/arch/riscv/crypto/
Dchacha-riscv64-zvkb.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // This file is dual-licensed, meaning that you can use it under your
39 // The generated code of this file depends on the following RISC-V extensions:
40 // - RV64I
41 // - RISC-V Vector ('V') with VLEN >= 128
42 // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
87 vror.vi \d0, \d0, 32 - 16
88 vror.vi \d1, \d1, 32 - 16
89 vror.vi \d2, \d2, 32 - 16
90 vror.vi \d3, \d3, 32 - 16
[all …]
/linux-6.14.4/drivers/net/ethernet/atheros/atlx/
Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <[email protected]>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <[email protected]>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
303 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
[all …]
/linux-6.14.4/drivers/clk/sunxi/
Dclk-sun4i-tcon-ch1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 #include <linux/clk-provider.h>
17 #define TCON_CH1_SCLK2_GATE_BIT BIT(31)
23 #define TCON_CH1_SCLK1_GATE_BIT BIT(15)
24 #define TCON_CH1_SCLK1_HALF_BIT BIT(11)
40 spin_lock_irqsave(&tclk->lock, flags); in tcon_ch1_disable()
41 reg = readl(tclk->reg); in tcon_ch1_disable()
43 writel(reg, tclk->reg); in tcon_ch1_disable()
44 spin_unlock_irqrestore(&tclk->lock, flags); in tcon_ch1_disable()
[all …]
/linux-6.14.4/Documentation/arch/arm64/
Darm-cca.rst1 .. SPDX-License-Identifier: GPL-2.0
16 specification[1]. The monitor acts a bit like a hypervisor (e.g. it runs
24 is split into two. The lower half is protected - any memory that is
25 mapped in this half cannot be seen by the Normal World and the RMM
28 guest's cooperation). The upper half is shared, the Normal World is free
43 ----------------------
55 (specifically earlycon) must be specified in the upper half of IPA.
63 but with the highest valid IPA bit set. The expectation is that the
68 ----------
/linux-6.14.4/Documentation/userspace-api/media/dvb/
Dlegacy_dvb_osd.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later OR GPL-2.0
14 The DVB OSD device controls the OnScreen-Display of the AV7110 based
15 DVB-cards with hardware MPEG2 decoder. It can be accessed through
20 The OSD is not a frame-buffer like on many other cards.
22 The color-depth is limited depending on the memory size installed.
31 -----------
36 .. code-block:: c
39 /* All functions return -2 on "not open" */
67 .. note:: All functions return -2 on "not open"
69 .. flat-table::
[all …]
/linux-6.14.4/Documentation/driver-api/iio/
Dtriggered-buffers.rst26 pf->timestamp = iio_get_time_ns((struct indio_dev *)p);
36 for_each_set_bit(bit, active_scan_mask, masklength)
37 buf[i++] = sensor_get_data(bit)
56 * **sensor_iio_pollfunc**, the function that will be used as top half of poll
61 * **sensor_trigger_handler**, the function that will be used as bottom half of
65 top half.
69 .. kernel-doc:: drivers/iio/buffer/industrialio-triggered-buffer.c
/linux-6.14.4/Documentation/filesystems/
Dqnx6.rst1 .. SPDX-License-Identifier: GPL-2.0
29 ------
35 Blockpointers are 32bit, so the maximum space that can be addressed is
39 ---------------
42 Each qnx6fs got two superblocks, each one having a 64bit serial number.
65 Unused block pointers are always set to ~0 - regardless of root node,
79 0x1000 is the size reserved for each superblock - regardless of the
83 ------
100 The filesize is stored 64bit. Inode counting starts with 1. (while long
104 -----------
[all …]
/linux-6.14.4/include/soc/mscc/
Docelot_vcap.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT)
16 #define OCELOT_VCAP_IS1_VLAN_RECLASSIFY(ocelot, port) ((ocelot)->num_phys_ports + (port))
18 #define OCELOT_VCAP_IS2_MRP_REDIRECT(ocelot, port) ((ocelot)->num_phys_ports + (port))
19 #define OCELOT_VCAP_IS2_MRP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2)
20 #define OCELOT_VCAP_IS2_L2_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 1)
21 #define OCELOT_VCAP_IS2_IPV4_GEN_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 2)
22 #define OCELOT_VCAP_IS2_IPV4_EV_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 3)
23 #define OCELOT_VCAP_IS2_IPV6_GEN_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 4)
24 #define OCELOT_VCAP_IS2_IPV6_EV_PTP_TRAP(ocelot) ((ocelot)->num_phys_ports * 2 + 5)
41 u16 tg_width; /* Type-group width (in bits) */
[all …]
/linux-6.14.4/arch/arm64/kvm/hyp/nvhe/
Dmm.c1 // SPDX-License-Identifier: GPL-2.0-only
54 return -EINVAL; in __pkvm_alloc_private_va_range()
61 return -ENOMEM; in __pkvm_alloc_private_va_range()
69 * pkvm_alloc_private_va_range - Allocates a private VA range.
169 size = end - start; in hyp_back_vmemmap()
201 return -EINVAL; in pkvm_cpu_set_vector()
235 kvm_pte_t pte, *ptep = slot->ptep; in hyp_fixmap_map()
243 return (void *)slot->addr; in hyp_fixmap_map()
248 kvm_pte_t *ptep = slot->ptep; in fixmap_clear_slot()
249 u64 addr = slot->addr; in fixmap_clear_slot()
[all …]
/linux-6.14.4/drivers/soc/aspeed/
Daspeed-lpc-ctrl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/aspeed-lpc-ctrl.h>
19 #define DEVICE_NAME "aspeed-lpc-ctrl"
22 #define HICR5_ENL2H BIT(8)
23 #define HICR5_ENFWH BIT(10)
26 #define SW_FWH2AHB BIT(17)
45 return container_of(file->private_data, struct aspeed_lpc_ctrl, in file_aspeed_lpc_ctrl()
52 unsigned long vsize = vma->vm_end - vma->vm_start; in aspeed_lpc_ctrl_mmap()
53 pgprot_t prot = vma->vm_page_prot; in aspeed_lpc_ctrl_mmap()
55 if (vma->vm_pgoff + vma_pages(vma) > lpc_ctrl->mem_size >> PAGE_SHIFT) in aspeed_lpc_ctrl_mmap()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
21 3. A 32bit mask specifying the DMA channel configuration
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
[all …]
/linux-6.14.4/tools/testing/selftests/powerpc/tm/
Dtm-signal-context-chk-vsx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 #define VSX20 20 /* First VSX register to check in vsr20-vsr31 subset */
43 /* First context will be set with these values, i.e. non-speculative */
51 {-1, -2, -3, -4 },{-5, -6, -7, -8 },{-9, -10,-11,-12},
52 {-13,-14,-15,-16},{-17,-18,-19,-20},{-21,-22,-23,-24},
53 {-25,-26,-27,-28},{-29,-30,-31,-32},{-33,-34,-35,-36},
54 {-37,-38,-39,-40},{-41,-42,-43,-44},{-45,-46,-47,-48}
63 ucontext_t *tm_ucp = ucp->uc_link; in signal_usr1()
68 * FP registers (f0-31) overlap the most significant 64 bits of VSX in signal_usr1()
69 * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like in signal_usr1()
[all …]
/linux-6.14.4/drivers/net/ethernet/intel/igc/
Digc_phy.c1 // SPDX-License-Identifier: GPL-2.0
8 * igc_check_reset_block - Check if PHY reset is blocked
26 * igc_get_phy_id - Retrieve the PHY ID and revision
34 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
38 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
42 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
44 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
48 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
49 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
56 * igc_phy_has_link - Polls PHY for link
[all …]

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