Searched +full:generic +full:- +full:names (Results 1 – 25 of 786) sorted by relevance
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/linux-6.14.4/Documentation/devicetree/bindings/i2c/ |
D | nvidia,tegra20-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Thierry Reding <[email protected]> 9 - Jon Hunter <[email protected]> 16 - description: Tegra20 has 4 generic I2C controller. This can support 17 master and slave mode of I2C communication. The i2c-tegra driver 19 controller is only compatible with "nvidia,tegra20-i2c". 20 const: nvidia,tegra20-i2c [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pci/ |
D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <[email protected]> 11 - Gustavo Pimentel <[email protected]> 14 Generic Synopsys DesignWare PCIe Root Port and Endpoint controller 23 Interface - DBI. In accordance with the reference manual the register 24 configuration space belongs to the Configuration-Dependent Module (CDM) 25 and is split up into several sub-parts Standard PCIe configuration [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/net/ |
D | nixge.txt | 4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for 5 older device trees with DMA engines co-located in the address map, 7 - reg: Address and length of the register set for the device. It contains the 8 information of registers in the same order as described by reg-names. 9 - reg-names: Should contain the reg names 12 - interrupts: Should contain tx and rx interrupt 13 - interrupt-names: Should be "rx" and "tx" 14 - phy-mode: See ethernet.txt file in the same directory. 15 - nvmem-cells: Phandle of nvmem cell containing the MAC address 16 - nvmem-cell-names: Should be "address" [all …]
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D | cdns,macb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nicolas Ferre <[email protected]> 11 - Claudiu Beznea <[email protected]> 16 - items: 17 - enum: 18 - cdns,at91rm9200-emac # Atmel at91rm9200 SoC 19 - const: cdns,emac # Generic 21 - items: [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/serial/ |
D | renesas,scif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <[email protected]> 15 - items: 16 - enum: 17 - renesas,scif-r7s72100 # RZ/A1H 18 - const: renesas,scif # generic SCIF compatible UART 20 - items: 21 - enum: [all …]
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D | renesas,hscif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <[email protected]> 13 - $ref: serial.yaml# 18 - items: 19 - enum: 20 - renesas,hscif-r8a7778 # R-Car M1 21 - renesas,hscif-r8a7779 # R-Car H1 22 - const: renesas,rcar-gen1-hscif # R-Car Gen1 [all …]
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D | renesas,em-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/renesas,em-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Magnus Damm <[email protected]> 15 - items: 16 - enum: 17 - renesas,r9a09g011-uart # RZ/V2M 18 - const: renesas,em-uart # generic EMMA Mobile compatible UART 20 - items: [all …]
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D | renesas,sci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <[email protected]> 13 - $ref: serial.yaml# 18 - items: 19 - enum: 20 - renesas,r9a07g043-sci # RZ/G2UL and RZ/Five 21 - renesas,r9a07g044-sci # RZ/G2{L,LC} 22 - renesas,r9a07g054-sci # RZ/V2L [all …]
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D | renesas,scifa.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <[email protected]> 13 - $ref: serial.yaml# 18 - items: 19 - enum: 20 - renesas,scifa-r8a73a4 # R-Mobile APE6 21 - renesas,scifa-r8a7740 # R-Mobile A1 22 - renesas,scifa-sh73a0 # SH-Mobile AG5 [all …]
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/linux-6.14.4/arch/mips/boot/dts/brcm/ |
D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <175625000>; 42 cpu_intc: interrupt-controller { 43 #address-cells = <0>; 44 compatible = "mti,cpu-interrupt-controller"; 46 interrupt-controller; [all …]
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D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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D | bcm7420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <93750000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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/linux-6.14.4/arch/arm64/boot/dts/marvell/ |
D | cn9131-db.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Device tree for the CN9131-DB board. 8 #include "cn9130-db.dtsi" 12 "marvell,armada-ap807-quad", "marvell,armada-ap807"; 21 cp1_reg_usb3_vbus0: regulator-6 { 22 compatible = "regulator-fixed"; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&cp1_xhci0_vbus_pins>; 25 regulator-name = "cp1-xhci0-vbus"; 26 regulator-min-microvolt = <5000000>; [all …]
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D | armada-8040-mcbin.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include "armada-8040.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040", 15 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 18 stdout-path = "serial0:115200n8"; 34 v_3_3: regulator-3-3v { 35 compatible = "regulator-fixed"; 36 regulator-name = "v_3_3"; 37 regulator-min-microvolt = <3300000>; [all …]
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D | cn9132-db.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Device tree for the CN9132-DB board. 8 #include "cn9131-db.dtsi" 12 "marvell,armada-ap807-quad", "marvell,armada-ap807"; 20 cp2_reg_usb3_vbus0: regulator-7 { 21 compatible = "regulator-fixed"; 22 regulator-name = "cp2-xhci0-vbus"; 23 regulator-min-microvolt = <5000000>; 24 regulator-max-microvolt = <5000000>; 25 enable-active-high; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/clock/ |
D | microchip,lan966x-gck.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/microchip,lan966x-gck.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip LAN966X Generic Clock Controller 10 - Kavyasree Kotagiri <[email protected]> 13 The LAN966X Generic clock controller contains 3 PLLs - cpu_clk, 20 - enum: 21 - microchip,lan966x-gck 22 - microchip,lan9691-gck [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/thermal/ |
D | generic-adc-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/thermal/generic-adc-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Laxman Dewangan <[email protected]> 16 temperature using voltage-temperature lookup table. 18 $ref: thermal-sensor.yaml# 22 const: generic-adc-thermal 24 '#thermal-sensor-cells': 27 io-channels: [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/spi/ |
D | spi-ath79.txt | 4 - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. 5 - reg: Base address and size of the controllers memory area 6 - clocks: phandle of the AHB clock. 7 - clock-names: has to be "ahb". 8 - #address-cells: <1>, as required by generic SPI binding. 9 - #size-cells: <0>, also as required by generic SPI binding. 11 Child nodes as per the generic SPI binding. 16 compatible = "qca,ar9132-spi", "qca,ar7100-spi"; 20 clock-names = "ahb"; 22 #address-cells = <1>; [all …]
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/linux-6.14.4/arch/arm/boot/dts/allwinner/ |
D | sunxi-h3-h5.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/sun6i-rtc.h> 44 #include <dt-bindings/clock/sun8i-de2.h> 45 #include <dt-bindings/clock/sun8i-h3-ccu.h> 46 #include <dt-bindings/clock/sun8i-r-ccu.h> 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 48 #include <dt-bindings/reset/sun8i-de2.h> 49 #include <dt-bindings/reset/sun8i-h3-ccu.h> 50 #include <dt-bindings/reset/sun8i-r-ccu.h> 53 interrupt-parent = <&gic>; [all …]
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/linux-6.14.4/arch/arm64/boot/dts/allwinner/ |
D | sun50i-h616.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/sun50i-h616-ccu.h> 8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h> 9 #include <dt-bindings/clock/sun6i-rtc.h> 10 #include <dt-bindings/reset/sun50i-h616-ccu.h> 11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/ |
D | sdhci-omap.txt | 8 - compatible: Should be "ti,omap2430-sdhci" for omap2430 controllers 9 Should be "ti,omap3-sdhci" for omap3 controllers 10 Should be "ti,omap4-sdhci" for omap4 and ti81 controllers 11 Should be "ti,omap5-sdhci" for omap5 controllers 12 Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers 13 Should be "ti,k2g-sdhci" for K2G 14 Should be "ti,am335-sdhci" for am335x controllers 15 Should be "ti,am437-sdhci" for am437x controllers 16 - ti,hwmods: Must be "mmc<n>", <n> is controller instance starting 1 18 - pinctrl-names: Should be subset of "default", "hs", "sdr12", "sdr25", "sdr50", [all …]
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D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Adrian Hunter <[email protected]> 13 - $ref: mmc-controller.yaml# 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names 23 - if: [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/input/touchscreen/ |
D | resistive-adc-touch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/input/touchscreen/resistive-adc-touch.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic resistive touchscreen ADC 10 - Oleksij Rempel <[email protected]> 13 Generic ADC based resistive touchscreen controller 18 - $ref: touchscreen.yaml# 22 const: resistive-adc-touch 24 io-channels: [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/ata/ |
D | ahci-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hans de Goede <[email protected]> 11 - Damien Le Moal <[email protected]> 18 document doesn't constitute a DT-node binding by itself but merely 19 defines a set of common properties for the AHCI-compatible devices. 24 - $ref: sata-common.yaml# 29 Generic AHCI registers space conforming to the Serial ATA AHCI [all …]
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