Searched +full:gcc +full:- +full:bus (Results 1 – 25 of 246) sorted by relevance
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/linux-6.14.4/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,msm8996-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 11 - Sibi Sankar <[email protected]> 20 - qcom,msm8996-mss-pil 21 - qcom,msm8998-mss-pil 22 - qcom,sdm660-mss-pil 23 - qcom,sdm845-mss-pil [all …]
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D | qcom,sc7180-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <[email protected]> 19 - qcom,sc7180-mss-pil 23 - description: MSS QDSP6 registers 24 - description: RMB registers 26 reg-names: 28 - const: qdsp6 [all …]
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/linux-6.14.4/arch/arm/boot/dts/qcom/ |
D | qcom-msm8660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8660.h> 7 #include <dt-bindings/soc/qcom,gsbi.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 interrupt-parent = <&intc>; 17 #address-cells = <1>; [all …]
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D | qcom-ipq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mfd/qcom-rpm.h> 6 #include <dt-bindings/clock/qcom,rpmcc.h> 7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h> 11 #include <dt-bindings/soc/qcom,gsbi.h> [all …]
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D | qcom-ipq4019.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 18 interrupt-parent = <&intc>; 20 reserved-memory { 21 #address-cells = <0x1>; [all …]
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D | qcom-mdm9615.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h> 13 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h> 15 #include <dt-bindings/mfd/qcom-rpm.h> 16 #include <dt-bindings/soc/qcom,gsbi.h> 19 #address-cells = <1>; 20 #size-cells = <1>; [all …]
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D | qcom-msm8960.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 8 #include <dt-bindings/mfd/qcom-rpm.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/bus/ |
D | qcom,ssc-block-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs 10 - Michael Srba <[email protected]> 14 need to be turned on in a sequence before communication over the AHB bus 27 - const: qcom,msm8998-ssc-block-bus 28 - const: qcom,ssc-block-bus 32 - description: SSCAON_CONFIG0 registers [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/display/msm/ |
D | qcom,sdm845-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <[email protected]> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17 - qcom,sdm670-dpu 18 - qcom,sdm845-dpu 22 - description: Address offset and size for mdp register set 23 - description: Address offset and size for vbif register set [all …]
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D | qcom,mdp5.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Dmitry Baryshkov <[email protected]> 15 - Rob Clark <[email protected]> 20 - const: qcom,mdp5 22 - items: 23 - enum: 24 - qcom,apq8084-mdp5 25 - qcom,msm8226-mdp5 [all …]
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D | qcom,sm6350-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <[email protected]> 13 SM6350 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6350-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AXI clock from gcc [all …]
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D | qcom,qcm2290-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Loic Poulain <[email protected]> 14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,qcm2290-mdss 25 - description: Display AHB clock from gcc 26 - description: Display AXI clock [all …]
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D | qcom,mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <[email protected]> 11 - Rob Clark <[email protected]> 15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc. 19 pattern: "^display-subsystem@[0-9a-f]+$" 23 - qcom,mdss 29 reg-names: 32 - const: mdss_phys [all …]
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D | qcom,sm8350-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8350-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Robert Foss <[email protected]> 13 MSM Mobile Display Subsystem(MDSS) that encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 21 - const: qcom,sm8350-mdss 25 - description: Display AHB clock from gcc 26 - description: Display hf axi clock [all …]
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D | qcom,sm6125-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marijn Suijten <[email protected]> 13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6125-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AHB clock [all …]
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D | qcom,sm6375-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <[email protected]> 13 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6375-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AHB clock [all …]
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D | qcom,sm6115-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <[email protected]> 14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,sm6115-mdss 25 - description: Display AHB clock from gcc 26 - description: Display AXI clock [all …]
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/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | ipq8074.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 15 interrupt-parent = <&intc>; 19 compatible = "fixed-clock"; 20 clock-frequency = <32768>; 21 #clock-cells = <0>; 25 compatible = "fixed-clock"; [all …]
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D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/interconnect/qcom,msm8996.h> 11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/pci/ |
D | qcom,pcie-sc7280.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 11 - Manivannan Sadhasivam <[email protected]> 19 const: qcom,pcie-sc7280 25 reg-names: 28 - const: parf # Qualcomm specific registers 29 - const: dbi # DesignWare PCIe registers [all …]
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D | qcom,pcie-sc8180x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc8180x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 11 - Manivannan Sadhasivam <[email protected]> 19 const: qcom,pcie-sc8180x 25 reg-names: 28 - const: parf # Qualcomm specific registers 29 - const: dbi # DesignWare PCIe registers [all …]
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D | qcom,pcie-sm8350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8350.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 11 - Manivannan Sadhasivam <[email protected]> 19 const: qcom,pcie-sm8350 25 reg-names: 28 - const: parf # Qualcomm specific registers 29 - const: dbi # DesignWare PCIe registers [all …]
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D | qcom,pcie-sc8280xp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc8280xp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 11 - Manivannan Sadhasivam <[email protected]> 20 - qcom,pcie-sa8540p 21 - qcom,pcie-sc8280xp 27 reg-names: 30 - const: parf # Qualcomm specific registers [all …]
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D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 11 - Manivannan Sadhasivam <[email protected]> 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/media/ |
D | qcom,msm8916-venus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stanimir Varbanov <[email protected]> 17 - $ref: qcom,venus-common.yaml# 21 const: qcom,msm8916-venus 23 power-domains: 29 clock-names: 31 - const: core [all …]
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