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/linux-6.14.4/arch/loongarch/boot/dts/
Dloongson-2k0500.dtsi90 interrupt-parent = <&eiointc>;
100 interrupt-parent = <&eiointc>;
110 interrupt-parent = <&eiointc>;
120 interrupt-parent = <&eiointc>;
163 eiointc: interrupt-controller@1fe11600 { label
164 compatible = "loongson,ls2k0500-eiointc";
193 interrupt-parent = <&eiointc>;
201 interrupt-parent = <&eiointc>;
209 interrupt-parent = <&eiointc>;
226 interrupt-parent = <&eiointc>;
[all …]
Dloongson-2k2000.dtsi96 interrupt-parent = <&eiointc>;
139 eiointc: interrupt-controller@1fe01600 { label
140 compatible = "loongson,ls2k2000-eiointc";
154 interrupt-parent = <&eiointc>;
165 interrupt-parent = <&eiointc>;
/linux-6.14.4/arch/loongarch/kvm/intc/
Deiointc.c301 struct loongarch_eiointc *eiointc = vcpu->kvm->arch.eiointc; in kvm_eiointc_read() local
303 if (!eiointc) { in kvm_eiointc_read()
304 kvm_err("%s: eiointc irqchip not valid!\n", __func__); in kvm_eiointc_read()
309 spin_lock_irqsave(&eiointc->lock, flags); in kvm_eiointc_read()
312 ret = loongarch_eiointc_readb(vcpu, eiointc, addr, len, val); in kvm_eiointc_read()
315 ret = loongarch_eiointc_readw(vcpu, eiointc, addr, len, val); in kvm_eiointc_read()
318 ret = loongarch_eiointc_readl(vcpu, eiointc, addr, len, val); in kvm_eiointc_read()
321 ret = loongarch_eiointc_readq(vcpu, eiointc, addr, len, val); in kvm_eiointc_read()
327 spin_unlock_irqrestore(&eiointc->lock, flags); in kvm_eiointc_read()
675 struct loongarch_eiointc *eiointc = vcpu->kvm->arch.eiointc; in kvm_eiointc_write() local
[all …]
Dpch_pic.c11 /* update the isr according to irq level and route irq to eiointc */
17 * set isr and route irq to eiointc and in pch_pic_update_irq()
24 eiointc_set_irq(s->kvm->arch.eiointc, irq, level); in pch_pic_update_irq()
30 eiointc_set_irq(s->kvm->arch.eiointc, irq, level); in pch_pic_update_irq()
77 eiointc_set_irq(kvm->arch.eiointc, irq, level); in pch_msi_set_irq()
165 /* only route to int0: eiointc */ in loongarch_pch_pic_read()
270 /* only route to int0: eiointc */ in loongarch_pch_pic_write()
274 /* route table to eiointc */ in loongarch_pch_pic_write()
/linux-6.14.4/Documentation/arch/loongarch/
Dirq-chip-model.rst9 Interrupt Controller), LIOINTC (Legacy I/O Interrupt Controller), EIOINTC (Extended
14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package
61 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by EIOINTC, and then go to
70 | EIOINTC | | LIOINTC | <-- | UARTs |
93 devices interrupts go to PCH-PIC/PCH-MSI and gathered by V-EIOINTC (Virtual
102 | V-EIOINTC |
118 V-EIOINTC (Virtual Extended I/O Interrupt Controller) is an extension of
119 EIOINTC, it only works in VM mode which runs in KVM hypervisor. Interrupts can
120 be routed to up to four vCPUs via standard EIOINTC, however with V-EIOINTC
123 With standard EIOINTC, interrupt routing setting includes two parts: eight
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,eiointc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
23 - loongson,ls2k0500-eiointc
24 - loongson,ls2k2000-eiointc
48 eiointc: interrupt-controller@1fe11600 {
49 compatible = "loongson,ls2k0500-eiointc";
/linux-6.14.4/Documentation/translations/zh_CN/arch/loongarch/
Dirq-chip-model.rst14 Legacy I/O Interrupt Controller）、EIOINTC（Extended I/O Interrupt Controller）、
18 CPUINTC是一种CPU内部的每个核本地的中断控制器，LIOINTC/EIOINTC/HTVECINTC是CPU内部的
72 | EIOINTC | | LIOINTC | <-- | UARTs |
103 | V-EIOINTC |
116 V-EIOINTC 是EIOINTC的扩展, 仅工作在虚拟机模式下, 中断经EIOINTC最多可个路由到
159 | EIOINTC | | AVECINTC | | LIOINTC | <-- | UARTs |
192 EIOINTC::
241 - EIOINTC：即《龙芯3A5000处理器使用手册》第11.2节所描述的“扩展I/O中断”；
/linux-6.14.4/Documentation/translations/zh_TW/arch/loongarch/
Dirq-chip-model.rst14 Legacy I/O Interrupt Controller）、EIOINTC（Extended I/O Interrupt Controller）、
18 CPUINTC是一種CPU內部的每個核本地的中斷控制器，LIOINTC/EIOINTC/HTVECINTC是CPU內部的
72 | EIOINTC | | LIOINTC | <-- | UARTs |
105 EIOINTC::
154 - EIOINTC：即《龍芯3A5000處理器使用手冊》第11.2節所描述的“擴展I/O中斷”；
/linux-6.14.4/arch/loongarch/kernel/
Dacpi.c140 struct acpi_madt_eio_pic *eiointc = NULL; in acpi_parse_eio_master() local
142 eiointc = (struct acpi_madt_eio_pic *)header; in acpi_parse_eio_master()
143 if (BAD_MADT_ENTRY(eiointc, end)) in acpi_parse_eio_master()
146 core = eiointc->node * CORES_PER_EIO_NODE; in acpi_parse_eio_master()
/linux-6.14.4/arch/loongarch/include/asm/
Dkvm_pch_pic.h53 uint8_t route_entry[64]; /* default value 0, route to int0: eiointc */
54 uint8_t htmsi_vector[64]; /* irq route table for routing to eiointc */
Dkvm_host.h98 * For eiointc interrupt controller, max destination CPUID size is 256
132 struct loongarch_eiointc *eiointc; member
/linux-6.14.4/drivers/irqchip/
Dirq-loongson-eiointc.c8 #define pr_fmt(fmt) "eiointc: " fmt
290 .name = "EIOINTC",
471 "irqchip/loongarch/eiointc:starting", in eiointc_init()
551 if (of_device_is_compatible(of_node, "loongson,ls2k0500-eiointc")) in eiointc_of_init()
570 IRQCHIP_DECLARE(loongson_ls2k0500_eiointc, "loongson,ls2k0500-eiointc", eiointc_of_init);
571 IRQCHIP_DECLARE(loongson_ls2k2000_eiointc, "loongson,ls2k2000-eiointc", eiointc_of_init);
DMakefile118 obj-$(CONFIG_LOONGSON_EIOINTC) += irq-loongson-eiointc.o
/linux-6.14.4/arch/loongarch/kvm/
DMakefile22 kvm-y += intc/eiointc.o
Dvm.c196 return (kvm->arch.ipi && kvm->arch.eiointc && kvm->arch.pch_pic); in kvm_arch_irqchip_in_kernel()
Dmain.c403 /* Register LoongArch EIOINTC interrupt controller interface. */ in kvm_loongarch_env_init()