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/linux-6.14.4/Documentation/devicetree/bindings/arm/
Dqcom,coresight-tpdm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Trace, Profiling and Diagnostics Monitor - TPDM
13 Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
14 Single Bit (DSB). It performs data collection in the data producing clock
22 - Mao Jinlong <[email protected]>
23 - Tao Zhang <[email protected]>
31 - qcom,coresight-tpdm
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/linux-6.14.4/drivers/hwtracing/coresight/
Dcoresight-tpda.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* Aggregator port CMB data set element size bit */
15 /* Aggregator port DSB data set element size bit */
20 /* Bits 6 ~ 12 is for atid value */
24 * struct tpda_drvdata - specifics associated to an TPDA component
30 * @dsb_esize Record the DSB element size.
31 * @cmb_esize Record the CMB element size.
Dcoresight-tpda.c1 // SPDX-License-Identifier: GPL-2.0
18 #include "coresight-priv.h"
19 #include "coresight-tpda.h"
20 #include "coresight-trace-id.h"
21 #include "coresight-tpdm.h"
28 (csdev->subtype.source_subtype == in coresight_device_is_tpdm()
34 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); in tpda_clear_element_size()
36 drvdata->dsb_esize = 0; in tpda_clear_element_size()
37 drvdata->cmb_esize = 0; in tpda_clear_element_size()
45 if (drvdata->dsb_esize == 64) in tpda_set_element_size()
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Dcoresight-etm4x-core.c1 // SPDX-License-Identifier: GPL-2.0
26 #include <linux/coresight-pmu.h>
35 #include <linux/clk/clk-conf.h>
43 #include "coresight-etm4x.h"
44 #include "coresight-etm-perf.h"
45 #include "coresight-etm4x-cfg.h"
46 #include "coresight-self-hosted-trace.h"
47 #include "coresight-syscfg.h"
48 #include "coresight-trace-id.h"
54 #define PARAM_PM_SAVE_FIRMWARE 0 /* save self-hosted state as per firmware */
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dqcs8300.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qcs8300-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/clock/qcom,sa8775p-camcc.h>
9 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-videocc.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
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Dqcs615.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qcs615-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/interconnect/qcom,icc.h>
10 #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/power/qcom,rpmhpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
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Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
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Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/interconnect/qcom,icc.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
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/linux-6.14.4/Documentation/ABI/testing/
Dsysfs-bus-coresight-devices-tpdm1 What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
11 Accepts only one of the 2 values - 1 or 2.
12 1 : Generate 64 bits data
13 2 : Generate 32 bits data
15 What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
22 Accepts only one value - 1.
25 What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
30 (RW) Set/Get the trigger type of the DSB for tpdm.
32 Accepts only one of the 2 values - 0 or 1.
33 0 : Set the DSB trigger type to false
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/linux-6.14.4/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_reg.h3 * Copyright (c) 2007-2013 Broadcom Corporation
12 * by size in bits. For example [RW 32]. The access types are:
13 * R - Read only
14 * RC - Clear on read
15 * RW - Read/Write
16 * ST - Statistics register (clear on read)
17 * W - Write only
18 * WB - Wide bus register - the size is over 32 bits and it should be
19 * read/write in consecutive 32 bits accesses
20 * WR - Write Clear (write 1 to clear the bit)
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Dbnx2x_main.c3 * Copyright (c) 2007-2013 Broadcom Corporation
36 #include <linux/dma-mapping.h>
83 #define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw"
84 #define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw"
85 #define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw"
86 #define FW_FILE_NAME_E1_V15 "bnx2x/bnx2x-e1-" FW_FILE_VERSION_V15 ".fw"
87 #define FW_FILE_NAME_E1H_V15 "bnx2x/bnx2x-e1h-" FW_FILE_VERSION_V15 ".fw"
88 #define FW_FILE_NAME_E2_V15 "bnx2x/bnx2x-e2-" FW_FILE_VERSION_V15 ".fw"
117 MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X "
124 static int mrrs = -1;
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/linux-6.14.4/drivers/irqchip/
Dirq-gic-v3-its.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved.
37 #include <linux/irqchip/arm-gic-v3.h>
38 #include <linux/irqchip/arm-gic-v4.h>
43 #include "irq-gic-common.h"
44 #include "irq-msi-lib.h"
61 * be 64kB aligned (one bit per LPI, plus 8192 bits for SPI/PPI/SGI).
71 * Collection structure - just an ID, and a redistributor address to
81 * The ITS_BASER structure - contains memory information, cached
94 * The ITS structure - contains most of the infrastructure, with the
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