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/linux-6.14.4/drivers/gpu/drm/bridge/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 Bridge registration and lookup framework.
13 DRM bridge wrapper of DRM panels
21 Simple transparent bridge that is used by several non-DRM drivers to
29 Simple bridge that terminates the bridge chain and provides HPD
32 menu "Display Interface Bridges"
36 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge"
43 ICN6211 is MIPI-DSI/RGB Converter bridge from chipone.
61 tristate "ChromeOS EC ANX7688 bridge"
67 ChromeOS EC ANX7688 is an ultra-low power
[all …]
Ddisplay-connector.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/media-bus-format.h>
21 struct drm_bridge bridge; member
31 to_display_connector(struct drm_bridge *bridge) in to_display_connector() argument
33 return container_of(bridge, struct display_connector, bridge); in to_display_connector()
36 static int display_connector_attach(struct drm_bridge *bridge, in display_connector_attach() argument
39 return flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR ? 0 : -EINVAL; in display_connector_attach()
43 display_connector_detect(struct drm_bridge *bridge) in display_connector_detect() argument
45 struct display_connector *conn = to_display_connector(bridge); in display_connector_detect()
47 if (conn->hpd_gpio) { in display_connector_detect()
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Dti-dlpc3433.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <linux/media-bus-format.h>
28 WR_DISPLAY_SIZE = 0x12, /* Write Display Size */
57 struct drm_bridge bridge; member
70 static inline struct dlpc *bridge_to_dlpc(struct drm_bridge *bridge) in bridge_to_dlpc() argument
72 return container_of(bridge, struct dlpc, bridge); in bridge_to_dlpc()
107 static void dlpc_atomic_enable(struct drm_bridge *bridge, in dlpc_atomic_enable() argument
110 struct dlpc *dlpc = bridge_to_dlpc(bridge); in dlpc_atomic_enable()
111 struct device *dev = dlpc->dev; in dlpc_atomic_enable()
112 struct drm_display_mode *mode = &dlpc->mode; in dlpc_atomic_enable()
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Dparade-ps8640.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <drm/display/drm_dp_aux_bus.h>
17 #include <drm/display/drm_dp_helper.h>
72 * page[1]: for VIDEO Bridge
98 struct drm_bridge bridge; member
150 return container_of(e, struct ps8640, bridge); in bridge_to_ps8640()
160 struct regmap *map = ps_bridge->regmap[PAGE2_TOP_CNTL]; in _ps8640_wait_hpd_asserted()
181 if (!ret && ps_bridge->need_post_hpd_delay) { in _ps8640_wait_hpd_asserted()
182 ps_bridge->need_post_hpd_delay = false; in _ps8640_wait_hpd_asserted()
192 struct device *dev = &ps_bridge->page[PAGE0_DP_CNTL]->dev; in ps8640_wait_hpd_asserted()
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/linux-6.14.4/include/drm/
Ddrm_bridge.h49 * enum drm_bridge_attach_flags - Flags for &drm_bridge_funcs.attach
53 * @DRM_BRIDGE_ATTACH_NO_CONNECTOR: When this flag is set the bridge
60 * struct drm_bridge_funcs - drm_bridge control functions
66 * This callback is invoked whenever our bridge is being attached to a
76 int (*attach)(struct drm_bridge *bridge,
82 * This callback is invoked whenever our bridge is being detached from a
87 void (*detach)(struct drm_bridge *bridge);
93 * bridge. This should be implemented if the bridge has some sort of
94 * restriction in the modes it can display. For example, a given bridge
111 * to look at anything else but the passed-in mode, and validate it
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/linux-6.14.4/drivers/gpu/drm/bridge/imx/
DKconfig10 This is a DRM bridge implementation for the DRM i.MX IPUv3 driver,
11 that uses of_get_drm_display_mode to acquire display mode.
13 Newer designs should not use this bridge and should use proper panel
17 tristate "Freescale i.MX8MP HDMI-TX bridge support"
28 tristate "Freescale i.MX8MP HDMI PVI bridge support"
35 tristate "Freescale i.MX8QM LVDS display bridge"
41 Choose this to enable the internal LVDS Display Bridge(LDB) found in
45 tristate "Freescale i.MX8QXP LVDS display bridge"
51 Choose this to enable the internal LVDS Display Bridge(LDB) found in
64 tristate "Freescale i.MX8QM/QXP display pixel link"
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/linux-6.14.4/drivers/gpu/drm/msm/dp/
Ddp_drm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
17 * msm_dp_bridge_detect - callback to determine if connector is connected
18 * @bridge: Pointer to drm bridge structure
19 * Returns: Bridge's 'is connected' status
21 static enum drm_connector_status msm_dp_bridge_detect(struct drm_bridge *bridge) in msm_dp_bridge_detect() argument
25 dp = to_dp_bridge(bridge)->msm_dp_display; in msm_dp_bridge_detect()
27 drm_dbg_dp(dp->drm_dev, "link_ready = %s\n", in msm_dp_bridge_detect()
28 (dp->link_ready) ? "true" : "false"); in msm_dp_bridge_detect()
30 return (dp->link_ready) ? connector_status_connected : in msm_dp_bridge_detect()
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/linux-6.14.4/drivers/gpu/drm/imx/ipuv3/
Dparallel-display.c1 // SPDX-License-Identifier: GPL-2.0+
3 * i.MX drm driver - parallel display implementation
9 #include <linux/media-bus-format.h>
22 #include <drm/bridge/imx.h>
24 #include "imx-drm.h"
28 struct drm_bridge bridge; member
40 return container_of(b, struct imx_parallel_display_encoder, bridge)->pd; in bridge_to_imxpd()
53 imx_pd_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, in imx_pd_bridge_atomic_get_output_bus_fmts() argument
59 struct drm_display_info *di = &conn_state->connector->display_info; in imx_pd_bridge_atomic_get_output_bus_fmts()
60 struct imx_parallel_display *imxpd = bridge_to_imxpd(bridge); in imx_pd_bridge_atomic_get_output_bus_fmts()
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/linux-6.14.4/drivers/gpu/drm/display/
Ddrm_bridge_connector.c1 // SPDX-License-Identifier: GPL-2.0+
22 #include <drm/display/drm_hdmi_audio_helper.h>
23 #include <drm/display/drm_hdmi_helper.h>
24 #include <drm/display/drm_hdmi_state_helper.h>
29 * The DRM bridge connector helper object provides a DRM connector
32 * the chain, and don't require any intervention from the display controller
35 * To use the helper, display controller drivers create a bridge connector with
41 * The DRM bridge connector operations are implemented based on the operations
43 * to the bridge closest to the connector (at the end of the chain) that
46 * To make use of this helper, all bridges in the chain shall report bridge
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/linux-6.14.4/Documentation/gpu/
Ddrm-kms-helpers.rst23 also the simple display pipe helpers.
25 * There's a big pile of helpers for handling outputs. First the generic bridge
27 for handling panel-related information and logic. Plus then a big set of
32 * The last group of helpers concerns itself with the frontend side of a display
39 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
42 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
51 --------
53 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
57 ---------------------------------------
59 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
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/linux-6.14.4/drivers/gpu/drm/
Ddrm_bridge.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 #include <linux/media-bus-format.h>
47 * A bridge is always attached to a single &drm_encoder at a time, but can be
50 * [ CRTC ---> ] Encoder ---> Bridge A ---> Bridge B
52 * Here, the output of the encoder feeds to bridge A, and that furthers feeds to
53 * bridge B. Bridge chains can be arbitrarily long, and shall be fully linear:
54 * Chaining multiple bridges to the output of a bridge, or the same bridge to
64 * DOC: display driver integration
66 * Display drivers are responsible for linking encoders with the first bridge
67 * in the chains. This is done by acquiring the appropriate bridge with
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Ddrm_simple_kms_helper.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 * This helper library provides helpers for drivers for simple display
24 * drm_simple_display_pipe_init() initializes a simple display pipeline
25 * which has only one full-screen scanout buffer feeding one output. The
33 * requirements of the display pipeline and does not add additional
43 * drm_simple_encoder_init - Initialize a preallocated encoder with
51 * The encoder will be cleaned up automatically as part of the mode-setting
92 if (!pipe->funcs || !pipe->funcs->mode_valid) in drm_simple_kms_crtc_mode_valid()
96 return pipe->funcs->mode_valid(pipe, mode); in drm_simple_kms_crtc_mode_valid()
105 if (!crtc_state->enable) in drm_simple_kms_crtc_check()
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/linux-6.14.4/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
14 multiplexer in the front to select any of the four IPU display
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
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/linux-6.14.4/drivers/gpu/drm/tegra/
Drgb.c1 // SPDX-License-Identifier: GPL-2.0-only
96 tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); in tegra_rgb_encoder_disable()
97 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_disable()
102 struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode; in tegra_rgb_encoder_enable()
107 tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable)); in tegra_rgb_encoder_enable()
110 tegra_dc_writel(rgb->dc, value, DC_DISP_DATA_ENABLE_OPTIONS); in tegra_rgb_encoder_enable()
112 /* configure H- and V-sync signal polarities */ in tegra_rgb_encoder_enable()
113 value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
115 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in tegra_rgb_encoder_enable()
120 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in tegra_rgb_encoder_enable()
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/linux-6.14.4/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
10 - Liu Ying <[email protected]>
13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
25 const: fsl,imx8qxp-pxl2dpi
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Dtoshiba,tc358775.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358775 DSI to LVDS bridge
10 - Vinay Simha BN <[email protected]>
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
19 Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display
25 - toshiba,tc358765
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Dfsl,imx8qxp-pixel-link.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp Display Pixel Link
10 - Liu Ying <[email protected]>
13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
14 asynchronous linkage between pixel sources(display controller or
19 display controllers.
21 The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
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Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp LVDS Display Bridge
10 - Liu Ying <[email protected]>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
23 LDB split mode to support a dual link LVDS display. The channel indexes
41 - fsl,imx8qm-ldb
42 - fsl,imx8qxp-ldb
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Dti,dlpc3433.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ti,dlpc3433.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI DLPC3433 MIPI DSI to DMD bridge
10 - Jagan Teki <[email protected]>
11 - Christopher Vollo <[email protected]>
14 TI DLPC3433 is a MIPI DSI based display controller bridge
30 - 0x1b
31 - 0x1d
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/linux-6.14.4/drivers/gpu/drm/mcde/
Dmcde_drv.c1 // SPDX-License-Identifier: GPL-2.0
5 * (C) ST-Ericsson SA 2013
9 * DOC: ST-Ericsson MCDE Driver
11 * The MCDE (short for multi-channel display engine) is a graphics
15 * ST-Ericsson U8500 where is was used for mass-market deployments
18 * It can do 1080p30 on SDTV CCIR656, DPI-2, DBI-2 or DSI for
22 * The hardware has four display pipes, and the layout is a little
25 * Memory -> Overlay -> Channel -> FIFO -> 8 formatters -> DSI/DPI
26 * External 0..5 0..3 A,B, 6 x DSI bridge
36 * DPI port, it is possible to configure up to 4 display pipelines
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Dmcde_dsi.c1 // SPDX-License-Identifier: GPL-2.0+
41 struct drm_bridge bridge; member
57 static inline struct mcde_dsi *bridge_to_mcde_dsi(struct drm_bridge *bridge) in bridge_to_mcde_dsi() argument
59 return container_of(bridge, struct mcde_dsi, bridge); in bridge_to_mcde_dsi()
73 d = host_to_mcde_dsi(mdsi->host); in mcde_dsi_irq()
75 dev_dbg(d->dev, "%s called\n", __func__); in mcde_dsi_irq()
77 val = readl(d->regs + DSI_DIRECT_CMD_STS_FLAG); in mcde_dsi_irq()
79 dev_dbg(d->dev, "DSI_DIRECT_CMD_STS_FLAG = %08x\n", val); in mcde_dsi_irq()
81 dev_dbg(d->dev, "direct command write completed\n"); in mcde_dsi_irq()
84 dev_dbg(d->dev, "direct command TE received\n"); in mcde_dsi_irq()
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/linux-6.14.4/drivers/gpu/drm/i915/display/
Dintel_lpe_audio.c24 * Pierre-Louis Bossart <pierre-[email protected]>
34 * Atom platforms (e.g. valleyview and cherryTrail) integrates a DMA-based
41 * subsystems, a bridge is setup between the hdmi-lpe-audio and i915:
45 * the hdmi-lpe-audio driver probes the lpe audio device and creates a new
50 * uninstall the hdmi-lpe-audio driver before uninstalling i915 module,
51 * otherwise we might run into use-after-free issues after i915 removes the
52 * platform device: even though hdmi-lpe-audio driver is released, the modules
80 #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->display.audio.lpe.platdev != NULL)
85 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); in lpe_audio_platdev_create()
93 return ERR_PTR(-ENOMEM); in lpe_audio_platdev_create()
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/linux-6.14.4/drivers/gpu/drm/i915/soc/
Dintel_pch.c1 // SPDX-License-Identifier: MIT
16 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); in intel_pch_type()
17 drm_WARN_ON(&dev_priv->drm, GRAPHICS_VER(dev_priv) != 5); in intel_pch_type()
20 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); in intel_pch_type()
21 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
25 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); in intel_pch_type()
26 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
31 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); in intel_pch_type()
32 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
34 drm_WARN_ON(&dev_priv->drm, in intel_pch_type()
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/linux-6.14.4/Documentation/netlink/specs/
Drt_link.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
3 name: rt-link
4 protocol: netlink-raw
11 -
12 name: ifinfo-flags
15 -
17 -
19 -
21 -
23 -
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/linux-6.14.4/drivers/gpu/drm/bridge/cadence/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Cadence DPI/DSI bridge"
11 Support Cadence DPI to DSI bridge. This is an internal
12 bridge and is meant to be directly embedded in a SoC.
25 tristate "Cadence DPI/DP bridge"
33 Support Cadence DPI to DP bridge. This is an internal
34 bridge and is meant to be directly embedded in a SoC.
47 initializes the J721E Display Port and sets up the

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