1 // SPDX-License-Identifier: MIT
16 		drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n");  in intel_pch_type()
17 		drm_WARN_ON(&dev_priv->drm, GRAPHICS_VER(dev_priv) != 5);  in intel_pch_type()
20 		drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n");  in intel_pch_type()
21 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
25 		drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n");  in intel_pch_type()
26 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
31 		drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n");  in intel_pch_type()
32 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
34 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
38 		drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n");  in intel_pch_type()
39 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
41 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
45 		drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n");  in intel_pch_type()
46 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
48 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
53 		drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n");  in intel_pch_type()
54 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
56 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
61 		drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n");  in intel_pch_type()
62 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
66 		drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n");  in intel_pch_type()
67 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
74 		drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n");  in intel_pch_type()
75 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
83 		drm_dbg_kms(&dev_priv->drm, "Found Cannon Lake PCH (CNP)\n");  in intel_pch_type()
84 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
89 		drm_dbg_kms(&dev_priv->drm,  in intel_pch_type()
90 			    "Found Cannon Lake LP PCH (CNP-LP)\n");  in intel_pch_type()
91 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
97 		drm_dbg_kms(&dev_priv->drm, "Found Comet Lake PCH (CMP)\n");  in intel_pch_type()
98 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
105 		drm_dbg_kms(&dev_priv->drm, "Found Comet Lake V PCH (CMP-V)\n");  in intel_pch_type()
106 		drm_WARN_ON(&dev_priv->drm,  in intel_pch_type()
109 		/* CMP-V is based on KBP, which is SPT compatible */  in intel_pch_type()
113 		drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n");  in intel_pch_type()
114 		drm_WARN_ON(&dev_priv->drm, !IS_ICELAKE(dev_priv));  in intel_pch_type()
117 		drm_dbg_kms(&dev_priv->drm, "Found Mule Creek Canyon PCH\n");  in intel_pch_type()
118 		drm_WARN_ON(&dev_priv->drm, !(IS_JASPERLAKE(dev_priv) ||  in intel_pch_type()
124 		drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n");  in intel_pch_type()
125 		drm_WARN_ON(&dev_priv->drm, !IS_TIGERLAKE(dev_priv) &&  in intel_pch_type()
133 		drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n");  in intel_pch_type()
134 		drm_WARN_ON(&dev_priv->drm, !(IS_JASPERLAKE(dev_priv) ||  in intel_pch_type()
142 		drm_dbg_kms(&dev_priv->drm, "Found Alder Lake PCH\n");  in intel_pch_type()
143 		drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) &&  in intel_pch_type()
169 	 * setup where the ISA bridge is not able to be passed through.  in intel_virt_detect_pch()
170 	 * In this case, a south bridge can be emulated and we have to  in intel_virt_detect_pch()
197 		drm_dbg_kms(&dev_priv->drm, "Assuming PCH ID %04x\n", id);  in intel_virt_detect_pch()
199 		drm_dbg_kms(&dev_priv->drm, "Assuming no PCH\n");  in intel_virt_detect_pch()
204 	if (drm_WARN_ON(&dev_priv->drm,  in intel_virt_detect_pch()
218 	 * South display engine on the same PCI device: just assign the fake  in intel_detect_pch()
222 		dev_priv->pch_type = PCH_LNL;  in intel_detect_pch()
226 		 * Both north display and south display are on the SoC die.  in intel_detect_pch()
227 		 * The real PCH (if it even exists) is uninvolved in display.  in intel_detect_pch()
229 		dev_priv->pch_type = PCH_MTL;  in intel_detect_pch()
232 		dev_priv->pch_type = PCH_DG2;  in intel_detect_pch()
235 		dev_priv->pch_type = PCH_DG1;  in intel_detect_pch()
240 	 * The reason to probe ISA bridge instead of Dev31:Fun0 is to  in intel_detect_pch()
242 	 * need to expose ISA bridge to let driver know the real hardware  in intel_detect_pch()
246 	 * ISA bridge in the system. To work reliably, we should scan trhough  in intel_detect_pch()
247 	 * all the ISA bridge devices and check for the first match, instead  in intel_detect_pch()
251 		if (pch->vendor != PCI_VENDOR_ID_INTEL)  in intel_detect_pch()
254 		id = pch->device & INTEL_PCH_DEVICE_ID_MASK;  in intel_detect_pch()
258 			dev_priv->pch_type = pch_type;  in intel_detect_pch()
259 			dev_priv->pch_id = id;  in intel_detect_pch()
261 		} else if (intel_is_virt_pch(id, pch->subsystem_vendor,  in intel_detect_pch()
262 					     pch->subsystem_device)) {  in intel_detect_pch()
264 			dev_priv->pch_type = pch_type;  in intel_detect_pch()
265 			dev_priv->pch_id = id;  in intel_detect_pch()
271 	 * Use PCH_NOP (PCH but no South Display) for PCH platforms without  in intel_detect_pch()
272 	 * display.  in intel_detect_pch()
275 		drm_dbg_kms(&dev_priv->drm,  in intel_detect_pch()
276 			    "Display disabled, reverting to NOP PCH\n");  in intel_detect_pch()
277 		dev_priv->pch_type = PCH_NOP;  in intel_detect_pch()
278 		dev_priv->pch_id = 0;  in intel_detect_pch()
282 			dev_priv->pch_type = pch_type;  in intel_detect_pch()
283 			dev_priv->pch_id = id;  in intel_detect_pch()
285 			drm_dbg_kms(&dev_priv->drm, "No PCH found.\n");  in intel_detect_pch()