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/linux-6.14.4/Documentation/devicetree/bindings/mfd/
Dgoogle,cros-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benson Leung <[email protected]>
11 - Guenter Roeck <[email protected]>
14 Google's ChromeOS EC is a microcontroller which talks to the AP and
16 The EC can be connected through various interfaces (I2C, SPI, and others)
22 - description:
23 For implementations of the EC connected through I2C.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/i2c/
Dgoogle,cros-ec-i2c-tunnel.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $id: http://devicetree.org/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: I2C bus that tunnels through the ChromeOS EC (cros-ec)
11 - Doug Anderson <[email protected]>
12 - Benson Leung <[email protected]>
15 On some ChromeOS board designs we've got a connection to the EC
17 other side of the EC (like a battery and PMIC). To get access to
18 those devices we need to tunnel our i2c commands through the EC.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/display/bridge/
Dgoogle,cros-ec-anx7688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/google,cros-ec-anx7688.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC ANX7688 HDMI to DP Converter through Type-C Port
10 - Nicolas Boichat <[email protected]>
13 ChromeOS EC ANX7688 is a display bridge that converts HDMI 2.0 to
14 DisplayPort 1.3 Ultra-HDi (4096x2160p60). It is an Analogix ANX7688 chip
16 (See google,cros-ec.yaml). It is accessed using I2C tunneling through
17 the EC and therefore its node should be a child of an EC I2C tunnel node
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/extcon/
Dextcon-usbc-cros-ec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/extcon/extcon-usbc-cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC USB Type-C cable and accessories detection
10 - Benson Leung <[email protected]>
16 The node for this device must be under a cros-ec node like google,cros-ec-spi
17 or google,cros-ec-i2c.
21 const: google,extcon-usbc-cros-ec
23 google,usb-port-id:
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsc7280-idp-ec-h1.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 EC/H1 over SPI (common between IDP2 and CRD)
11 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
12 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
14 cros_ec: ec@0 {
15 compatible = "google,cros-ec-spi";
17 interrupt-parent = <&tlmm>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&ap_ec_int_l>;
21 spi-max-frequency = <3000000>;
[all …]
Dsc7280-herobrine.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
[all …]
Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
/linux-6.14.4/drivers/i2c/busses/
Di2c-cros-ec-tunnel.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Expose an I2C passthrough to the ChromeOS EC.
8 #include <linux/i2c.h>
17 * struct ec_i2c_device - Driver data for I2C tunnel
20 * @adap: I2C adapter
21 * @ec: Pointer to EC device
22 * @remote_bus: The EC bus number we tunnel to on the other side.
30 struct cros_ec_device *ec; member
39 * ec_i2c_count_message - Count bytes needed for ec_i2c_construct_message
41 * @i2c_msgs: The i2c messages to read
[all …]
/linux-6.14.4/arch/arm/boot/dts/rockchip/
Drk3288-veyron-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-edp.dtsi"
14 #include "rk3288-veyron-sdmmc.dtsi"
22 gpio-charger {
23 compatible = "gpio-charger";
24 charger-type = "mains";
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
[all …]
Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
15 /* EC turns on w/ pp900_ap_en; always on for AP */
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
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/linux-6.14.4/drivers/platform/chrome/
Dcros_ec_i2c.c1 // SPDX-License-Identifier: GPL-2.0
2 // I2C interface for ChromeOS Embedded Controller
10 #include <linux/i2c.h>
22 * byte 1-8 struct ec_host_request
23 * byte 10- response data
36 * byte 2-9 struct ec_host_response
37 * byte 10- response data
55 struct i2c_client *client = ec_dev->priv; in cros_ec_pkt_xfer_i2c()
56 int ret = -ENOMEM; in cros_ec_pkt_xfer_i2c()
69 i2c_msg[0].addr = client->addr; in cros_ec_pkt_xfer_i2c()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 If you have an ACPI-compatible Chromebook, say Y or M here.
31 depends on I2C && DMI && X86
33 This driver instantiates i2c and smbus devices such as
47 The range of memory used is 0xf00000-0x1000000, traditionally
67 depends on I2C
73 devices that have multiple drop-in options for one component.
81 Controller (EC) providing keyboard, battery and power services.
83 protocol for talking to the EC is defined by the bus driver.
89 tristate "ChromeOS Embedded Controller (I2C)"
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Dcros_ec_spi.c1 // SPDX-License-Identifier: GPL-2.0
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
34 * Allow for a long time for the EC to respond. We support i2c
43 * not directly passing i2c through, but it's too late for that for
50 * for this, clocking in at 2-3ms.
57 * If we go too fast, the EC will miss the transaction. We know that we
58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
64 * struct cros_ec_spi - information about a SPI-connected EC
[all …]
/linux-6.14.4/drivers/gpu/drm/bridge/
Dcros-ec-anx7688.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * CrOS EC ANX7688 HDMI->DP bridge driver
10 #include <linux/i2c.h>
58 if (!anx->filter) in cros_ec_anx7688_bridge_mode_fixup()
62 ret = regmap_bulk_read(anx->regmap, ANX7688_DP_BANDWIDTH_REG, regs, 2); in cros_ec_anx7688_bridge_mode_fixup()
81 requiredbw = mode->clock * 8 * 3; in cros_ec_anx7688_bridge_mode_fixup()
100 struct device *dev = &client->dev; in cros_ec_anx7688_bridge_probe()
108 return -ENOMEM; in cros_ec_anx7688_bridge_probe()
110 anx7688->client = client; in cros_ec_anx7688_bridge_probe()
113 anx7688->regmap = devm_regmap_init_i2c(client, &cros_ec_anx7688_regmap_config); in cros_ec_anx7688_bridge_probe()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
Dmt8183-kukui.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <&reg_vsys>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
[all …]
Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
[all …]
Dmt8186-corsola.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
26 stdout-path = "serial0:115200n8";
35 backlight_lcd0: backlight-lcd0 {
36 compatible = "pwm-backlight";
[all …]
Dmt8188-geralt.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
23 backlight_lcd0: backlight-lcd0 {
24 compatible = "pwm-backlight";
25 brightness-levels = <0 1023>;
26 default-brightness-level = <576>;
27 enable-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
28 num-interpolated-steps = <1023>;
29 power-supply = <&ppvar_sys>;
[all …]
/linux-6.14.4/include/linux/platform_data/
Dcros_ec_proto.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 * The EC is unresponsive for a time after a reboot command. Add a
35 * Max bus-specific overhead incurred by request/responses.
36 * I2C requires 1 additional byte for requests.
37 * I2C requires 2 additional bytes for responses.
50 * EC panic is not covered by the standard (0-F) ACPI notify values.
51 * Arbitrarily choosing B0 to notify ec panic, which is in the 84-BF
57 * Command interface between EC and AP, for LPC, I2C and SPI interfaces.
74 * struct cros_ec_command - Information about a ChromeOS EC command.
78 * @insize: Max number of bytes to accept from the EC.
[all …]
/linux-6.14.4/arch/arm/boot/dts/nvidia/
Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
8 rtc0 = "/i2c@7000d000/pmic@40";
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
34 /delete-node/ memory@80000000;
40 vdd-supply = <&vdd_3v3_hdmi>;
41 pll-supply = <&vdd_hdmi_pll>;
[all …]
/linux-6.14.4/drivers/input/keyboard/
Dcros_ec_keyb.c1 // SPDX-License-Identifier: GPL-2.0
2 // ChromeOS EC keyboard driver
6 // This driver uses the ChromeOS EC byte-level message-based protocol for
7 // communicating the keyboard state (which keys are pressed) from a keyboard EC
8 // to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
10 // motivation for this is to keep the EC firmware as simple as possible, since
11 // it cannot be easily upgraded and EC flash/IRAM space is relatively
17 #include <linux/i2c.h>
19 #include <linux/input/vivaldi-fmap.h>
33 * struct cros_ec_keyb - Structure representing EC keyboard device
[all …]
/linux-6.14.4/arch/arm/boot/dts/samsung/
Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]

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