Lines Matching +full:cros +full:- +full:ec +full:- +full:i2c
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
39 num-interpolated-steps = <1023>;
40 default-brightness-level = <576>;
43 dmic_codec: dmic-codec {
44 compatible = "dmic-codec";
45 num-channels = <2>;
46 wakeup-delay-ms = <50>;
49 pp1000_dpbrdg: regulator-1v0-dpbrdg {
50 compatible = "regulator-fixed";
51 regulator-name = "pp1000_dpbrdg";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
54 regulator-min-microvolt = <1000000>;
55 regulator-max-microvolt = <1000000>;
56 enable-active-high;
57 regulator-boot-on;
59 vin-supply = <&mt6359_vs2_buck_reg>;
62 pp1000_mipibrdg: regulator-1v0-mipibrdg {
63 compatible = "regulator-fixed";
64 regulator-name = "pp1000_mipibrdg";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
67 regulator-min-microvolt = <1000000>;
68 regulator-max-microvolt = <1000000>;
69 enable-active-high;
70 regulator-boot-on;
72 vin-supply = <&mt6359_vs2_buck_reg>;
75 pp1800_dpbrdg: regulator-1v8-dpbrdg {
76 compatible = "regulator-fixed";
77 regulator-name = "pp1800_dpbrdg";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
80 enable-active-high;
81 regulator-boot-on;
83 vin-supply = <&mt6359_vio18_ldo_reg>;
87 pp1800_ldo_g: regulator-1v8-g {
88 compatible = "regulator-fixed";
89 regulator-name = "pp1800_ldo_g";
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&pp3300_g>;
97 pp1800_mipibrdg: regulator-1v8-mipibrdg {
98 compatible = "regulator-fixed";
99 regulator-name = "pp1800_mipibrdg";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
102 enable-active-high;
103 regulator-boot-on;
105 vin-supply = <&mt6359_vio18_ldo_reg>;
108 pp3300_dpbrdg: regulator-3v3-dpbrdg {
109 compatible = "regulator-fixed";
110 regulator-name = "pp3300_dpbrdg";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
113 enable-active-high;
114 regulator-boot-on;
116 vin-supply = <&pp3300_g>;
120 pp3300_g: regulator-3v3-g {
121 compatible = "regulator-fixed";
122 regulator-name = "pp3300_g";
123 regulator-always-on;
124 regulator-boot-on;
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 vin-supply = <&ppvar_sys>;
131 pp3300_ldo_z: regulator-3v3-z {
132 compatible = "regulator-fixed";
133 regulator-name = "pp3300_ldo_z";
134 regulator-always-on;
135 regulator-boot-on;
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 vin-supply = <&ppvar_sys>;
141 pp3300_mipibrdg: regulator-3v3-mipibrdg {
142 compatible = "regulator-fixed";
143 regulator-name = "pp3300_mipibrdg";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
146 enable-active-high;
147 regulator-boot-on;
149 vin-supply = <&pp3300_g>;
150 off-on-delay-us = <500000>;
154 pp3300_u: regulator-3v3-u {
155 compatible = "regulator-fixed";
156 regulator-name = "pp3300_u";
157 regulator-always-on;
158 regulator-boot-on;
159 regulator-min-microvolt = <3300000>;
160 regulator-max-microvolt = <3300000>;
161 /* enable pin wired to GPIO controlled by EC */
162 vin-supply = <&pp3300_g>;
165 pp3300_wlan: regulator-3v3-wlan {
166 compatible = "regulator-fixed";
167 regulator-name = "pp3300_wlan";
168 regulator-always-on;
169 regulator-boot-on;
170 regulator-min-microvolt = <3300000>;
171 regulator-max-microvolt = <3300000>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pp3300_wlan_pins>;
174 enable-active-high;
179 pp5000_a: regulator-5v0-a {
180 compatible = "regulator-fixed";
181 regulator-name = "pp5000_a";
182 regulator-always-on;
183 regulator-boot-on;
184 regulator-min-microvolt = <5000000>;
185 regulator-max-microvolt = <5000000>;
186 vin-supply = <&ppvar_sys>;
189 /* system wide semi-regulated power rail from battery or USB */
190 ppvar_sys: regulator-var-sys {
191 compatible = "regulator-fixed";
192 regulator-name = "ppvar_sys";
193 regulator-always-on;
194 regulator-boot-on;
197 reserved_memory: reserved-memory {
198 #address-cells = <2>;
199 #size-cells = <2>;
203 compatible = "shared-dma-pool";
205 no-map;
209 compatible = "restricted-dma-pool";
214 rt1015p: audio-codec {
216 pinctrl-names = "default";
217 pinctrl-0 = <&rt1015p_pins>;
218 sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>;
219 #sound-dai-cells = <0>;
224 pinctrl-names = "aud_clk_mosi_off",
250 pinctrl-0 = <&aud_clk_mosi_off_pins>;
251 pinctrl-1 = <&aud_clk_mosi_on_pins>;
252 pinctrl-2 = <&aud_dat_mosi_off_pins>;
253 pinctrl-3 = <&aud_dat_mosi_on_pins>;
254 pinctrl-4 = <&aud_dat_miso_off_pins>;
255 pinctrl-5 = <&aud_dat_miso_on_pins>;
256 pinctrl-6 = <&vow_dat_miso_off_pins>;
257 pinctrl-7 = <&vow_dat_miso_on_pins>;
258 pinctrl-8 = <&vow_clk_miso_off_pins>;
259 pinctrl-9 = <&vow_clk_miso_on_pins>;
260 pinctrl-10 = <&aud_nle_mosi_off_pins>;
261 pinctrl-11 = <&aud_nle_mosi_on_pins>;
262 pinctrl-12 = <&aud_dat_miso2_off_pins>;
263 pinctrl-13 = <&aud_dat_miso2_on_pins>;
264 pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
265 pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
266 pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
267 pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
268 pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
269 pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
270 pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
271 pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
272 pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
273 pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
274 pinctrl-24 = <&aud_gpio_tdm_off_pins>;
275 pinctrl-25 = <&aud_gpio_tdm_on_pins>;
284 remote-endpoint = <&anx7625_in>;
288 mediatek,broken-save-restore-fw;
292 mali-supply = <&mt6315_7_vbuck1>;
299 clock-frequency = <400000>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&i2c0_pins>;
305 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&touchscreen_pins>;
314 clock-frequency = <400000>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c1_pins>;
318 rt5682: audio-codec@1a {
321 interrupts-extended = <&pio 18 IRQ_TYPE_LEVEL_LOW>;
322 realtek,jd-src = <1>;
323 #sound-dai-cells = <1>;
325 AVDD-supply = <&mt6359_vio18_ldo_reg>;
326 DBVDD-supply = <&mt6359_vio18_ldo_reg>;
327 LDO1-IN-supply = <&mt6359_vio18_ldo_reg>;
328 MICVDD-supply = <&pp3300_g>;
335 clock-frequency = <400000>;
336 clock-stretch-ns = <12600>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&i2c2_pins>, <&trackpad_pins>;
343 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
344 vcc-supply = <&pp3300_u>;
345 wakeup-source;
352 clock-frequency = <400000>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&i2c3_pins>;
359 pinctrl-names = "default";
360 pinctrl-0 = <&anx7625_pins>;
361 enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
362 reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
363 vdd10-supply = <&pp1000_mipibrdg>;
364 vdd18-supply = <&pp1800_mipibrdg>;
365 vdd33-supply = <&pp3300_mipibrdg>;
368 #address-cells = <1>;
369 #size-cells = <0>;
375 remote-endpoint = <&dsi_out>;
383 remote-endpoint = <&panel_in>;
388 aux-bus {
390 compatible = "edp-panel";
391 power-supply = <&pp3300_mipibrdg>;
396 remote-endpoint = <&anx7625_out>;
407 clock-frequency = <400000>;
408 pinctrl-names = "default";
409 pinctrl-0 = <&i2c7_pins>;
413 domain-supply = <&mt6315_7_vbuck1>;
417 domain-supply = <&mt6359_vsram_others_ldo_reg>;
427 pinctrl-names = "default", "state_uhs";
428 pinctrl-0 = <&mmc0_default_pins>;
429 pinctrl-1 = <&mmc0_uhs_pins>;
430 bus-width = <8>;
431 max-frequency = <200000000>;
432 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
433 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
434 cap-mmc-highspeed;
435 mmc-hs200-1_8v;
436 mmc-hs400-1_8v;
437 supports-cqe;
438 cap-mmc-hw-reset;
439 mmc-hs400-enhanced-strobe;
440 hs400-ds-delay = <0x12814>;
441 no-sdio;
442 no-sd;
443 non-removable;
449 pinctrl-names = "default", "state_uhs";
450 pinctrl-0 = <&mmc1_default_pins>;
451 pinctrl-1 = <&mmc1_uhs_pins>;
452 bus-width = <4>;
453 max-frequency = <200000000>;
454 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
455 vmmc-supply = <&mt6360_ldo5_reg>;
456 vqmmc-supply = <&mt6360_ldo3_reg>;
457 cap-sd-highspeed;
458 sd-uhs-sdr50;
459 sd-uhs-sdr104;
460 no-sdio;
461 no-mmc;
466 regulator-always-on;
470 regulator-always-on;
471 regulator-min-microvolt = <575000>;
472 regulator-max-microvolt = <575000>;
476 regulator-always-on;
480 regulator-min-microvolt = <750000>;
481 regulator-max-microvolt = <800000>;
482 regulator-coupled-with = <&mt6315_7_vbuck1>;
483 regulator-coupled-max-spread = <10000>;
487 regulator-always-on;
491 mediatek,dmic-mode = <1>; /* one-wire */
492 mediatek,mic-type-0 = <2>; /* DMIC */
493 mediatek,mic-type-2 = <2>; /* DMIC */
499 pinctrl-names = "default";
500 pinctrl-0 = <&nor_flash_pins>;
501 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
502 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
505 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
507 spi-max-frequency = <52000000>;
508 spi-rx-bus-width = <2>;
509 spi-tx-bus-width = <2>;
514 pinctrl-names = "default";
515 pinctrl-0 = <&pcie_pins>;
520 num-lanes = <1>;
521 bus-range = <0x1 0x1>;
523 #address-cells = <3>;
524 #size-cells = <2>;
530 memory-region = <&wifi_restricted_dma_region>;
537 gpio-line-names = "I2S_DP_LRCK",
762 anx7625_pins: anx7625-default-pins {
763 pins-out {
766 output-low;
769 pins-in {
771 input-enable;
772 bias-pull-up;
776 aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
777 pins-mosi-off {
783 aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
784 pins-mosi-on {
787 drive-strength = <10>;
791 aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
792 pins-miso-off {
797 aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
798 pins-miso-on {
803 aud_dat_miso_off_pins: aud-dat-miso-off-pins {
804 pins-miso-off {
810 aud_dat_miso_on_pins: aud-dat-miso-on-pins {
811 pins-miso-on {
814 drive-strength = <10>;
818 aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
819 pins-miso-off {
824 aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
825 pins-miso-on {
830 aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
831 pins-mosi-off {
836 aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
837 pins-mosi-on {
842 aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
843 pins-mosi-off {
849 aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
850 pins-mosi-on {
853 drive-strength = <10>;
857 aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
858 pins-i2s3-off {
865 aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
866 pins-i2s3-on {
873 aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
874 pins-i2s8-off {
882 aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
883 pins-i2s8-on {
891 aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
892 pins-i2s9-off {
897 aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
898 pins-i2s9-on {
903 aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
904 pins-tdm-off {
912 aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
913 pins-tdm-on {
921 aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
922 pins-nle-mosi-off {
928 aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
929 pins-nle-mosi-on {
935 cr50_int: cr50-irq-default-pins {
936 pins-gsc-ap-int-odl {
938 input-enable;
942 cros_ec_int: cros-ec-irq-default-pins {
943 pins-ec-ap-int-odl {
945 input-enable;
946 bias-pull-up;
950 i2c0_pins: i2c0-default-pins {
951 pins-bus {
954 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
955 drive-strength-microamp = <1000>;
959 i2c1_pins: i2c1-default-pins {
960 pins-bus {
963 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
964 drive-strength-microamp = <1000>;
968 i2c2_pins: i2c2-default-pins {
969 pins-bus {
972 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
976 i2c3_pins: i2c3-default-pins {
977 pins-bus {
980 bias-disable;
981 drive-strength-microamp = <1000>;
985 i2c7_pins: i2c7-default-pins {
986 pins-bus {
989 bias-disable;
990 drive-strength-microamp = <1000>;
994 mmc0_default_pins: mmc0-default-pins {
995 pins-cmd-dat {
1005 input-enable;
1006 drive-strength = <8>;
1007 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1010 pins-clk {
1012 drive-strength = <8>;
1013 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1016 pins-rst {
1018 drive-strength = <8>;
1019 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1023 mmc0_uhs_pins: mmc0-uhs-pins {
1024 pins-cmd-dat {
1034 input-enable;
1035 drive-strength = <10>;
1036 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1039 pins-clk {
1041 drive-strength = <10>;
1042 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1045 pins-rst {
1047 drive-strength = <8>;
1048 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1051 pins-ds {
1053 drive-strength = <10>;
1054 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1058 mmc1_default_pins: mmc1-default-pins {
1059 pins-cmd-dat {
1065 input-enable;
1066 drive-strength = <8>;
1067 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1070 pins-clk {
1072 drive-strength = <8>;
1073 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1076 pins-insert {
1078 input-enable;
1079 bias-pull-up;
1083 mmc1_uhs_pins: mmc1-uhs-pins {
1084 pins-cmd-dat {
1090 input-enable;
1091 drive-strength = <8>;
1092 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1095 pins-clk {
1097 input-enable;
1098 drive-strength = <8>;
1099 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1103 nor_flash_pins: nor-flash-default-pins {
1104 pins-cs-io1 {
1107 input-enable;
1108 bias-pull-up;
1109 drive-strength = <10>;
1112 pins-io0 {
1114 bias-pull-up;
1115 drive-strength = <10>;
1118 pins-clk {
1120 input-enable;
1121 bias-pull-up;
1122 drive-strength = <10>;
1126 pcie_pins: pcie-default-pins {
1127 pins-pcie-wake {
1129 bias-pull-up;
1132 pins-pcie-pereset {
1136 pins-pcie-clkreq {
1138 bias-pull-up;
1141 pins-wifi-kill {
1143 output-high;
1147 pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
1148 pins-en {
1150 output-low;
1154 pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
1155 pins-en {
1157 output-low;
1161 pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
1162 pins-en {
1164 output-low;
1168 pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
1169 pins-en {
1171 output-low;
1175 pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
1176 pins-en {
1178 output-low;
1182 pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
1183 pins-en {
1185 output-low;
1189 pp3300_wlan_pins: pp3300-wlan-pins {
1190 pins-pcie-en-pp3300-wlan {
1192 output-high;
1196 pwm0_pins: pwm0-default-pins {
1197 pins-pwm {
1201 pins-inhibit {
1203 output-high;
1207 rt1015p_pins: rt1015p-default-pins {
1210 output-low;
1214 scp_pins: scp-pins {
1215 pins-vreq-vao {
1220 spi1_pins: spi1-default-pins {
1221 pins-cs-mosi-clk {
1225 bias-disable;
1228 pins-miso {
1230 bias-pull-down;
1234 spi5_pins: spi5-default-pins {
1235 pins-bus {
1240 bias-disable;
1244 trackpad_pins: trackpad-default-pins {
1245 pins-int-n {
1247 input-enable;
1248 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
1252 touchscreen_pins: touchscreen-default-pins {
1253 pins-irq {
1255 input-enable;
1256 bias-pull-up;
1259 pins-reset {
1261 output-high;
1264 pins-report-sw {
1266 output-low;
1270 vow_clk_miso_off_pins: vow-clk-miso-off-pins {
1271 pins-miso-off {
1276 vow_clk_miso_on_pins: vow-clk-miso-on-pins {
1277 pins-miso-on {
1282 vow_dat_miso_off_pins: vow-dat-miso-off-pins {
1283 pins-miso-off {
1288 vow_dat_miso_on_pins: vow-dat-miso-on-pins {
1289 pins-miso-on {
1296 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
1302 pinctrl-names = "default";
1303 pinctrl-0 = <&pwm0_pins>;
1309 firmware-name = "mediatek/mt8192/scp.img";
1310 memory-region = <&scp_mem_reserved>;
1311 pinctrl-names = "default";
1312 pinctrl-0 = <&scp_pins>;
1314 cros-ec-rpmsg {
1315 compatible = "google,cros-ec-rpmsg";
1316 mediatek,rpmsg-name = "cros-ec-rpmsg";
1323 mediatek,pad-select = <0>;
1324 pinctrl-names = "default";
1325 pinctrl-0 = <&spi1_pins>;
1327 cros_ec: ec@0 {
1328 compatible = "google,cros-ec-spi";
1330 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
1331 spi-max-frequency = <3000000>;
1332 pinctrl-names = "default";
1333 pinctrl-0 = <&cros_ec_int>;
1334 wakeup-source;
1336 #address-cells = <1>;
1337 #size-cells = <0>;
1340 compatible = "google,cros-ec-pwm";
1341 #pwm-cells = <1>;
1346 i2c_tunnel: i2c-tunnel {
1347 compatible = "google,cros-ec-i2c-tunnel";
1348 google,remote-bus = <0>;
1349 #address-cells = <1>;
1350 #size-cells = <0>;
1354 compatible = "google,cros-ec-regulator";
1356 regulator-min-microvolt = <1800000>;
1357 regulator-max-microvolt = <3300000>;
1361 compatible = "google,cros-ec-regulator";
1363 regulator-min-microvolt = <3300000>;
1364 regulator-max-microvolt = <3300000>;
1368 compatible = "google,cros-ec-typec";
1369 #address-cells = <1>;
1370 #size-cells = <0>;
1373 compatible = "usb-c-connector";
1376 power-role = "dual";
1377 data-role = "host";
1378 try-power-role = "source";
1382 compatible = "usb-c-connector";
1385 power-role = "dual";
1386 data-role = "host";
1387 try-power-role = "source";
1396 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
1397 mediatek,pad-select = <0>;
1398 pinctrl-names = "default";
1399 pinctrl-0 = <&spi5_pins>;
1404 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
1405 spi-max-frequency = <1000000>;
1406 pinctrl-names = "default";
1407 pinctrl-0 = <&cr50_int>;
1412 #address-cells = <2>;
1413 #size-cells = <0>;
1416 compatible = "mediatek,mt6315-regulator";
1421 regulator-name = "Vbcpu";
1422 regulator-min-microvolt = <400000>;
1423 regulator-max-microvolt = <1193750>;
1424 regulator-enable-ramp-delay = <256>;
1425 regulator-allowed-modes = <0 1 2>;
1426 regulator-always-on;
1430 regulator-name = "Vlcpu";
1431 regulator-min-microvolt = <400000>;
1432 regulator-max-microvolt = <1193750>;
1433 regulator-enable-ramp-delay = <256>;
1434 regulator-allowed-modes = <0 1 2>;
1435 regulator-always-on;
1441 compatible = "mediatek,mt6315-regulator";
1446 regulator-name = "Vgpu";
1447 regulator-min-microvolt = <400000>;
1448 regulator-max-microvolt = <800000>;
1449 regulator-enable-ramp-delay = <256>;
1450 regulator-allowed-modes = <0 1 2>;
1451 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
1452 regulator-coupled-max-spread = <10000>;
1465 wakeup-source;
1466 vusb33-supply = <&pp3300_g>;
1467 vbus-supply = <&pp5000_a>;
1470 #include <arm/cros-ec-keyboard.dtsi>
1471 #include <arm/cros-ec-sbs.dtsi>