/linux-6.14.4/Documentation/arch/loongarch/ |
D | irq-chip-model.rst | 8 with LS7A chipsets. The irq chips in LoongArch computers include CPUINTC (CPU Core 14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package 23 to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices 25 to LIOINTC, and then CPUINTC:: 28 | IPI | --> | CPUINTC | <-- | Timer | 60 to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices 62 to CPUINTC directly:: 65 | IPI | --> | CPUINTC | <-- | Timer | 92 go to CPUINTC directly, CPU UARTS interrupts go to PCH-PIC, while all other 94 Extended I/O Interrupt Controller), and then go to CPUINTC directly:: [all …]
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/linux-6.14.4/arch/mips/boot/dts/realtek/ |
D | rtl83xx.dtsi | 12 cpuintc: cpuintc { label 31 interrupt-parent = <&cpuintc>; 48 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/arch/mips/boot/dts/ralink/ |
D | mt7620a.dtsi | 13 cpuintc: cpuintc { label 40 interrupt-parent = <&cpuintc>;
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D | rt2880.dtsi | 13 cpuintc: cpuintc { label 40 interrupt-parent = <&cpuintc>;
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D | rt3883.dtsi | 13 cpuintc: cpuintc { label 40 interrupt-parent = <&cpuintc>;
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D | rt3050.dtsi | 13 cpuintc: cpuintc { label 40 interrupt-parent = <&cpuintc>;
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D | mt7628a.dtsi | 24 cpuintc: interrupt-controller { label 160 interrupt-parent = <&cpuintc>; 293 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/Documentation/translations/zh_CN/arch/loongarch/ |
D | irq-chip-model.rst | 31 | IPI | --> | CPUINTC | <-- | Timer | 67 | IPI | --> | CPUINTC | <-- | Timer | 98 | IPI |--> | CPUINTC(0-255vcpu)| <-- | Timer | 154 | IPI | --> | CPUINTC | <-- | Timer | 180 CPUINTC:: 238 - CPUINTC:即《龙芯架构参考手册卷一》第7.4节所描述的CSR.ECFG/CSR.ESTAT寄存器及其
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/linux-6.14.4/Documentation/translations/zh_TW/arch/loongarch/ |
D | irq-chip-model.rst | 31 | IPI | --> | CPUINTC | <-- | Timer | 67 | IPI | --> | CPUINTC | <-- | Timer | 93 CPUINTC:: 151 - CPUINTC:即《龍芯架構參考手冊卷一》第7.4節所描述的CSR.ECFG/CSR.ESTAT寄存器及其
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/ |
D | google,goldfish-pic.txt | 14 cpuintc { 28 interrupt-parent = <&cpuintc>;
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D | qca,ath79-misc-intc.txt | 27 interrupt-parent = <&cpuintc>; 40 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/arch/mips/boot/dts/qca/ |
D | ar9132.dtsi | 22 cpuintc: interrupt-controller { label 40 interrupt-parent = <&cpuintc>; 116 interrupt-parent = <&cpuintc>;
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D | ar9331.dtsi | 22 cpuintc: interrupt-controller { label 44 interrupt-parent = <&cpuintc>; 104 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/arch/mips/boot/dts/loongson/ |
D | loongson64g-package.dtsi | 9 cpuintc: interrupt-controller { label 31 interrupt-parent = <&cpuintc>;
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D | loongson64c-package.dtsi | 9 cpuintc: interrupt-controller { label 34 interrupt-parent = <&cpuintc>;
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D | loongson64v_4core_virtio.dts | 11 cpuintc: interrupt-controller { label 33 interrupt-parent = <&cpuintc>;
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D | loongson64-2k1000.dtsi | 32 cpuintc: interrupt-controller { label 69 interrupt-parent = <&cpuintc>; 89 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/arch/loongarch/boot/dts/ |
D | loongson-2k0500.dtsi | 34 cpuintc: interrupt-controller { label 135 interrupt-parent = <&cpuintc>; 153 interrupt-parent = <&cpuintc>; 168 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/arch/mips/boot/dts/mscc/ |
D | luton.dtsi | 25 cpuintc: interrupt-controller { label 64 interrupt-parent = <&cpuintc>;
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D | serval.dtsi | 28 cpuintc: interrupt-controller { label 67 interrupt-parent = <&cpuintc>;
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D | jaguar2.dtsi | 29 cpuintc: interrupt-controller { label 68 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/arch/mips/boot/dts/xilfpga/ |
D | nexys4ddr.dts | 22 cpuintc: interrupt-controller { label 37 interrupt-parent = <&cpuintc>;
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/linux-6.14.4/drivers/irqchip/ |
D | irq-loongarch-cpu.c | 69 .name = "CPUINTC", 163 cpuintc_handle = irq_domain_alloc_named_fwnode("CPUINTC"); in cpuintc_acpi_init()
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/linux-6.14.4/arch/mips/boot/dts/ingenic/ |
D | x1830.dtsi | 25 cpuintc: interrupt-controller { label 39 interrupt-parent = <&cpuintc>; 92 interrupt-parent = <&cpuintc>;
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D | x1000.dtsi | 25 cpuintc: interrupt-controller { label 39 interrupt-parent = <&cpuintc>; 99 interrupt-parent = <&cpuintc>;
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