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Searched full:cmu_mif (Results 1 – 11 of 11) sorted by relevance

/linux-6.14.4/arch/arm64/boot/dts/exynos/
Dexynos5433-tm2.dts26 <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
35 <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
40 <&cmu_mif CLK_ACLK_DISP_333>,
41 <&cmu_mif CLK_SCLK_DSIM0_DISP>,
43 <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
48 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
49 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
51 <&cmu_mif CLK_SCLK_DSD_DISP>;
Dexynos5433-tm2e.dts26 <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
35 <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
39 <&cmu_mif CLK_ACLK_DISP_333>,
40 <&cmu_mif CLK_SCLK_DSIM0_DISP>,
42 <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
47 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
48 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
Dexynos5433.dtsi380 <&cmu_mif CLK_SCLK_MFC_PLL>,
381 <&cmu_mif CLK_SCLK_BUS_PLL>;
393 cmu_mif: clock-controller@105b0000 { label
472 <&cmu_mif CLK_SCLK_DSIM1_DISP>,
473 <&cmu_mif CLK_SCLK_DSIM0_DISP>,
474 <&cmu_mif CLK_SCLK_DSD_DISP>,
475 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
476 <&cmu_mif CLK_SCLK_DECON_VCLK_DISP>,
477 <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
478 <&cmu_mif CLK_SCLK_DECON_TV_VCLK_DISP>,
[all …]
Dexynos5433-bus.dtsi84 clocks = <&cmu_mif CLK_ACLK_BUS2_400>;
Dexynos5433-tm2-common.dtsi296 &cmu_mif {
297 assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
298 assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dsamsung,exynos5433-clock.yaml32 # CMU_MIF which generates clocks for DRAM Memory Controller domain
522 <&cmu_mif CLK_SCLK_MFC_PLL>,
523 <&cmu_mif CLK_SCLK_BUS_PLL>;
/linux-6.14.4/include/dt-bindings/clock/
Dexynos5260-clk.h168 /* List Of Clocks For CMU_MIF */
Dexynos5433.h201 /* CMU_MIF */
/linux-6.14.4/drivers/clk/samsung/
Dclk-exynos5260.h282 *Registers for CMU_MIF
Dclk-exynos5260.c1047 /* CMU_MIF */
Dclk-exynos5433.c918 * Register offset definitions for CMU_MIF