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/linux-6.14.4/Documentation/devicetree/bindings/gpu/host1x/
Dnvidia,tegra234-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Thierry Reding <[email protected]>
16 - Mikko Perttunen <[email protected]>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra234-nvdec
32 clock-names:
34 - const: nvdec
[all …]
/linux-6.14.4/drivers/gpu/drm/tegra/
Driscv.c1 // SPDX-License-Identifier: GPL-2.0-only
32 static void riscv_writel(struct tegra_drm_riscv *riscv, u32 value, u32 offset) in riscv_writel() argument
34 writel(value, riscv->regs + offset); in riscv_writel()
39 struct tegra_drm_riscv_descriptor *bl = &riscv->bl_desc; in tegra_drm_riscv_read_descriptors() local
40 struct tegra_drm_riscv_descriptor *os = &riscv->os_desc; in tegra_drm_riscv_read_descriptors()
41 const struct device_node *np = riscv->dev->of_node; in tegra_drm_riscv_read_descriptors()
47 dev_err(riscv->dev, "failed to read " name ": %d\n", err); \ in tegra_drm_riscv_read_descriptors()
51 READ_PROP("nvidia,bl-manifest-offset", &bl->manifest_offset); in tegra_drm_riscv_read_descriptors()
52 READ_PROP("nvidia,bl-code-offset", &bl->code_offset); in tegra_drm_riscv_read_descriptors()
53 READ_PROP("nvidia,bl-data-offset", &bl->data_offset); in tegra_drm_riscv_read_descriptors()
[all …]
/linux-6.14.4/fs/nfs/blocklayout/
Dblocklayout.c54 switch (be->be_state) { in is_hole()
58 return be->be_tag ? false : true; in is_hole()
64 /* The data we are handed might be spread across several bios. We need
69 void (*pnfs_callback) (void *data);
70 void *data; member
73 static inline struct parallel_io *alloc_parallel(void *data) in alloc_parallel() argument
79 rv->data = data; in alloc_parallel()
80 kref_init(&rv->refcnt); in alloc_parallel()
87 kref_get(&p->refcnt); in get_parallel()
95 p->pnfs_callback(p->data); in destroy_parallel()
[all …]
/linux-6.14.4/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
Dtu102.c46 u32 offset = 0; in tu102_acr_wpr_build() local
49 /*XXX: shared sub-WPR headers, fill terminator for now. */ in tu102_acr_wpr_build()
50 nvkm_wo32(acr->wpr, 0x200, 0xffffffff); in tu102_acr_wpr_build()
52 /* Fill per-LSF structures. */ in tu102_acr_wpr_build()
53 list_for_each_entry(lsfw, &acr->lsfw, head) { in tu102_acr_wpr_build()
54 struct lsf_signature_v1 *sig = (void *)lsfw->sig->data; in tu102_acr_wpr_build()
56 .falcon_id = lsfw->id, in tu102_acr_wpr_build()
57 .lsb_offset = lsfw->offset.lsb, in tu102_acr_wpr_build()
60 .bin_version = sig->version, in tu102_acr_wpr_build()
65 nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr)); in tu102_acr_wpr_build()
[all …]
Dgm200.c42 nvkm_warn(&acr->subdev, "firmware unavailable\n"); in gm200_acr_nofw()
55 struct nvkm_device *device = acr->subdev.device; in gm200_acr_wpr_check()
67 struct nvkm_subdev *subdev = &acr->subdev; in gm200_acr_wpr_patch()
71 u32 offset = 0; in gm200_acr_wpr_patch() local
74 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gm200_acr_wpr_patch()
77 list_for_each_entry(lsfw, &acr->lsfw, head) { in gm200_acr_wpr_patch()
78 if (lsfw->id != hdr.falcon_id) in gm200_acr_wpr_patch()
81 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gm200_acr_wpr_patch()
84 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gm200_acr_wpr_patch()
87 offset += sizeof(hdr); in gm200_acr_wpr_patch()
[all …]
Dgp102.c38 u32 offset = 0; in gp102_acr_wpr_patch() local
41 nvkm_robj(acr->wpr, offset, &hdr, sizeof(hdr)); in gp102_acr_wpr_patch()
42 wpr_header_v1_dump(&acr->subdev, &hdr); in gp102_acr_wpr_patch()
44 list_for_each_entry(lsfw, &acr->lsfw, head) { in gp102_acr_wpr_patch()
45 if (lsfw->id != hdr.falcon_id) in gp102_acr_wpr_patch()
48 nvkm_robj(acr->wpr, hdr.lsb_offset, &lsb, sizeof(lsb)); in gp102_acr_wpr_patch()
49 lsb_header_v1_dump(&acr->subdev, &lsb); in gp102_acr_wpr_patch()
51 lsfw->func->bld_patch(acr, lsb.tail.bl_data_off, adjust); in gp102_acr_wpr_patch()
55 offset += sizeof(hdr); in gp102_acr_wpr_patch()
66 if (WARN_ON(lsfw->sig->size != sizeof(hdr.signature))) in gp102_acr_wpr_build_lsb()
[all …]
/linux-6.14.4/include/linux/
Dbio.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 bvec_iter_bvec((bio)->bi_io_vec, (iter))
26 bvec_iter_page((bio)->bi_io_vec, (iter))
28 bvec_iter_len((bio)->bi_io_vec, (iter))
30 bvec_iter_offset((bio)->bi_io_vec, (iter))
32 #define bio_page(bio) bio_iter_page((bio), (bio)->bi_iter)
33 #define bio_offset(bio) bio_iter_offset((bio), (bio)->bi_iter)
34 #define bio_iovec(bio) bio_iter_iovec((bio), (bio)->bi_iter)
39 #define bio_sectors(bio) bvec_iter_sectors((bio)->bi_iter)
40 #define bio_end_sector(bio) bvec_iter_end_sector((bio)->bi_iter)
[all …]
/linux-6.14.4/drivers/gpu/drm/display/
Ddrm_dp_helper.c18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
77 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
231 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
232 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
243 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
244 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
256 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
257 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
279 * - Clock recovery vs. channel equalization
280 * - DPRX vs. LTTPR
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/linux-6.14.4/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/gsp/
Dgsp_fw_wpr_meta.h4 /* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.113.01 */
7 …* SPDX-FileCopyrightText: Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES. All rights rese…
8 * SPDX-License-Identifier: MIT
32 // BL to use for verification (i.e. Booter locked it in WPR2)
35 // Revision number of Booter-BL-Sequencer handoff interface
37 // Bumped up when we revoke GSP-RM ucode
40 // ---- Members regarding data in SYSMEM ----------------------------
65 // Offset relative to GspFwWprMeta FBMEM PA (gspFwWprStart)
75 // ---- Members describing FB layout --------------------------------
83 // GSP-RM to use to setup heap.
[all …]
/linux-6.14.4/drivers/video/fbdev/
Datmel_lcdfb.c13 #include <linux/dma-mapping.h>
38 /* LCD Controller info data structure, stored in device platform_data */
69 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
70 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
107 /* some bl->props field just changed */
108 static int atmel_bl_update_status(struct backlight_device *bl) in atmel_bl_update_status() argument
110 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); in atmel_bl_update_status()
111 int brightness = backlight_get_brightness(bl); in atmel_bl_update_status()
123 static int atmel_bl_get_brightness(struct backlight_device *bl) in atmel_bl_get_brightness() argument
125 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); in atmel_bl_get_brightness()
[all …]
Dssd1307fb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
94 u8 data[]; member
122 array->type = type; in ssd1307fb_alloc_array()
136 dev_err(&client->dev, "Couldn't send I2C command.\n"); in ssd1307fb_write_array()
150 return -ENOMEM; in ssd1307fb_write_cmd()
152 array->data[0] = cmd; in ssd1307fb_write_cmd()
163 u8 col_end = col_start + cols - 1; in ssd1307fb_set_col_range()
166 if (col_start == par->col_start && col_end == par->col_end) in ssd1307fb_set_col_range()
169 ret = ssd1307fb_write_cmd(par->client, SSD1307FB_SET_COL_RANGE); in ssd1307fb_set_col_range()
173 ret = ssd1307fb_write_cmd(par->client, col_start); in ssd1307fb_set_col_range()
[all …]
Dsh_mobile_lcdcfb.c16 #include <linux/dma-mapping.h>
35 /* ----------------------------------------------------------------------------
147 * struct sh_mobile_lcdc_overlay - LCDC display overlay
152 * @index: Overlay index (0-3)
156 * @alpha: Global alpha blending value (0-255, for alpha blending mode)
163 * @pan_y_offset: Panning linear offset in bytes (luma component)
220 /* -----------------------------------------------------------------------------
284 return chan->cfg->chan == LCDC_CHAN_SUBLCD; in lcdc_chan_is_sublcd()
288 int reg_nr, unsigned long data) in lcdc_write_chan() argument
290 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_write_chan()
[all …]
/linux-6.14.4/arch/powerpc/kernel/
Dhead_85xx.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 1995-1996 Gary Thomas <[email protected]>
10 * Low-level exception handers, MMU support, and rewrite.
13 * Copyright (c) 1998-1999 TiVo, Inc.
23 * Copyright 2002-2004 MontaVista Software, Inc.
40 #include <asm/asm-offsets.h>
43 #include <asm/feature-fixups.h>
50 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
51 * r4 - Starting address of the init RAM disk
52 * r5 - Ending address of the init RAM disk
[all …]
Dhead_book3s_32.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas ([email protected])
9 * Low-level exception handlers and MMU support
14 * This file contains the low-level support and setup for the
30 #include <asm/asm-offsets.h>
34 #include <asm/feature-fixups.h>
40 /* see the comment for clear_bats() -- Cort */ \
65 * -- Cort
72 * Enter here with the kernel text, data and bss loaded starting at
77 * pointer (r1) points to just below the end of the half-meg region
[all …]
Dhead_8xx.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas ([email protected])
7 * Low-level exception handlers and MMU support
13 * This file contains low-level support and setup for PowerPC 8xx
30 #include <asm/asm-offsets.h>
32 #include <asm/code-patching-asm.h>
52 * support an ELF compressed (zImage) boot from EPPC-Bug because the
54 * r3: ptr to board info data
56 * r5: initrd_end - unused if r4 is 0
67 * entry into each of the instruction and data TLBs to map the first
[all …]
Dmisc_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains miscellaneous low-level functions.
4 * Copyright (C) 1995-1996 Gary Thomas ([email protected])
21 #include <asm/asm-offsets.h>
27 #include <asm/feature-fixups.h>
236 mtspr SPRN_SCOMD,r4 /* write data */
261 addi r5,r5,kexec_flag-1b
298 * Invalidate all non-IPROT TLB entries to avoid any TLB conflict.
343 bl real_mode
388 /* switch stacks to newstack -- &kexec_stack.stack */
[all …]
Dexceptions-64s.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This file contains the 64-bit "server" PowerPC variant
6 * handling and other fixed offset specific things.
18 #include <asm/exception-64s.h>
21 #include <asm/head-64.h>
22 #include <asm/feature-fixups.h>
28 * EXC_REAL_BEGIN/END - real, unrelocated exception vectors
29 * EXC_VIRT_BEGIN/END - virt (AIL), unrelocated exception vectors
30 * TRAMP_REAL_BEGIN - real, unrelocated helpers (virt may call these)
31 * TRAMP_VIRT_BEGIN - virt, unreloc helpers (in practice, real can use)
[all …]
/linux-6.14.4/arch/arm/kernel/
Dhead-common.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/kernel/head-common.S
5 * Copyright (C) 1994-2002 Russell King
18 #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
71 * r0 = cp#15 control register (exc_ret for M-class)
90 bl __inflate_kernel_data @ decompress .data to RAM
98 bl __memcpy @ copy .data to RAM
106 bl __memset @ clear .bss
118 bl kasan_early_init
149 .size __mmap_switched_data, . - __mmap_switched_data
[all …]
Dentry-header.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/asm-offsets.h>
9 #include <asm/uaccess-asm.h>
13 @ -----------------
59 * ARMv7-M exception entry/exit macros.
86 @ we cannot rely on r0-r3 and r12 matching the value saved in the
87 @ exception frame because of tail-chaining. So these have to be
89 ldmia r12!, {r0-r3}
94 sub sp, #PT_REGS_SIZE-S_IP
95 stmdb sp!, {r0-r11}
[all …]
Dentry-armv.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/kernel/entry-armv.S
6 * ARM700 fix by Matthew Godbolt (linux-[email protected])
9 * Low-level vector interface routines
19 #include <asm/glue-df.h>
20 #include <asm/glue-pf.h>
27 #include <asm/uaccess-asm.h>
30 #include "entry-header.S"
58 bl generic_handle_arch_irq
64 bl call_with_stack
[all …]
/linux-6.14.4/arch/powerpc/crypto/
Daes-spe-modes.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #include "aes-spe-regs.h"
14 lwz reg,off(rSP); /* load with offset */
16 stw reg,off(rDP); /* save with offset */
21 lwz reg,off(rIP); /* IV loading with offset */
23 stw reg,off(rIP); /* IV saving with offset */
81 stwu r1,-160(r1); /* create stack frame */ \
82 lis rT0,tab@h; /* en-/decryption table pointer */ \
113 stw r0,16(r1); /* delete sensitive data */ \
135 cmpwi d3,-1; \
[all …]
/linux-6.14.4/arch/arm/boot/compressed/
Dhead.S1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1996-2002 Russell King
12 #include "efi-header.S"
20 AR_CLASS( .arch armv7-a )
21 M_CLASS( .arch armv7-m )
82 bl putc
88 bl phex
101 kputc #'-'
105 kputc #'-'
110 kputc #'-'
[all …]
/linux-6.14.4/drivers/gpu/drm/nouveau/nvkm/falcon/
Dfw.c33 struct nvkm_falcon *falcon = fw->falcon; in nvkm_falcon_fw_patch()
34 u32 sig_base_src = fw->sig_base_prd; in nvkm_falcon_fw_patch()
38 FLCNFW_DBG(fw, "patching sigs:%d size:%d", fw->sig_nr, fw->sig_size); in nvkm_falcon_fw_patch()
39 if (fw->func->signature) { in nvkm_falcon_fw_patch()
40 idx = fw->func->signature(fw, &sig_base_src); in nvkm_falcon_fw_patch()
45 src = idx * fw->sig_size; in nvkm_falcon_fw_patch()
46 dst = fw->sig_base_img; in nvkm_falcon_fw_patch()
47 len = fw->sig_size / 4; in nvkm_falcon_fw_patch()
50 u32 sig = *(u32 *)(fw->sigs + src); in nvkm_falcon_fw_patch()
52 if (nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) { in nvkm_falcon_fw_patch()
[all …]
/linux-6.14.4/arch/powerpc/platforms/52xx/
Dlite5200_sleep.S1 /* SPDX-License-Identifier: GPL-2.0 */
36 .data
41 /* ---------------------------------------------------------------------- */
42 /* low-power mode with help of M68HLC908QT1 */
50 /* setup wakeup address for u-boot at physical location 0x0 */
60 * 0xf0 (0xe0->0x100 gets overwritten when BDI connected;
62 * WARNING: self-refresh doesn't seem to work when BDI2000 is connected,
72 bl save_regs
75 bl flush_data_cache
80 li r3, (sram_code_end - sram_code)/4
[all …]
/linux-6.14.4/tools/objtool/arch/powerpc/
Ddecode.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 exit(-1); in arch_decode_hint_reg()
34 exit(-1); in arch_nop_insn()
39 exit(-1); in arch_ret_insn()
43 unsigned long offset, unsigned int maxlen, in arch_decode_instruction() argument
51 ins = bswap_if_needed(file->elf, *(u32 *)(sec->data->d_buf + offset)); in arch_decode_instruction()
58 if ((ins & 3) == 1) /* bl */ in arch_decode_instruction()
63 imm -= 0x4000000; in arch_decode_instruction()
68 insn->len = 8; in arch_decode_instruction()
70 insn->len = 4; in arch_decode_instruction()
[all …]

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