Lines Matching +full:bl +full:- +full:data +full:- +full:offset
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 1995-1996 Gary Thomas <[email protected]>
10 * Low-level exception handers, MMU support, and rewrite.
13 * Copyright (c) 1998-1999 TiVo, Inc.
23 * Copyright 2002-2004 MontaVista Software, Inc.
40 #include <asm/asm-offsets.h>
43 #include <asm/feature-fixups.h>
50 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
51 * r4 - Starting address of the init RAM disk
52 * r5 - Ending address of the init RAM disk
53 * r6 - Start of kernel command line string (e.g. "mem=128")
54 * r7 - End of kernel command line string
67 bl get_phys_addr
79 bl get_phys_addr
85 addis r3,r8,(is_second_reloc - 0b)@ha
86 lwz r19,(is_second_reloc - 0b)@l(r3)
96 * PAGE_OFFSET + (kernstart_addr - memstart_addr)
97 * Since the offset between kernstart_addr and memstart_addr should
103 addis r4,r8,(kernstart_addr - 0b)@ha
104 addi r4,r4,(kernstart_addr - 0b)@l
107 addis r6,r8,(memstart_addr - 0b)@ha
108 addi r6,r6,(memstart_addr - 0b)@l
118 * We calculate our shift of offset from a 64M page.
126 subf r3,r5,r6 /* r3 = r6 - r5 */
129 2: bl relocate
146 * - The page we're executing in needs to reside in TLB1 and
186 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
202 li r2,-1
212 cmpwi r24, -1
233 stwu r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1)
239 bl early_init
242 bl kasan_early_init
253 bl relocate_init
272 bl machine_init
273 bl MMU_init
296 * FIND_PTE -- walks the page tables given EA & pgdir pointer
297 * r10 -- free
298 * r11 -- PGDIR pointer
299 * r12 -- free
300 * r13 -- EA of fault
311 rlwinm r12, r13, 14, 18, 28; /* Compute pgdir/pmd offset */ \
314 rlwinm. r10, r11, 32 - _PAGE_PSIZE_SHIFT, 0x1e; /* get tsize*/ \
324 rlwinm r12, r13, 14, 18, 28; /* Compute pgdir/pmd offset */ \
366 /* Data Storage Interrupt */
376 bl do_page_fault
380 bl CacheLockingException
423 /* Data TLB Error Interrupt */
486 subf r13,r11,r12 /* create false data dep */
498 /* The bailout. Restore registers to pre-exception conditions
588 subf r13,r11,r12 /* create false data dep */
601 /* The bailout. Restore registers to pre-exception conditions
619 bl load_up_spe
622 bl KernelSPE
628 /* SPE Floating Point Data */
633 bl SPEFloatingPointException
641 bl SPEFloatingPointRoundException
681 * Both the instruction and data TLB miss get to this
683 * r10 - tsize encoding (if HUGETLB_PAGE) or available to use
684 * r11 - TLB (info from Linux PTE)
685 * r12 - available to use
686 * r13 - upper bits of PTE (if PTE_64BIT) or available to use
687 * CR5 - results of addr >= PAGE_OFFSET
688 * MAS0, MAS1 - loaded with proper value when we get here
689 * MAS2, MAS3 - will need additional info from Linux PTE
706 lwz r15, TASK_CPU-THREAD(r12)
755 rlwinm r12, r11, 32-2, 26, 31 /* Move in perm bits */
783 rlwimi r12, r11, 32-19, 27, 31 /* extract WIMGE from pte */
827 * switch. -- Kumar
845 * SPE unavailable trap from kernel - print a message, but let
857 bl _printk
886 addi r10,r10,-1
887 and r11,r3,r10 /* r11 = page offset */
956 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
960 lwz r4,_MSR-STACK_INT_FRAME_REGS(r5)
963 stw r4,_MSR-STACK_INT_FRAME_REGS(r5)
995 bl switch_to_as1
999 bl loadcam_entry
1007 subf r4,r5,r4 /* memstart_addr - phys kernel start */
1015 bl restore_to_as0
1024 bl call_setup_cpu
1032 addi r1,r1,THREAD_SIZE-STACK_FRAME_MIN_SIZE
1057 .long -1
1062 * r3 - entry
1063 * r4 - virtual address
1064 * r5/r6 - physical address
1097 * r3 - virtual address of fdt
1098 * r4 - entry of the kernel
1124 addi r3,r3,-1
1159 * r3 - the tlb entry which should be invalidated
1160 * r4 - __pa(PAGE_OFFSET in AS1) - __pa(PAGE_OFFSET in AS0)
1161 * r5 - device tree virtual address. If r4 is 0, r5 is ignored.
1162 * r6 - boot cpu
1169 addi r9,r9,1f - 0b
1174 * on the offset passed by r4.
1203 bne 3f /* offset != 0 && is_boot_cpu */
1212 bl _start