| /aosp_15_r20/external/arm-trusted-firmware/include/drivers/st/ |
| H A D | stm32mp1_rcc.h | 238 #define RCC_TZCR_TZEN BIT(0)
239 #define RCC_TZCR_MCKPROT BIT(1)
242 #define RCC_OCENSETR_HSION BIT(0)
243 #define RCC_OCENSETR_HSIKERON BIT(1)
244 #define RCC_OCENSETR_CSION BIT(4)
245 #define RCC_OCENSETR_CSIKERON BIT(5)
246 #define RCC_OCENSETR_DIGBYP BIT(7)
247 #define RCC_OCENSETR_HSEON BIT(8)
248 #define RCC_OCENSETR_HSEKERON BIT(9)
249 #define RCC_OCENSETR_HSEBYP BIT(10)
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| /aosp_15_r20/external/trusty/arm-trusted-firmware/include/drivers/st/ |
| D | stm32mp15_rcc.h | 238 #define RCC_TZCR_TZEN BIT(0)
239 #define RCC_TZCR_MCKPROT BIT(1)
242 #define RCC_OCENSETR_HSION BIT(0)
243 #define RCC_OCENSETR_HSIKERON BIT(1)
244 #define RCC_OCENSETR_CSION BIT(4)
245 #define RCC_OCENSETR_CSIKERON BIT(5)
246 #define RCC_OCENSETR_DIGBYP BIT(7)
247 #define RCC_OCENSETR_HSEON BIT(8)
248 #define RCC_OCENSETR_HSEKERON BIT(9)
249 #define RCC_OCENSETR_HSEBYP BIT(10)
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| D | stm32mp13_rcc.h | 215 #define RCC_SECCFGR_HSISEC BIT(0)
216 #define RCC_SECCFGR_CSISEC BIT(1)
217 #define RCC_SECCFGR_HSESEC BIT(2)
218 #define RCC_SECCFGR_LSISEC BIT(3)
219 #define RCC_SECCFGR_LSESEC BIT(4)
220 #define RCC_SECCFGR_PLL12SEC BIT(8)
221 #define RCC_SECCFGR_PLL3SEC BIT(9)
222 #define RCC_SECCFGR_PLL4SEC BIT(10)
223 #define RCC_SECCFGR_MPUSEC BIT(11)
224 #define RCC_SECCFGR_AXISEC BIT(12)
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| D | stm32mp25_rcc.h | 731 #define RCC_R0CIDCFGR_CFEN BIT(0)
732 #define RCC_R0CIDCFGR_SEM_EN BIT(1)
739 #define RCC_R0SEMCR_SEM_MUTEX BIT(0)
744 #define RCC_R1CIDCFGR_CFEN BIT(0)
745 #define RCC_R1CIDCFGR_SEM_EN BIT(1)
752 #define RCC_R1SEMCR_SEM_MUTEX BIT(0)
757 #define RCC_R2CIDCFGR_CFEN BIT(0)
758 #define RCC_R2CIDCFGR_SEM_EN BIT(1)
765 #define RCC_R2SEMCR_SEM_MUTEX BIT(0)
770 #define RCC_R3CIDCFGR_CFEN BIT(0)
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| /aosp_15_r20/external/trusty/arm-trusted-firmware/plat/imx/common/include/ |
| D | imx_clock.h | 27 #define CCM_CCGR_SETTING0_DOM_CLK_RUN BIT(0)
28 #define CCM_CCGR_SETTING0_DOM_CLK_RUN_WAIT BIT(1)
29 #define CCM_CCGR_SETTING0_DOM_CLK_ALWAYS (BIT(1) | BIT(0))
31 #define CCM_CCGR_SETTING1_DOM_CLK_RUN BIT(4)
32 #define CCM_CCGR_SETTING1_DOM_CLK_RUN_WAIT BIT(5)
33 #define CCM_CCGR_SETTING1_DOM_CLK_ALWAYS (BIT(5) | BIT(4))
35 #define CCM_CCGR_SETTING2_DOM_CLK_RUN BIT(8)
36 #define CCM_CCGR_SETTING2_DOM_CLK_RUN_WAIT BIT(9)
37 #define CCM_CCGR_SETTING2_DOM_CLK_ALWAYS (BIT(9) | BIT(8))
39 #define CCM_CCGR_SETTING3_DOM_CLK_RUN BIT(12)
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| /aosp_15_r20/external/arm-trusted-firmware/plat/imx/common/include/ |
| H A D | imx_clock.h | 27 #define CCM_CCGR_SETTING0_DOM_CLK_RUN BIT(0)
28 #define CCM_CCGR_SETTING0_DOM_CLK_RUN_WAIT BIT(1)
29 #define CCM_CCGR_SETTING0_DOM_CLK_ALWAYS (BIT(1) | BIT(0))
31 #define CCM_CCGR_SETTING1_DOM_CLK_RUN BIT(4)
32 #define CCM_CCGR_SETTING1_DOM_CLK_RUN_WAIT BIT(5)
33 #define CCM_CCGR_SETTING1_DOM_CLK_ALWAYS (BIT(5) | BIT(4))
35 #define CCM_CCGR_SETTING2_DOM_CLK_RUN BIT(8)
36 #define CCM_CCGR_SETTING2_DOM_CLK_RUN_WAIT BIT(9)
37 #define CCM_CCGR_SETTING2_DOM_CLK_ALWAYS (BIT(9) | BIT(8))
39 #define CCM_CCGR_SETTING3_DOM_CLK_RUN BIT(12)
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/clang/Basic/ |
| D | MSP430Target.def | 203 // With 16-bit hardware multiplier
204 MSP430_MCU_FEAT("msp430c336", "16bit")
205 MSP430_MCU_FEAT("msp430c337", "16bit")
206 MSP430_MCU_FEAT("msp430cg4616", "16bit")
207 MSP430_MCU_FEAT("msp430cg4617", "16bit")
208 MSP430_MCU_FEAT("msp430cg4618", "16bit")
209 MSP430_MCU_FEAT("msp430cg4619", "16bit")
210 MSP430_MCU_FEAT("msp430e337", "16bit")
211 MSP430_MCU_FEAT("msp430f147", "16bit")
212 MSP430_MCU_FEAT("msp430f148", "16bit")
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| /aosp_15_r20/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/V3M/ |
| H A D | pfc_init_v3m.c | 15 /* Pin functon bit */
16 #define GPSR0_DU_EXODDF_DU_ODDF_DISP_CDE BIT(21)
17 #define GPSR0_DU_EXVSYNC_DU_VSYNC BIT(20)
18 #define GPSR0_DU_EXHSYNC_DU_HSYNC BIT(19)
19 #define GPSR0_DU_DOTCLKOUT BIT(18)
20 #define GPSR0_DU_DB7 BIT(17)
21 #define GPSR0_DU_DB6 BIT(16)
22 #define GPSR0_DU_DB5 BIT(15)
23 #define GPSR0_DU_DB4 BIT(14)
24 #define GPSR0_DU_DB3 BIT(13)
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| /aosp_15_r20/external/trusty/arm-trusted-firmware/drivers/renesas/rcar/pfc/V3M/ |
| D | pfc_init_v3m.c | 15 /* Pin function bit */
16 #define GPSR0_DU_EXODDF_DU_ODDF_DISP_CDE BIT(21)
17 #define GPSR0_DU_EXVSYNC_DU_VSYNC BIT(20)
18 #define GPSR0_DU_EXHSYNC_DU_HSYNC BIT(19)
19 #define GPSR0_DU_DOTCLKOUT BIT(18)
20 #define GPSR0_DU_DB7 BIT(17)
21 #define GPSR0_DU_DB6 BIT(16)
22 #define GPSR0_DU_DB5 BIT(15)
23 #define GPSR0_DU_DB4 BIT(14)
24 #define GPSR0_DU_DB3 BIT(13)
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| /aosp_15_r20/external/coreboot/src/vendorcode/mediatek/mt8192/include/ |
| H A D | ddrphy_wo_pll_reg.h | 8 #define B0_DLL_ARPI0_RG_ARMCTLPLL_CK_SEL_B0 BIT(1)
9 #define B0_DLL_ARPI0_RG_ARPI_RESETB_B0 BIT(3)
10 #define B0_DLL_ARPI0_RG_ARPI_LS_EN_B0 BIT(4)
11 #define B0_DLL_ARPI0_RG_ARPI_LS_SEL_B0 BIT(5)
12 #define B0_DLL_ARPI0_RG_ARPI_MCK8X_SEL_B0 BIT(6)
14 #define B0_DLL_ARPI1_RG_ARPI_DQSIEN_JUMP_EN_B0 BIT(11)
15 #define B0_DLL_ARPI1_RG_ARPI_DQ_JUMP_EN_B0 BIT(13)
16 #define B0_DLL_ARPI1_RG_ARPI_DQM_JUMP_EN_B0 BIT(14)
17 #define B0_DLL_ARPI1_RG_ARPI_DQS_JUMP_EN_B0 BIT(15)
18 #define B0_DLL_ARPI1_RG_ARPI_FB_JUMP_EN_B0 BIT(17)
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| H A D | dramc_ch0_reg.h | 8 #define DDRCONF0_RDATRST BIT(0)
9 #define DDRCONF0_DMSW_RST BIT(1)
10 #define DDRCONF0_WDT_DBG_RST BIT(2)
12 #define DDRCONF0_DRAMEN BIT(7)
13 #define DDRCONF0_RDQSIEN BIT(8)
14 #define DDRCONF0_DQSGCGM BIT(9)
15 #define DDRCONF0_APBL2 BIT(10)
16 #define DDRCONF0_BG4EN BIT(11)
17 #define DDRCONF0_BK8EN BIT(12)
18 #define DDRCONF0_BC4OTF_OPT BIT(13)
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| /aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Library/ |
| H A D | IoLib.h | 33 Reads an 8-bit I/O port.
35 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
39 If 8-bit I/O port operations are not supported, then ASSERT().
53 Writes an 8-bit I/O port.
55 Writes the 8-bit I/O port specified by Port with the value specified by Value
59 If 8-bit I/O port operations are not supported, then ASSERT().
75 Reads an 8-bit I/O port fifo into a block of memory.
77 Reads the 8-bit I/O fifo port specified by Port.
84 If 8-bit I/O port operations are not supported, then ASSERT().
100 Writes a block of memory into an 8-bit I/O port fifo.
[all …]
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| H A D | S3IoLib.h | 16 Reads an 8-bit I/O port and saves the value in the S3 script to be replayed
19 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
23 If 8-bit I/O port operations are not supported, then ASSERT().
37 Writes an 8-bit I/O port, and saves the value in the S3 script to be replayed
40 Writes the 8-bit I/O port specified by Port with the value specified by Value
44 If 8-bit I/O port operations are not supported, then ASSERT().
60 Reads an 8-bit I/O port, performs a bitwise OR, writes the
61 result back to the 8-bit I/O port, and saves the value in the S3 script to be
64 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
66 result to the 8-bit I/O port specified by Port. The value written to the I/O
[all …]
|
| /aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/ |
| H A D | IoLib.h | 33 Reads an 8-bit I/O port.
35 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
39 If 8-bit I/O port operations are not supported, then ASSERT().
53 Writes an 8-bit I/O port.
55 Writes the 8-bit I/O port specified by Port with the value specified by Value
59 If 8-bit I/O port operations are not supported, then ASSERT().
75 Reads an 8-bit I/O port fifo into a block of memory.
77 Reads the 8-bit I/O fifo port specified by Port.
84 If 8-bit I/O port operations are not supported, then ASSERT().
100 Writes a block of memory into an 8-bit I/O port fifo.
[all …]
|
| H A D | S3IoLib.h | 16 Reads an 8-bit I/O port and saves the value in the S3 script to be replayed
19 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
23 If 8-bit I/O port operations are not supported, then ASSERT().
37 Writes an 8-bit I/O port, and saves the value in the S3 script to be replayed
40 Writes the 8-bit I/O port specified by Port with the value specified by Value
44 If 8-bit I/O port operations are not supported, then ASSERT().
60 Reads an 8-bit I/O port, performs a bitwise OR, writes the
61 result back to the 8-bit I/O port, and saves the value in the S3 script to be
64 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
66 result to the 8-bit I/O port specified by Port. The value written to the I/O
[all …]
|
| /aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Library/ |
| H A D | IoLib.h | 33 Reads an 8-bit I/O port.
35 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
39 If 8-bit I/O port operations are not supported, then ASSERT().
53 Writes an 8-bit I/O port.
55 Writes the 8-bit I/O port specified by Port with the value specified by Value
59 If 8-bit I/O port operations are not supported, then ASSERT().
75 Reads an 8-bit I/O port fifo into a block of memory.
77 Reads the 8-bit I/O fifo port specified by Port.
84 If 8-bit I/O port operations are not supported, then ASSERT().
100 Writes a block of memory into an 8-bit I/O port fifo.
[all …]
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| H A D | S3IoLib.h | 16 Reads an 8-bit I/O port and saves the value in the S3 script to be replayed
19 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
23 If 8-bit I/O port operations are not supported, then ASSERT().
37 Writes an 8-bit I/O port, and saves the value in the S3 script to be replayed
40 Writes the 8-bit I/O port specified by Port with the value specified by Value
44 If 8-bit I/O port operations are not supported, then ASSERT().
60 Reads an 8-bit I/O port, performs a bitwise OR, writes the
61 result back to the 8-bit I/O port, and saves the value in the S3 script to be
64 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
66 result to the 8-bit I/O port specified by Port. The value written to the I/O
[all …]
|
| /aosp_15_r20/external/coreboot/src/northbridge/intel/i945/ |
| H A D | i945.h | 62 #define PCISTS1 0x06 /* 16bit */
63 #define SSTS1 0x1e /* 16bit */
64 #define PEG_CAP 0xa2 /* 16bit */
65 #define DSTS 0xaa /* 16bit */
66 #define SLOTCAP 0xb4 /* 32bit */
67 #define SLOTSTS 0xba /* 16bit */
68 #define PEG_LC 0xec /* 32bit */
69 #define PVCCAP1 0x104 /* 32bit */
70 #define VC0RCTL 0x114 /* 32bit */
71 #define LE1D 0x150 /* 32bit */
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| /aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Library/ |
| H A D | IoLib.h | 39 Reads an 8-bit I/O port.
41 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
45 If 8-bit I/O port operations are not supported, then ASSERT().
59 Writes an 8-bit I/O port.
61 Writes the 8-bit I/O port specified by Port with the value specified by Value
65 If 8-bit I/O port operations are not supported, then ASSERT().
81 Reads an 8-bit I/O port fifo into a block of memory.
83 Reads the 8-bit I/O fifo port specified by Port.
90 If 8-bit I/O port operations are not supported, then ASSERT().
106 Writes a block of memory into an 8-bit I/O port fifo.
[all …]
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| H A D | S3IoLib.h | 23 Reads an 8-bit I/O port and saves the value in the S3 script to be replayed
26 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
30 If 8-bit I/O port operations are not supported, then ASSERT().
44 Writes an 8-bit I/O port, and saves the value in the S3 script to be replayed
47 Writes the 8-bit I/O port specified by Port with the value specified by Value
51 If 8-bit I/O port operations are not supported, then ASSERT().
67 Reads an 8-bit I/O port, performs a bitwise OR, writes the
68 result back to the 8-bit I/O port, and saves the value in the S3 script to be
71 Reads the 8-bit I/O port specified by Port, performs a bitwise OR
73 result to the 8-bit I/O port specified by Port. The value written to the I/O
[all …]
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| /aosp_15_r20/external/selinux/mcstrans/share/examples/nato/setrans.d/ |
| H A D | eyes-only.conf | 11 # Aruba - bit 201
14 # Antigua and Barbuda - bit 214
17 # United Arab Emirates - bit 208
20 # Afghanistan - bit 202
23 # Algeria - bit 263
26 # Azerbaijan - bit 217
29 # Albania - bit 205
32 # Armenia - bit 210
35 # Andorra - bit 206
38 # Angola - bit 203
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| /aosp_15_r20/external/deqp/external/vulkancts/mustpass/main/vk-default/ |
| H A D | mesh-shader.txt | 1835 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1836 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1837 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1838 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1839 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1840 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1841 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1842 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1843 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1844 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
[all …]
|
| /aosp_15_r20/external/swiftshader/tests/regres/testlists/vk-default/ |
| H A D | mesh-shader.txt | 1923 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1924 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1925 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1926 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1927 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1928 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1929 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1930 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1931 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1932 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
[all …]
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| /aosp_15_r20/external/deqp/android/cts/main/vk-main-2023-03-01/ |
| H A D | mesh-shader.txt | 1834 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1835 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1836 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1837 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1838 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1839 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1840 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1841 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1842 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
1843 dEQP-VK.mesh_shader.ext.query.all_queries.lines.host_reset.copy.no_wait.draw.32bit.no_availability.…
[all …]
|
| /aosp_15_r20/prebuilts/sdk/renderscript/clang-include/ |
| H A D | mmintrin.h | 50 /// \brief Constructs a 64-bit integer vector, setting the lower 32 bits to the
51 /// value of the 32-bit integer parameter and setting the upper 32 bits to 0.
58 /// A 32-bit integer value.
59 /// \returns A 64-bit integer vector. The lower 32 bits contain the value of the
67 /// \brief Returns the lower 32 bits of a 64-bit integer vector as a 32-bit
75 /// A 64-bit integer vector.
76 /// \returns A 32-bit signed integer value containing the lower 32 bits of the
84 /// \brief Casts a 64-bit signed integer value into a 64-bit integer vector.
91 /// A 64-bit signed integer.
92 /// \returns A 64-bit integer vector containing the same bitwise pattern as the
[all …]
|