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/linux-6.14.4/Documentation/devicetree/bindings/iio/frequency/
Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <[email protected]>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
34 clock-output-names:
[all …]
/linux-6.14.4/tools/perf/Documentation/
Dperf-record.txt1 perf-record(1)
5 ----
6 perf-record - Run a command and record its profile into perf.data
9 --------
11 'perf record' [-e <EVENT> | --event=EVENT] [-a] <command>
12 'perf record' [-e <EVENT> | --event=EVENT] [-a] \-- <command> [<options>]
15 -----------
17 from it, into perf.data - without displaying anything.
23 -------
27 -e::
[all …]
/linux-6.14.4/sound/soc/codecs/
Dmt6357.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
17 static void set_playback_gpio(struct mt6357_priv *priv, bool enable) in set_playback_gpio() argument
19 regmap_write(priv->regmap, MT6357_GPIO_MODE2_CLR, MT6357_GPIO_MODE2_CLEAR_ALL); in set_playback_gpio()
20 if (enable) { in set_playback_gpio()
22 regmap_write(priv->regmap, MT6357_GPIO_MODE2_SET, in set_playback_gpio()
32 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_playback_gpio()
44 static void set_capture_gpio(struct mt6357_priv *priv, bool enable) in set_capture_gpio() argument
46 regmap_write(priv->regmap, MT6357_GPIO_MODE3_CLR, MT6357_GPIO_MODE3_CLEAR_ALL); in set_capture_gpio()
47 if (enable) { in set_capture_gpio()
[all …]
Dda9055.c1 // SPDX-License-Identifier: GPL-2.0-or-later
58 /* Input - Gain, Select and Filter Registers */
71 /* Output - Gain, Select and Filter Registers */
288 0x0, 0x10, TLV_DB_SCALE_ITEM(-5400, 0, 0),
289 /* -54dB to 15dB */
290 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
295 /* -78dB to 12dB */
296 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
305 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
306 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
[all …]
Dmt6358.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6358.c -- mt6358 ALSA SoC audio codec driver
107 priv->mtkaif_protocol = mtkaif_protocol; in mt6358_set_mtkaif_protocol()
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
[all …]
Dwm8900.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8900.c -- WM8900 ALSA Soc Audio driver
10 * - Tristating.
11 * - TDM.
12 * - Jack detect.
13 * - FLL source configuration, currently only MCLK is supported.
141 u32 fll_out; /* FLL output frequency */
224 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wm8900_hp_event()
236 /* Enable the input stage */ in wm8900_hp_event()
245 /* Enable the output stage */ in wm8900_hp_event()
[all …]
Dak4535.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ak4535.c -- AK4535 ALSA Soc Audio driver
65 static const char *ak4535_mono_gain[] = {"+6dB", "-17dB"};
66 static const char *ak4535_mono_out[] = {"(L + R)/2", "Hi-Z"};
81 SOC_ENUM("Mono 1 Output", ak4535_enum[1]),
83 SOC_ENUM("Headphone Output", ak4535_enum[2]),
97 SOC_SINGLE("AUX Bypass Volume", AK4535_VOL, 0, 15, 0),
111 SOC_DAPM_SINGLE("Aux Bypass Switch", AK4535_SIG2, 5, 1, 0),
117 SOC_DAPM_SINGLE("Aux Capture Switch", AK4535_MIC, 5, 1, 0),
154 SND_SOC_DAPM_SWITCH("Mono 2 Enable", SND_SOC_NOPM, 0, 0,
[all …]
Dda7213.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 /* -54dB */
35 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
36 /* -52.5dB to 15dB */
37 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
42 /* -78dB to 12dB */
43 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
52 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
53 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
54 static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
[all …]
Dmt6359.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6359.c -- mt6359 ALSA SoC audio codec driver
24 regmap_update_bits(priv->regmap, MT6359_SMT_CON1, 0x3ff0, 0x3ff0); in mt6359_set_gpio_smt()
30 regmap_update_bits(priv->regmap, MT6359_DRV_CON2, 0xffff, 0x8888); in mt6359_set_gpio_driving()
31 regmap_update_bits(priv->regmap, MT6359_DRV_CON3, 0xffff, 0x8888); in mt6359_set_gpio_driving()
32 regmap_update_bits(priv->regmap, MT6359_DRV_CON4, 0x00ff, 0x88); in mt6359_set_gpio_driving()
38 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
42 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
43 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
[all …]
Dak4641.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ak4641.c -- AK4641 ALSA Soc Audio driver
77 if (ak4641->deemph && deemph_settings[i] != 0 && in ak4641_set_deemph()
78 abs(deemph_settings[i] - ak4641->playback_fs) < in ak4641_set_deemph()
79 abs(deemph_settings[best] - ak4641->playback_fs)) in ak4641_set_deemph()
82 if (!ak4641->deemph && deemph_settings[i] == 0) in ak4641_set_deemph()
86 dev_dbg(component->dev, "Set deemphasis %d\n", best); in ak4641_set_deemph()
96 int deemph = ucontrol->value.integer.value[0]; in ak4641_put_deemph()
99 return -EINVAL; in ak4641_put_deemph()
101 ak4641->deemph = deemph; in ak4641_put_deemph()
[all …]
/linux-6.14.4/drivers/gpu/drm/tegra/
Ddpaux.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/pinctrl/pinconf-generic.h>
40 struct drm_dp_aux aux; member
48 struct tegra_output *output; member
66 static inline struct tegra_dpaux *to_dpaux(struct drm_dp_aux *aux) in to_dpaux() argument
68 return container_of(aux, struct tegra_dpaux, aux); in to_dpaux()
79 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
81 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl()
89 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel()
90 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
[all …]
Dsor.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
408 struct tegra_output output; member
427 struct drm_dp_aux *aux; member
481 static inline struct tegra_sor *to_sor(struct tegra_output *output) in to_sor() argument
483 return container_of(output, struct tegra_sor, output); in to_sor()
488 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl()
490 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl()
498 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel()
499 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel()
[all …]
/linux-6.14.4/drivers/gpu/drm/i915/display/
Dintel_dp_hdcp.c1 /* SPDX-License-Identifier: MIT */
44 struct intel_dp *dp = &dig_port->dp; in intel_dp_hdcp_wait_for_cp_irq()
45 struct intel_hdcp *hdcp = &dp->attached_connector->hdcp; in intel_dp_hdcp_wait_for_cp_irq()
48 #define C (hdcp->cp_irq_count_cached != atomic_read(&hdcp->cp_irq_count)) in intel_dp_hdcp_wait_for_cp_irq()
49 ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C, in intel_dp_hdcp_wait_for_cp_irq()
53 drm_dbg_kms(connector->base.dev, in intel_dp_hdcp_wait_for_cp_irq()
65 /* Output An first, that's easy */ in intel_dp_hdcp_write_an_aksv()
66 dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN, in intel_dp_hdcp_write_an_aksv()
69 drm_dbg_kms(display->drm, in intel_dp_hdcp_write_an_aksv()
70 "Failed to write An over DP/AUX (%zd)\n", in intel_dp_hdcp_write_an_aksv()
[all …]
Dintel_hdcp_shim.h1 /* SPDX-License-Identifier: MIT */
24 * and the bus-specific code. What that means is that HDCP over HDMI differs
29 * - DP AUX vs. DDC
30 * HDCP registers on the receiver are set via DP AUX for DP, and
32 * - Receiver register offsets
34 * - Receiver register masks/offsets
37 * - Receiver register names
38 * Seriously. In the DP spec, the 16-bit register containing
42 * - KSV FIFO
45 * - Aksv output
[all …]
/linux-6.14.4/drivers/media/platform/st/sti/delta/
Ddelta-mjpeg-fw.h1 /* SPDX-License-Identifier: GPL-2.0 */
45 * used for enabling main/aux outputs for both display &
49 /* enable decimated (for display) reconstruction */
51 /* enable main (for display) reconstruction */
53 /* enable both main & decimated (for display) reconstruction */
55 /* enable only reference output(ex. for trick modes) */
58 * enable reference output with decimated
63 * enable reference output with main
68 * enable reference output with main & decimated
78 /* Advanced H/2 resize using improved 8-tap filters */
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/display/msm/
Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <[email protected]>
11 - Abhinav Kumar <[email protected]>
20 - enum:
21 - qcom,sa8775p-dp
22 - qcom,sc7180-dp
23 - qcom,sc7280-dp
[all …]
/linux-6.14.4/sound/pci/oxygen/
Dxonar_dg.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * ------------
18 * SPI 0 -> CS4245
21 * I²S 1 -> CS4245
22 * I²S 2 -> CS4361 (center/LFE)
23 * I²S 3 -> CS4361 (surround)
24 * I²S 4 -> CS4361 (front)
26 * I²S ADC 1 <- CS4245
28 * GPIO 3 <- ?
29 * GPIO 4 <- headphone detect
[all …]
/linux-6.14.4/sound/mips/
Dad1843.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2003 Vivien Chappelier <vivien.chappelier@linux-mips.org>
35 ad1843_PDNO = { 0, 14, 1 }, /* Converter Power-Down Flag */
38 ad1843_RMGE = { 2, 4, 1 }, /* Right ADC Mic Gain Enable */
41 ad1843_LMGE = { 2, 12, 1 }, /* Left ADC Mic Gain Enable */
47 ad1843_RX1M = { 4, 0, 5 }, /* Right Aux 1 Mix Gain/Atten */
48 ad1843_RX1MM = { 4, 7, 1 }, /* Right Aux 1 Mix Mute */
49 ad1843_LX1M = { 4, 8, 5 }, /* Left Aux 1 Mix Gain/Atten */
50 ad1843_LX1MM = { 4, 15, 1 }, /* Left Aux 1 Mix Mute */
51 ad1843_RX2M = { 5, 0, 5 }, /* Right Aux 2 Mix Gain/Atten */
[all …]
/linux-6.14.4/drivers/gpu/drm/display/
Ddrm_dp_dual_mode_helper.c44 * I2C-over-AUX. Source devices may choose to implement either of these
51 * drm_dp_dual_mode_read - Read from the DP dual mode adaptor register(s)
69 * As sub-addressing is not supported by all adaptors, in drm_dp_dual_mode_read()
94 return -ENOMEM; in drm_dp_dual_mode_read()
108 return -EPROTO; in drm_dp_dual_mode_read()
115 * drm_dp_dual_mode_write - Write to the DP dual mode adaptor register(s)
141 return -ENOMEM; in drm_dp_dual_mode_write()
155 return -EPROTO; in drm_dp_dual_mode_write()
164 "DP-HDMI ADAPTOR\x04"; in is_hdmi_adaptor()
190 * drm_dp_dual_mode_detect - Identify the DP dual mode adaptor
[all …]
/linux-6.14.4/drivers/gpu/drm/bridge/analogix/
Danalogix-anx6345.c1 /* SPDX-License-Identifier: GPL-2.0-only */
31 #include "analogix-i2c-dptx.h"
32 #include "analogix-i2c-txcommon.h"
47 struct drm_dp_aux aux; member
88 static ssize_t anx6345_aux_transfer(struct drm_dp_aux *aux, in anx6345_aux_transfer() argument
91 struct anx6345 *anx6345 = container_of(aux, struct anx6345, aux); in anx6345_aux_transfer()
93 return anx_dp_aux_transfer(anx6345->map[I2C_IDX_DPTX], msg); in anx6345_aux_transfer()
102 err = anx6345_clear_bits(anx6345->map[I2C_IDX_TXCOM], in anx6345_dp_link_training()
108 err = drm_dp_dpcd_readb(&anx6345->aux, DP_MAX_LINK_RATE, &dp_bw); in anx6345_dp_link_training()
119 return -EINVAL; in anx6345_dp_link_training()
[all …]
Danalogix-anx78xx.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "analogix-anx78xx.h"
67 struct drm_dp_aux aux; member
108 static ssize_t anx78xx_aux_transfer(struct drm_dp_aux *aux, in anx78xx_aux_transfer() argument
111 struct anx78xx *anx78xx = container_of(aux, struct anx78xx, aux); in anx78xx_aux_transfer()
112 return anx_dp_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg); in anx78xx_aux_transfer()
119 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_set_hpd()
124 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_set_hpd()
136 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG, in anx78xx_clear_hpd()
141 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_RX_P0], in anx78xx_clear_hpd()
[all …]
/linux-6.14.4/drivers/gpu/drm/bridge/
Dtc358767.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TC358767/TC358867/TC9595 DSI/DPI-to-DPI/(e)DP bridge driver
6 * All modes are supported -- DPI->(e)DP / DSI->DPI / DSI->(e)DP .
27 #include <linux/media-bus-format.h>
44 /* DSI D-PHY Layer registers */
77 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
82 /* Lane enable PPI and DSI register bits */
110 #define SUB_CFG_TYPE_CONFIG3 (2 << 2) /* LSB aligned 8-bit */
115 /* Display Parallel Output Interface */
151 #define SYSRSTENB 0x050c /* System Reset/Enable Register */
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <[email protected]>
15 - enum:
16 - qcom,sa8775p-pcie-ep
17 - qcom,sdx55-pcie-ep
18 - qcom,sm8450-pcie-ep
19 - items:
[all …]
/linux-6.14.4/Documentation/gpu/
Dzynqmp.rst1 .. SPDX-License-Identifier: GPL-2.0+
7 This subsystem handles DisplayPort video and audio output on the ZynqMP. It
8 supports in-memory framebuffers with the DisplayPort DMA controller
9 (xilinx-dpdma), as well as "live" video and audio from the programmable logic
15 -------
18 though debugfs. The following files in /sys/kernel/debug/dri/X/DP-1/test/
24 active/inactive will re-activate/re-deactivate test mode. When test
34 Enable/disable clock downspreading (spread-spectrum clocking) by
38 Enable/disable enhanced framing
41 Ignore AUX errors when set to 1. Writes to this file take effect
[all …]
/linux-6.14.4/include/linux/
Dwm97xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
47 #define WM97XX_COO 0x0800 /* enable coordinate mode */
48 #define WM97XX_CTC 0x0400 /* enable continuous mode */
61 #define WM97XX_SLEN 0x0008 /* slot read back enable */
62 #define WM97XX_SLT(i) ((i - 5) & 0x7) /* panel slot (5-11) */
71 #define WM9712_45W 0x1000 /* set for 5-wire touchscreen */
87 #define WM9705_PINV 0x0800 /* inverts sense of pen down output */
88 #define WM9705_BSEN 0x0400 /* BUSY flag enable, pin47 is 1 when busy */
89 #define WM9705_BINV 0x0200 /* invert BUSY (pin47) output */
102 #define WM9713_CTC 0x0100 /* enable continuous mode */
[all …]

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