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/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Dmarvell,mvebu-sdram-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/marvell,mvebu-sdram-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MVEBU SDRAM controller
10 - Jan Luebbe <[email protected]>
11 - Krzysztof Kozlowski <[email protected]>
15 const: marvell,armada-xp-sdram-controller
21 - compatible
22 - reg
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/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dmvebu-core-clock.txt4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
7 The following is a list of provided IDs and clock names on Armada 370/XP:
14 The following is a list of provided IDs and clock names on Armada 375:
20 The following is a list of provided IDs and clock names on Armada 380/385:
26 The following is a list of provided IDs and clock names on Armada 39x:
30 3 = hclk (SDRAM Controller Internal Clock)
31 4 = dclk (SDRAM Interface Clock)
44 3 = ddrclk (DDR controller clock derived from CPU0 clock)
49 2 = ddrclk (DDR controller clock derived from CPU0 clock)
52 - compatible : shall be one of the following:
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/linux-6.14.4/arch/arm/boot/dts/marvell/
Darmada-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada XP family SoC
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 * Contains definitions specific to the Armada XP SoC that are not
13 * common to all Armada SoCs.
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
22 model = "Marvell Armada XP family SoC";
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Darmada-xp-98dx3236.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * common to all Armada XP SoCs.
11 #include "armada-370-xp.dtsi"
14 #address-cells = <2>;
15 #size-cells = <2>;
18 compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,98dx3236-smp";
33 compatible = "marvell,sheeva-v7";
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Darmada-38x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 38x family of SoCs.
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
21 model = "Marvell Armada 38x family SoC";
32 compatible = "arm,cortex-a9-pmu";
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/linux-6.14.4/drivers/memory/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "Memory Controller drivers"
9 This option allows to enable specific memory controller drivers,
20 Data from JEDEC specs for DDR SDRAM memories,
23 DDR SDRAM controllers.
29 This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
31 controller, say Y or M here.
41 Driver for Atmel EBI controller.
42 Used to configure the EBI (external bus interface) when the device-
43 tree is used. This bus supports NANDs, external ethernet controller,
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/linux-6.14.4/arch/arm/mach-mvebu/
Dpm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Suspend/resume support. Currently supporting Armada XP only.
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
61 /* Prepare to go to self-refresh */ in mvebu_pm_powerdown()
92 np = of_find_node_by_name(NULL, "internal-regs"); in mvebu_internal_reg_base()
97 * platform. In the mvebu-mbus DT binding, 0xf0010000 in mvebu_internal_reg_base()
141 * Ask the mvebu-mbus driver to store the SDRAM window in mvebu_pm_store_armadaxp_bootinfo()
143 * before re-entering the kernel on resume. in mvebu_pm_store_armadaxp_bootinfo()
159 return -ENODEV; in mvebu_pm_store_bootinfo()
193 pr_warn("Entering suspend to RAM. Only special wake-up sources will resume the system\n"); in mvebu_pm_enter()
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/linux-6.14.4/drivers/edac/
Darmada_xp_edac.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/hardware/cache-l2x0.h>
13 #include <asm/hardware/cache-aurora-l2.h>
83 /* derived from "DRAM Address Multiplexing" in the ARMADA XP Functional Spec */
88 if (drvdata->width == 8) { in axp_mc_calc_address()
90 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
100 } else if (drvdata->width == 4) { in axp_mc_calc_address()
102 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
114 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
129 struct axp_mc_drvdata *drvdata = mci->pvt_info; in axp_mc_check()
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DKconfig16 EDAC is a subsystem along with hardware-specific drivers designed to
17 report hardware errors. These are low-level errors that are reported
22 The mailing list for the EDAC project is linux-[email protected].
40 levels are 0-4 (from low to high) and by default it is set to 2.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
49 occurring on your machine in human-readable form.
60 Not all machines support hardware-driven error report. Some of those
61 provide a BIOS-driven error report mechanism via ACPI, using the
65 When this option is enabled, it will disable the hardware-driven
69 It should be noticed that keeping both GHES and a hardware-driven
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/linux-6.14.4/Documentation/devicetree/bindings/bus/
Dmvebu-mbus.txt6 - compatible: Should be set to one of the following:
7 marvell,armada370-mbus
8 marvell,armadaxp-mbus
9 marvell,armada375-mbus
10 marvell,armada380-mbus
11 marvell,kirkwood-mbus
12 marvell,dove-mbus
13 marvell,orion5x-88f5281-mbus
14 marvell,orion5x-88f5182-mbus
15 marvell,orion5x-88f5181-mbus
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/linux-6.14.4/drivers/bus/
Dmvebu-mbus.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Address map functions for Marvell EBU SoCs (Kirkwood, Armada
4 * 370/XP, Dove, Orion5x and MV78xx0)
11 * - One to configure the access of the CPU to the devices. Depending
17 * - One to configure the access to the CPU to the SDRAM. There are
19 * SDRAM into the physical address space.
23 * - Reads out the SDRAM address decoding windows at initialization
26 * device drivers to get those information related to the SDRAM
30 * devices have to configure those device -> SDRAM windows to ensure
33 * - Provides an API for platform code or device drivers to
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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