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/linux-6.14.4/Documentation/devicetree/bindings/iio/adc/
Dqcom,spmi-vadc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <[email protected]>
11 - Bjorn Andersson <[email protected]>
15 voltage. The VADC is a 15-bit sigma-delta ADC.
17 voltage. The VADC is a 16-bit sigma-delta ADC.
22 - items:
23 - const: qcom,pms405-adc
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/linux-6.14.4/drivers/iio/adc/
Dqcom-spmi-vadc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
10 #include <linux/iio/adc/qcom-vadc-common.h>
23 #include <dt-bindings/iio/qcom,spmi-vadc.h>
76 * struct vadc_channel_prop - VADC channel property.
78 * @calibration: calibration type.
91 enum vadc_calibration calibration; member
101 * struct vadc_priv - VADC private structure.
111 * @graph: store parameters for calibration.
141 return regmap_bulk_read(vadc->regmap, vadc->base + offset, data, 1); in vadc_read()
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Dqcom-pm8xxx-xoadc.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * specific-purpose and general purpose ADC converters and channels.
13 #include <linux/iio/adc/qcom-vadc-common.h>
27 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
28 * drivers/misc/pmic8058-xoadc.c
29 * drivers/hwmon/pm8xxx-adc.c
124 * proper reference points for calibration.
155 * struct xoadc_channel - encodes channel properties and defaults
162 * @prescale: the channels have hard-coded prescale ratios defined
185 * struct xoadc_variant - encodes the XOADC variant characteristics
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Dstm32-adc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
26 #include <linux/nvmem-consumer.h>
31 #include "stm32-adc-core.h"
33 /* Number of linear calibration shadow registers / LINCALRDYW control bits */
58 /* extsel - trigger mux selection value */
84 STM32_ADC_INT_CH_NONE = -1,
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Dqcom-spmi-adc5.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/iio/adc/qcom-vadc-common.h>
23 #include <dt-bindings/iio/qcom,spmi-vadc.h>
104 * struct adc5_channel_prop - ADC channel property.
106 * @cal_method: calibration method.
107 * @cal_val: calibration value
133 * struct adc5_chip - ADC private structure.
160 return regmap_bulk_read(adc->regmap, adc->base + offset, data, len); in adc5_read()
165 return regmap_bulk_write(adc->regmap, adc->base + offset, data, len); in adc5_write()
170 return regmap_update_bits(adc->regmap, adc->base + offset, mask, val); in adc5_masked_write()
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/linux-6.14.4/Documentation/devicetree/bindings/thermal/
Dqcom-spmi-adc-tm-hc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Dmitry Baryshkov <[email protected]>
11 $ref: thermal-sensor.yaml#
15 const: qcom,spmi-adc-tm-hc
23 "#thermal-sensor-cells":
26 "#address-cells":
29 "#size-cells":
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Dqcom-tsens.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <[email protected]>
22 - description: msm8960 TSENS based
24 - enum:
25 - qcom,ipq8064-tsens
26 - qcom,msm8960-tsens
28 - description: v0.1 of TSENS
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Dqcom-spmi-adc-tm5.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Dmitry Baryshkov <[email protected]>
11 $ref: thermal-sensor.yaml#
16 - qcom,spmi-adc-tm5
17 - qcom,spmi-adc-tm5-gen2
18 - qcom,adc-tm7 # Incomplete / subject to change
26 "#thermal-sensor-cells":
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/linux-6.14.4/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath10k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff Johnson <[email protected]>
18 - qcom,ath10k # SDIO-based devices
19 - qcom,ipq4019-wifi
20 - qcom,wcn3990-wifi # SNoC-based devices
25 reg-names:
27 - const: membase
33 interrupt-names:
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/linux-6.14.4/arch/arm/boot/dts/qcom/
Dqcom-ipq4018-ap120c-ac.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
8 model = "ALFA Network AP120C-AC";
9 compatible = "alfa-network,ap120c-ac", "qcom,ipq4018";
16 stdout-path = "serial0:115200n8";
20 compatible = "gpio-keys";
22 key-reset {
31 i2c0_pins: i2c0-state {
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/linux-6.14.4/Documentation/devicetree/bindings/input/
Dti,drv260x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments - drv260x Haptics driver family
10 - Andrew Davis <[email protected]>
15 - ti,drv2604
16 - ti,drv2605
17 - ti,drv2605l
22 vbat-supply:
30 (defined in include/dt-bindings/input/ti-drv260x.h)
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/linux-6.14.4/drivers/input/touchscreen/
Dimx6ul_tsc.c1 // SPDX-License-Identifier: GPL-2.0
111 reinit_completion(&tsc->completion); in imx6ul_adc_init()
113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init()
118 if (tsc->average_enable) { in imx6ul_adc_init()
120 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; in imx6ul_adc_init()
123 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init()
125 /* enable calibration interrupt */ in imx6ul_adc_init()
128 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); in imx6ul_adc_init()
130 /* start ADC calibration */ in imx6ul_adc_init()
131 adc_gc = readl(tsc->adc_regs + REG_ADC_GC); in imx6ul_adc_init()
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/linux-6.14.4/drivers/phy/
Dphy-xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene Multi-purpose PHY driver
10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.
19 * -----------------
20 * | Internal | |------|
21 * | Ref PLL CMU |----| | ------------- ---------
22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes|
23 * | | | | ---------
24 * External Clock ------| | -------------
25 * |------|
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/linux-6.14.4/drivers/net/wireless/ath/ath10k/
Dcore.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
16 #include <linux/nvmem-consumer.h>
28 #include "wmi-ops.h"
57 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
58 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
474 * or 2x2 160Mhz, long-guard-interval.
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/linux-6.14.4/drivers/media/tuners/
Dfc0011.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 2012 Hans-Frieder Vogt <[email protected]>
51 FC11_VCOCAL_RUN = 0, /* VCO calibration run */
52 FC11_VCOCAL_VALUEMASK = 0x3F, /* VCO calibration value mask */
53 FC11_VCOCAL_OK = 0x40, /* VCO calibration Ok */
54 FC11_VCOCAL_RESET = 0x80, /* VCO calibration reset */
70 struct i2c_msg msg = { .addr = priv->addr, in fc0011_writereg()
73 if (i2c_transfer(priv->i2c, &msg, 1) != 1) { in fc0011_writereg()
74 dev_err(&priv->i2c->dev, in fc0011_writereg()
77 return -EIO; in fc0011_writereg()
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/linux-6.14.4/drivers/phy/xilinx/
Dphy-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-zynqmp.c - PHY driver for Xilinx ZynqMP GT.
5 * Copyright (C) 2018-2020 Xilinx Inc.
27 #include <dt-bindings/phy/phy.h>
33 /* TX De-emphasis parameters */
38 /* DN Resistor calibration code parameters */
87 /* Calibration digital logic parameters */
184 * struct xpsgtr_ssc - structure to hold SSC settings for a lane
198 * struct xpsgtr_phy - representation of a lane
219 * struct xpsgtr_dev - representation of a ZynMP GT device
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/linux-6.14.4/drivers/net/wireless/ath/ath9k/
Dlink.c20 * TX polling - checks if the TX engine is stuck somewhere
28 if (sc->tx99_state) in ath_tx_complete_check()
32 txq = sc->tx.txq_map[i]; in ath_tx_complete_check()
35 if (txq->axq_depth) { in ath_tx_complete_check()
36 if (txq->axq_tx_inprogress) { in ath_tx_complete_check()
41 txq->axq_tx_inprogress = true; in ath_tx_complete_check()
49 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, in ath_tx_complete_check()
59 struct ath_common *common = ath9k_hw_common(sc->sc_ah); in ath_hw_rx_inactive_check()
62 interval = jiffies_to_msecs(jiffies - sc->rx_active_check_time); in ath_hw_rx_inactive_check()
63 count = sc->rx_active_count; in ath_hw_rx_inactive_check()
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/linux-6.14.4/drivers/iio/temperature/
Dmlx90635.c1 // SPDX-License-Identifier: GPL-2.0
3 * mlx90635.c - Melexis MLX90635 contactless IR temperature sensor
7 * Driver for the Melexis MLX90635 I2C 16-bit IR thermopile sensor
32 /* EEPROM addresses - used at startup */
39 #define MLX90635_EE_Fa 0x0026 /* Fa calibration register 32bit */
41 #define MLX90635_EE_Ga 0x002C /* Ga calibration register 16bit */
42 #define MLX90635_EE_Fb 0x002E /* Fb calibration register 16bit */
43 #define MLX90635_EE_Ea 0x0030 /* Ea calibration register 32bit */
44 #define MLX90635_EE_Eb 0x0034 /* Eb calibration register 32bit */
45 #define MLX90635_EE_P_G 0x0038 /* P_G calibration register 16bit */
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/linux-6.14.4/arch/arm/mach-omap2/
Dsdrc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (C) 2007-2008, 2012 Texas Instruments, Inc.
9 * Copyright (C) 2007-2008 Nokia Corporation
55 * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate
62 * This structure holds a pre-computed set of register values for the
64 * intended to be pre-computed and specified in an array in the board-*.c
112 /* Scale factor for fixed-point arith in omap3_core_dpll_m2_set_rate() */
124 /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
166 * become sub-optimal. The RFR value goes in the opposite direction. If you
170 * unlocked and their value needs run time calibration. A dynamic call is
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/linux-6.14.4/Documentation/input/
Dgameport-programming.rst34 Please also consider enabling the gameport on the card in the ->open()
35 callback if the io is mapped to ISA space - this way it'll occupy the io
37 ->close() callback. You also can select the io address in the ->open()
70 the driver doesn't have to measure them the old way - an ADC is built into
86 return -(mode != GAMEPORT_MODE_COOKED);
97 See analog.c and input.c for handling of fuzz - the fuzz value determines
105 examples 1+2 or 1+3. Gameports can support internal calibration - see below,
107 more than one gameport instance simultaneously, use the ->private member of
147 I/O address for use with raw mode. You have to either set this, or ->read()
191 pre-filled by cooked data by the caller, max[0..3] should be pre-filled with
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/linux-6.14.4/drivers/gpu/host1x/
Dmipi.c109 /* calibration settings for data lanes */
114 /* calibration settings for clock lanes */
139 return readl(mipi->regs + (offset << 2)); in tegra_mipi_readl()
145 writel(value, mipi->regs + (offset << 2)); in tegra_mipi_writel()
153 err = clk_enable(mipi->clk); in tegra_mipi_power_up()
160 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_up()
169 clk_disable(mipi->clk); in tegra_mipi_power_up()
179 err = clk_enable(mipi->clk); in tegra_mipi_power_down()
194 * control a regulator that supplies current to the pre-driver logic. in tegra_mipi_power_down()
200 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_down()
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/linux-6.14.4/drivers/input/keyboard/
Dqt1050.c1 // SPDX-License-Identifier: GPL-2.0
90 /* Calibration and Reset */
229 err = regmap_read(ts->regmap, QT1050_CHIP_ID, &val); in qt1050_identify()
231 dev_err(&ts->client->dev, "Failed to read chip ID: %d\n", err); in qt1050_identify()
236 dev_err(&ts->client->dev, "ID %d not supported\n", val); in qt1050_identify()
241 err = regmap_read(ts->regmap, QT1050_FW_VERSION, &val); in qt1050_identify()
243 dev_err(&ts->client->dev, "could not read the firmware version\n"); in qt1050_identify()
247 dev_info(&ts->client->dev, "AT42QT1050 firmware version %1d.%1d\n", in qt1050_identify()
256 struct input_dev *input = ts->input; in qt1050_irq_threaded()
262 err = regmap_read(ts->regmap, QT1050_DET_STATUS, &val); in qt1050_irq_threaded()
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <[email protected]>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
62 added on V2; the FMREG bank for slew rate calibration is not used anymore
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/linux-6.14.4/drivers/scsi/
Dsense_codes.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * http://www.t10.org/lists/asc-num.txt [most recent: 20200817]
9 SENSE_CODE(0x0002, "End-of-partition/medium detected")
11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected")
12 SENSE_CODE(0x0005, "End-of-data detected")
51 SENSE_CODE(0x0409, "Logical unit not ready, self-test in progress")
64 SENSE_CODE(0x0417, "Logical unit not ready, calibration required")
87 SENSE_CODE(0x0801, "Logical unit communication time-out")
89 SENSE_CODE(0x0803, "Logical unit communication CRC error (Ultra-DMA/32)")
102 SENSE_CODE(0x0B01, "Warning - specified temperature exceeded")
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dqcm6490-shift-otter.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &rmtfs_mem;
28 chassis-type = "handset";
36 #address-cells = <2>;
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