Searched full:mpidr_el1 (Results 1 – 21 of 21) sorted by relevance
| /linux-6.14.4/arch/arm64/kernel/ |
| D | sleep.S | 10 * Implementation of MPIDR_EL1 hash algorithm through shifting
18 * @mpidr: register containing MPIDR_EL1 value
79 mrs x7, mpidr_el1
120 mrs x1, mpidr_el1
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| D | setup.c | 138 * An index can be created from the MPIDR_EL1 by isolating the in smp_build_mpidr_hash()
142 * the MPIDR_EL1 through shifting and ORing. It is a collision free in smp_build_mpidr_hash()
145 * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}. in smp_build_mpidr_hash()
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| D | head.S | 340 mrs x2, mpidr_el1
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| D | cpufeature.c | 3854 * MIDR_EL1, MPIDR_EL1 or REVIDR_EL1.
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| /linux-6.14.4/arch/arm64/kvm/hyp/nvhe/ |
| D | sysreg-sr.c | 31 __sysreg_restore_el1_state(ctxt, ctxt_sys_reg(ctxt, MPIDR_EL1)); in __sysreg_restore_state_nvhe()
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| /linux-6.14.4/Documentation/devicetree/bindings/arm/ |
| D | cpus.yaml | 69 and matches the MPIDR_EL1 register affinity bits.
74 bits [39:32] of MPIDR_EL1.
77 bits [23:0] of MPIDR_EL1.
82 of MPIDR_EL1.
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| /linux-6.14.4/arch/arm64/kvm/hyp/vhe/ |
| D | sysreg-sr.c | 90 write_sysreg(__vcpu_sys_reg(vcpu, MPIDR_EL1), vmpidr_el2); in __sysreg_restore_vel2_state()
236 mpidr = ctxt_sys_reg(guest_ctxt, MPIDR_EL1); in __vcpu_load_switch_sysregs()
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| /linux-6.14.4/arch/arm64/include/asm/ |
| D | kvm_host.h | 417 MPIDR_EL1, /* MultiProcessor Affinity Register */ enumerator
1032 * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but in __vcpu_read_sys_reg_from_cpu()
1034 * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's in __vcpu_read_sys_reg_from_cpu()
1083 * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but in __vcpu_write_sys_reg_to_cpu()
1329 ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr(); in kvm_init_host_cpu_context()
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| D | cputype.h | 300 return read_cpuid(MPIDR_EL1); in read_cpuid_mpidr()
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| D | el2_setup.h | 175 mrs x1, mpidr_el1
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| D | kvm_emulate.h | 446 return __vcpu_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK; in kvm_vcpu_get_mpidr_aff()
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| D | sysreg.h | 984 /* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */
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| /linux-6.14.4/tools/arch/arm64/include/asm/ |
| D | cputype.h | 294 return read_cpuid(MPIDR_EL1); in read_cpuid_mpidr()
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| D | sysreg.h | 980 /* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */
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| /linux-6.14.4/drivers/perf/hisilicon/ |
| D | hisi_uncore_sllc_pmu.c | 295 * while SCCL_ID is from MPIDR_EL1 by CPU. in hisi_sllc_pmu_init_data()
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| D | hisi_uncore_pmu.c | 441 * determined from the MPIDR_EL1, but the encoding varies by CPU:
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| /linux-6.14.4/Documentation/arch/arm64/ |
| D | cpu-feature-registers.rst | 409 get_cpu_ftr(MPIDR_EL1);
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| /linux-6.14.4/tools/testing/selftests/kvm/arm64/ |
| D | get-reg-list.c | 411 ARM64_SYS_REG(3, 0, 0, 0, 5), /* MPIDR_EL1 */
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| /linux-6.14.4/arch/arm64/tools/ |
| D | sysreg | 2491 Field 26 MPIDR_EL1
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| /linux-6.14.4/arch/arm64/kvm/ |
| D | sys_regs.c | 764 vcpu_write_sys_reg(vcpu, mpidr, MPIDR_EL1); in reset_mpidr()
2616 { SYS_DESC(SYS_MPIDR_EL1), NULL, reset_mpidr, MPIDR_EL1 },
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| D | emulate-nested.c | 1342 SR_FGT(SYS_MPIDR_EL1, HFGxTR, MPIDR_EL1, 1),
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