| /linux-6.14.4/Documentation/devicetree/bindings/cache/ |
| D | qcom,llcc.yaml | 4 $id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
23 - qcom,ipq5424-llcc
24 - qcom,qcs615-llcc
25 - qcom,qcs8300-llcc
26 - qcom,qdu1000-llcc
27 - qcom,sa8775p-llcc
28 - qcom,sar1130p-llcc
29 - qcom,sar2130p-llcc
30 - qcom,sc7180-llcc
[all …]
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| /linux-6.14.4/include/linux/soc/qcom/ |
| D | llcc-qcom.h | 73 * @slice_id: llcc slice id
74 * @slice_size: Size allocated for the llcc slice
82 * struct llcc_edac_reg_data - llcc edac registers data for each error type
100 /* LLCC TRP registers */
110 /* LLCC Common registers */
115 /* LLCC DRP registers */
128 * struct llcc_drv_data - Data associated with the llcc driver
129 * @regmaps: regmaps associated with the llcc device
130 * @bcast_regmap: regmap associated with llcc broadcast OR offset
131 * @bcast_and_regmap: regmap associated with llcc broadcast AND offset
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,msm8998-bwmon.yaml | 20 (DDR) - called LLCC BWMON.
37 - qcom,sm6350-llcc-bwmon
46 - qcom,qcs615-llcc-bwmon
47 - qcom,qcs8300-llcc-bwmon
48 - qcom,sa8775p-llcc-bwmon
49 - qcom,sc7180-llcc-bwmon
50 - qcom,sc8280xp-llcc-bwmon
52 - qcom,sm8250-llcc-bwmon
53 - qcom,sm8550-llcc-bwmon
54 - qcom,sm8650-llcc-bwmon
[all …]
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| /linux-6.14.4/drivers/edac/ |
| D | qcom_edac.c | 12 #include <linux/soc/qcom/llcc-qcom.h>
265 "LLCC Data RAM correctable Error"); in dump_syn_reg()
269 "LLCC Data RAM uncorrectable Error"); in dump_syn_reg()
273 "LLCC Tag RAM correctable Error"); in dump_syn_reg()
277 "LLCC Tag RAM uncorrectable Error"); in dump_syn_reg()
352 edev_ctl = edac_device_alloc_ctl_info(0, "qcom-llcc", 1, "bank", in qcom_llcc_edac_probe()
362 edev_ctl->ctl_name = "llcc"; in qcom_llcc_edac_probe()
365 /* Check if LLCC driver has passed ECC IRQ */ in qcom_llcc_edac_probe()
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| D | Kconfig | 483 As of now, it supports error reporting for Last Level Cache Controller (LLCC)
|
| /linux-6.14.4/drivers/soc/qcom/ |
| D | llcc-qcom.c | 21 #include <linux/soc/qcom/llcc-qcom.h>
71 * struct llcc_slice_config - Data associated with the llcc slice
73 * @slice_id: llcc slice id for each client
87 * When configured to 0 all ways in llcc are probed.
3120 /* LLCC Common registers */
3125 /* LLCC DRP registers */
3147 /* LLCC Common registers */
3152 /* LLCC DRP registers */
3164 /* LLCC register offset starting from v1.0.0 */
3170 /* LLCC register offset starting from v2.0.1 */
[all …]
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| D | Kconfig | 48 tristate "Qualcomm Technologies, Inc. LLCC driver"
53 Last Level Cache Controller(LLCC) driver for platforms such as,
54 SDM845. This provides interfaces to clients that use the LLCC.
55 Say yes here to enable LLCC slice driver.
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| D | Makefile | 36 obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
|
| D | icc-bwmon.c | 862 { .compatible = "qcom,sdm845-llcc-bwmon", .data = &sdm845_llcc_bwmon_data },
863 { .compatible = "qcom,sc7280-llcc-bwmon", .data = &sc7280_llcc_bwmon_data },
|
| /linux-6.14.4/Documentation/devicetree/bindings/arm/ |
| D | qcom-soc.yaml | 18 qcom,sdm845-llcc-bwmon
|
| /linux-6.14.4/drivers/gpu/drm/msm/disp/dpu1/catalog/ |
| D | dpu_6_9_sm6375.h | 116 .min_llcc_ib = 0, /* No LLCC on this SoC */
|
| D | dpu_1_15_msm8917.h | 128 .min_llcc_ib = 0, /* No LLCC on this SoC */
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| D | dpu_1_14_msm8937.h | 150 .min_llcc_ib = 0, /* No LLCC on this SoC */
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| D | dpu_1_16_msm8953.h | 157 .min_llcc_ib = 0, /* No LLCC on this SoC */
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| D | dpu_5_4_sm6125.h | 185 .min_llcc_ib = 0, /* No LLCC on this SoC */
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| D | dpu_1_7_msm8996.h | 274 .min_llcc_ib = 0, /* No LLCC on this SoC */
|
| /linux-6.14.4/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_crtc.h | 194 * @bw_split_vote : true if bw controlled by llcc/dram bw properties
|
| D | dpu_hw_catalog.h | 735 * @min_llcc_ib minimum llcc ib vote in kbps
|
| /linux-6.14.4/arch/arm64/boot/dts/qcom/ |
| D | ipq5424.dtsi | 163 compatible = "qcom,ipq5424-llcc";
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| D | sdm850-samsung-w737.dts | 394 &llcc {
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| D | qcs8300.dtsi | 2678 compatible = "qcom,qcs8300-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
2787 llcc: system-cache-controller@9200000 { label
2788 compatible = "qcom,qcs8300-llcc";
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| D | qcs615.dtsi | 3065 compatible = "qcom,qcs615-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
3175 llcc: system-cache-controller@9200000 { label
3176 compatible = "qcom,qcs615-llcc";
|
| D | sm6350.dtsi | 1763 compatible = "qcom,sm6350-llcc";
1783 compatible = "qcom,sm6350-llcc-bwmon", "qcom,sdm845-bwmon";
1822 compatible = "qcom,sm6350-cpu-bwmon", "qcom,sc7280-llcc-bwmon";
|
| /linux-6.14.4/drivers/gpu/drm/msm/adreno/ |
| D | a6xx_gpu.c | 15 #include <linux/soc/qcom/llcc-qcom.h>
1866 /* No LLCC on non-RPMh (and by extension, non-GMU) SoCs */ in a6xx_llc_slices_destroy()
1879 /* No LLCC on non-RPMh (and by extension, non-GMU) SoCs */ in a6xx_llc_slices_init()
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| /linux-6.14.4/drivers/net/ethernet/sun/ |
| D | cassini.h | 2200 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP, \
2298 { "LLCc?",0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S3_CLNP,
2378 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP,
2434 { "LLCc?", 0xff00, 0x0300, OP_EQ, 2, S1_IPV4, 0, S1_CLNP,
|