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/linux-6.14.4/drivers/s390/cio/
Dcmf.c27 #include <asm/cmb.h>
220 if (!cdev->private->cmb) in set_schib_wait()
288 cmb_data = cdev->private->cmb; in cmf_copy_block()
306 if (!cdev->private->cmb) in cmf_cmb_copy_wait()
356 cmb_data = cdev->private->cmb; in cmf_generic_reset()
371 * struct cmb_area - container for global cmb data
379 struct cmb *mem;
391 /* ****** old style CMB handling ********/
406 * struct cmb - basic channel measurement block
419 * The cmb area made up from these blocks must be a contiguous array and may
[all …]
Dio_sch.h175 void *cmb; /* measurement information */ member
177 u64 cmb_start_time; /* clock value of cmb reset */
178 void *cmb_wait; /* deferred cmb enable/disable */
/linux-6.14.4/Documentation/ABI/testing/
Dsysfs-bus-coresight-devices-tpdm178 Description: (Write) Set the data collection mode of CMB tpdm. Continuous
179 change creates CMB data set elements on every CMBCLK edge.
180 Trace-on-change creates CMB data set elements only when a new
182 in a CMB data set.
185 0 : Continuous CMB collection mode.
186 1 : Trace-on-change CMB collection mode.
193 (RW) Set/Get the value of the trigger pattern for the CMB
201 (RW) Set/Get the mask of the trigger pattern for the CMB
209 (RW) Set/Get the value of the pattern for the CMB subunit TPDM.
216 (RW) Set/Get the mask of the pattern for the CMB subunit TPDM.
[all …]
/linux-6.14.4/drivers/hwtracing/coresight/
Dcoresight-tpdm.h12 /* CMB Subunit Registers */
14 /* CMB subunit timestamp insertion enable register */
16 /* CMB subunit timestamp pattern registers */
18 /* CMB subunit timestamp pattern mask registers */
20 /* CMB subunit trigger pattern registers */
22 /* CMB subunit trigger pattern mask registers */
24 /* CMB MSR register */
27 /* Enable bit for CMB subunit */
29 /* Trace collection mode for CMB subunit */
33 /* CMB CTI timestamp request */
[all …]
Dcoresight-tpdm.c73 drvdata->cmb->trig_patt[tpdm_attr->idx]); in tpdm_simple_dataset_show()
78 drvdata->cmb->trig_patt_mask[tpdm_attr->idx]); in tpdm_simple_dataset_show()
83 drvdata->cmb->patt_val[tpdm_attr->idx]); in tpdm_simple_dataset_show()
88 drvdata->cmb->patt_mask[tpdm_attr->idx]); in tpdm_simple_dataset_show()
93 drvdata->cmb->msr[tpdm_attr->idx]); in tpdm_simple_dataset_show()
148 drvdata->cmb->trig_patt[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
154 drvdata->cmb->trig_patt_mask[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
160 drvdata->cmb->patt_val[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
166 drvdata->cmb->patt_mask[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
172 drvdata->cmb->msr[tpdm_attr->idx] = val; in tpdm_simple_dataset_store()
[all …]
Dcoresight-tpda.h13 /* Aggregator port CMB data set element size bit */
31 * @cmb_esize Record the CMB element size.
Dcoresight-tpda.c77 "qcom,cmb-element-bits", &drvdata->cmb_esize); in tpdm_read_element_size()
/linux-6.14.4/Documentation/devicetree/bindings/arm/
Dqcom,coresight-tpdm.yaml13 Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
53 qcom,cmb-element-bits:
55 Specifies the CMB(Continuous Multi-Bit) element size supported by
57 is enabled. CMB element size currently only supports 8-bit, 32-bit
70 qcom,cmb-msrs-num:
72 Specifies the number of CMB MSR(mux select register) registers supported
74 this TPDM doesn't support CMB MSR.
132 qcom,cmb-element-bits = <64>;
133 qcom,cmb-msrs-num = <32>;
Dqcom,coresight-tpda.yaml15 task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
/linux-6.14.4/Documentation/driver-api/pci/
Dp2pdma.rst49 in that it exposes any CMB (Controller Memory Buffer) as a P2P memory
51 to be used directly (client) and it can also make use of the CMB as
56 to the P2P memory (CMB) and then to the NVMe device (and vice versa).
62 then the NVMe Target could use the RNIC's memory instead of the CMB
63 in cases where the NVMe cards in use do not have CMB support.
/linux-6.14.4/drivers/net/ethernet/atheros/atlx/
Datl1.h201 /* CMB/SMB Control Register */
208 /* CMB DMA Write Threshold Register */
215 /* RX/TX count-down timer to trigger CMB-write. 2us resolution. */
222 /* Number of packet received since last CMB write */
225 /* Number of packet transmitted since last CMB write */
376 * CMB to host memory. Software should clear
377 * this bit when CMB info is processed. */
581 * message blocks (cmb, smb) described below
633 /* coalescing message block (cmb) */
635 struct coals_msg_block *cmb; member
[all …]
Datl1.c1084 /* init CMB */ in atl1_setup_ring_resources()
1085 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size; in atl1_setup_ring_resources()
1086 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0; in atl1_setup_ring_resources()
1087 adapter->cmb.dma += offset; in atl1_setup_ring_resources()
1088 adapter->cmb.cmb = (struct coals_msg_block *) in atl1_setup_ring_resources()
1092 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block); in atl1_setup_ring_resources()
1096 ((u8 *) adapter->cmb.cmb + in atl1_setup_ring_resources()
1234 adapter->cmb.dma = 0; in atl1_free_ring_resources()
1235 adapter->cmb.cmb = NULL; in atl1_free_ring_resources()
1480 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL), in atl1_configure()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dqcs8300.dtsi969 qcom,cmb-element-bits = <32>;
970 qcom,cmb-msrs-num = <32>;
1115 qcom,cmb-element-bits = <32>;
1116 qcom,cmb-msrs-num = <32>;
1134 qcom,cmb-element-bits = <64>;
1135 qcom,cmb-msrs-num = <32>;
1615 qcom,cmb-element-bits = <64>;
1616 qcom,cmb-msrs-num = <32>;
1634 qcom,cmb-element-bits = <64>;
1635 qcom,cmb-msrs-num = <32>;
[all …]
Dqcs615.dtsi1904 qcom,cmb-element-bits = <64>;
1905 qcom,cmb-msrs-num = <32>;
1924 qcom,cmb-element-bits = <32>;
1925 qcom,cmb-msrs-num = <32>;
1943 qcom,cmb-element-bits = <64>;
1944 qcom,cmb-msrs-num = <32>;
2015 qcom,cmb-element-bits = <32>;
2016 qcom,cmb-msrs-num = <32>;
2035 qcom,cmb-element-bits = <32>;
2036 qcom,cmb-msrs-num = <32>;
[all …]
Dx1e80100.dtsi6413 qcom,cmb-element-bits = <32>;
6414 qcom,cmb-msrs-num = <32>;
6470 qcom,cmb-element-bits = <32>;
6471 qcom,cmb-msrs-num = <32>;
6608 qcom,cmb-element-bits = <64>;
6609 qcom,cmb-msrs-num = <32>;
6646 qcom,cmb-element-bits = <32>;
6647 qcom,cmb-msrs-num = <32>;
6756 qcom,cmb-element-bits = <64>;
6757 qcom,cmb-msrs-num = <32>;
[all …]
Dsa8775p.dtsi2458 qcom,cmb-element-bits = <32>;
2459 qcom,cmb-msrs-num = <32>;
2517 qcom,cmb-element-bits = <32>;
2518 qcom,cmb-msrs-num = <32>;
2799 qcom,cmb-element-bits = <64>;
2800 qcom,cmb-msrs-num = <32>;
2819 qcom,cmb-element-bits = <64>;
2820 qcom,cmb-msrs-num = <32>;
2839 qcom,cmb-element-bits = <64>;
2840 qcom,cmb-msrs-num = <32>;
[all …]
/linux-6.14.4/arch/s390/include/asm/
Dcmb.h5 #include <uapi/asm/cmb.h>
/linux-6.14.4/drivers/net/ethernet/pensando/ionic/
Dionic_ethtool.c577 netdev_info(lif->netdev, "CMB rings are not supported on this device\n"); in ionic_validate_cmb_config()
584 "CMB rings for tx-push are not supported on this device\n"); in ionic_validate_cmb_config()
595 "CMB rings for rx-push are not supported on this device\n"); in ionic_validate_cmb_config()
606 "Not enough CMB pages for number of queues and size of descriptor rings, need %d have %d", in ionic_validate_cmb_config()
620 netdev_info(lif->netdev, "Please stop device to toggle CMB for tx/rx-push\n"); in ionic_cmb_rings_toggle()
642 netdev_info(lif->netdev, "Enabling CMB %s %s rings - %d pages\n", in ionic_cmb_rings_toggle()
645 netdev_info(lif->netdev, "Disabling CMB rings\n"); in ionic_cmb_rings_toggle()
Dionic_lif.c31 * 2 = ... with CMB rings
35 * 3 = ... with CMB rings
670 /* on-chip CMB q descriptors */ in ionic_qcq_alloc()
678 "Cannot allocate queue order %d from cmb: err %d\n", in ionic_qcq_alloc()
685 netdev_err(lif->netdev, "Cannot map queue from cmb\n"); in ionic_qcq_alloc()
2843 /* When changing CMB queue parameters, we're using limited in ionic_cmb_reconfig()
2864 "CMB reconfig failed, restoring values: %d\n", err); in ionic_cmb_reconfig()
2871 "CMB restore failed: %d\n", err); in ionic_cmb_reconfig()
2879 "CMB reconfig failed: %d\n", err); in ionic_cmb_reconfig()
2944 /* Are we changing q params while CMB is on */ in ionic_reconfigure_queues()
/linux-6.14.4/drivers/net/ethernet/atheros/atl1e/
Datl1e_hw.h213 #define IDLE_STATUS_CMB 0x80 /* 1: CMB state machine is in non-IDLE state. 0: CMB is …
495 /* CMB/SMB Control Register */
609 /* Tpd CMB DMA Address */
/linux-6.14.4/Documentation/driver-api/
Ds390-drivers.rst97 .. kernel-doc:: arch/s390/include/uapi/asm/cmb.h
/linux-6.14.4/drivers/nvme/host/
Dconstants.c97 [NVME_SC_CMD_NOT_SUP_CMB_QUEUE] = "Command Not Supported for Queue in CMB",
Dpci.c2001 * Controllers may support a CMB size larger than their BAR, for in nvme_map_cmb()
2002 * example, due to being behind a bridge. Reduce the CMB to the in nvme_map_cmb()
2013 * Tell the controller about the host side address mapping the CMB, in nvme_map_cmb()
2014 * and enable CMB decoding for the NVMe 1.4+ scheme: in nvme_map_cmb()
2024 "failed to register the CMB\n"); in nvme_map_cmb()
2270 static DEVICE_ATTR_RO(cmb);
/linux-6.14.4/drivers/staging/media/starfive/camss/
Dstf-isp.h244 #define CMB(n) ((n) << 0) macro
Dstf-isp-hw-ops.c295 stf_isp_reg_write(stfcamss, ISP_REG_CS_THRESHOLD, CMD(0x1f) | CMB(0x1)); in stf_isp_config_sat()

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