Home
last modified time | relevance | path

Searched +full:1 +full:kib (Results 1 – 25 of 326) sorted by relevance

12345678910>>...14

/linux-6.14.4/Documentation/filesystems/ext4/
Dblocks.rst7 sectors between 1KiB and 64KiB, and the number of sectors must be an
10 4KiB. You may experience mounting problems if block size is greater than
11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory
20 :widths: 1 1 1 1 1
21 :header-rows: 1
24 - 1KiB
25 - 2KiB
26 - 4KiB
27 - 64KiB
66 - 1,074,791,436
[all …]
/linux-6.14.4/Documentation/mm/damon/
Dmonitoring_intervals_tuning_example.rst32 # damo record --snapshot 0 1
46 1 addr 22.037 GiB size 6.029 GiB access 0 % age 5.300 s
99 # damo record --snapshot 0 1
103 1 addr 49.275 GiB size 6.195 GiB access 0 % age 6 m 14 s
114 12 addr 56.364 GiB size 4.000 KiB access 95 % age 16 s
115 13 addr 49.275 GiB size 4.000 KiB access 100 % age 8 m 24 s # hottest
123 [-5,519,996,000, 3,800,005,000) 4.000 KiB |* |
129 [50,400,010,000, 59,720,011,000) 4.000 KiB |* |
132 DAMON found two distinct 4 KiB regions that pretty hot. The regions are also
133 well aged. The hottest 4 KiB region was keeping the access frequency for about
[all …]
/linux-6.14.4/arch/x86/platform/intel-quark/
Dimr_selftest.c56 * zero sized allocations and 1 KiB sized areas.
84 /* Test that a 1 KiB IMR @ zero with read/write all will bomb out. */ in imr_self_test()
87 imr_self_test_result(ret < 0, "1KiB IMR @ 0x00000000 - access-all\n"); in imr_self_test()
89 /* Test that a 1 KiB IMR @ zero with CPU only will work. */ in imr_self_test()
91 imr_self_test_result(ret >= 0, "1KiB IMR @ 0x00000000 - cpu-access\n"); in imr_self_test()
97 /* Test 2 KiB works. */ in imr_self_test()
100 imr_self_test_result(ret >= 0, "2KiB IMR @ 0x00000000\n"); in imr_self_test()
103 imr_self_test_result(ret == 0, "teardown 2KiB\n"); in imr_self_test()
Dimr.c56 * 23:2 1 KiB aligned lo address
57 * 1:0 Reserved
61 * 23:2 1 KiB aligned hi address
62 * 1:0 Reserved
213 size = end - base + 1; in imr_dbgfs_state_show()
252 pr_err("base %pa size 0x%08zx must align to 1KiB\n", in imr_check_params()
292 * @base: physical base address of region aligned to 1KiB.
293 * @size: physical size of region in bytes must be aligned to 1KiB.
339 reg = -1; in imr_add_range()
358 if (reg == -1) { in imr_add_range()
[all …]
/linux-6.14.4/Documentation/networking/
Dsmc-sysctl.rst18 the under device in 1 single sending. If set to 0, the SMC auto corking
34 - 1 - Use virtually contiguous buffers
48 The minimum value is 16KiB and there is no hard limit for max value, but
49 only allowed 512KiB for SMC-R and 1MiB for SMC-D.
51 Default: 64KiB
56 The minimum value is 16KiB and there is no hard limit for max value, but
57 only allowed 512KiB for SMC-R and 1MiB for SMC-D.
59 Default: 64KiB
64 of RDMA devices exist in the system. The acceptable value ranges from 1 to 2. Only
65 for SMC-R v2.1 and later.
[all …]
/linux-6.14.4/arch/arm/boot/dts/broadcom/
Dbcm2837.dtsi31 <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
38 #address-cells = <1>;
43 * https://developer.arm.com/documentation/ddi0500/e/level-1-memory-system
57 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
60 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
64 cpu1: cpu@1 {
67 reg = <1>;
72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
75 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
87 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
[all …]
Dbcm2836.dtsi32 <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
39 #address-cells = <1>;
58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
61 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
65 v7_cpu1: cpu@1 {
72 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
75 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
86 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
89 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
100 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
[all …]
/linux-6.14.4/Documentation/arch/arm/
Dtcm.rst8 This is usually just a few (4-64) KiB of RAM inside the ARM
15 The size of DTCM or ITCM is minimum 4KiB so the typical
16 minimum configuration is 4KiB ITCM and 4KiB DTCM.
24 determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present
39 implementation will map the TCM 1 to 1 from physical to virtual
42 on, supporting a maximum of 32KiB of ITCM and 32KiB of DTCM.
45 TCMs in two separate banks, so for example an 8KiB ITCM is divided
46 into two 4KiB banks with its own control registers. The idea is to
153 tcmem[1] = 0x2BADBABEU;
/linux-6.14.4/Documentation/admin-guide/device-mapper/
Ddm-ebs.rst30 1, 2, 4, 8 sectors of 512 bytes supported.
36 2^N supported, e.g. 8 = emulate 8 sectors of 512 bytes = 4KiB.
42 Emulate 1 sector = 512 bytes logical block size on /dev/sda starting at
45 ebs /dev/sda 1024 1
47 Emulate 2 sector = 1KiB logical block size on /dev/sda starting at
48 offset 128 sectors, enforce 2KiB underlying device block size.
49 This presumes 2KiB logical blocksize on /dev/sda or less to work:
/linux-6.14.4/arch/arm64/boot/dts/broadcom/
Dbcm2712.dtsi44 #address-cells = <1>;
61 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
64 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
71 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
78 cpu1: cpu@1 {
85 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
88 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
95 cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set
109 d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
112 i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set
[all …]
/linux-6.14.4/Documentation/gpu/
Ddrm-usage-stats.rst12 feasible `top(1)` like userspace monitoring tools.
34 1. Mandatory, fully standardised.
67 duplicated and shared file descriptors. Conceptually the value should map 1:1
157 Default unit shall be bytes with optional unit specifiers of 'KiB' or 'MiB'
160 - drm-total-<region>: <uint> [KiB|MiB]
168 - drm-shared-<region>: <uint> [KiB|MiB]
174 - drm-resident-<region>: <uint> [KiB|MiB]
179 - drm-memory-<region>: <uint> [KiB|MiB]
184 - drm-purgeable-<region>: <uint> [KiB|MiB]
192 - drm-active-<region>: <uint> [KiB|MiB]
/linux-6.14.4/tools/perf/arch/x86/util/
Dintel-bts.c28 #define KiB(x) ((x) * 1024) macro
30 #define KiB_MASK(x) (KiB(x) - 1)
31 #define MiB_MASK(x) (MiB(x) - 1)
114 bool privileged = perf_event_paranoid_check(-1); in intel_bts_recording_options()
131 evsel->core.attr.sample_period = 1; in intel_bts_recording_options()
157 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options()
159 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options()
163 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options()
194 opts->auxtrace_mmap_pages = KiB(128) / page_size; in intel_bts_recording_options()
196 opts->mmap_pages = KiB(256) / page_size; in intel_bts_recording_options()
[all …]
/linux-6.14.4/drivers/mtd/tests/
Dspeedtest.c200 if (mtd->writesize == 1) { in mtd_speedtest_init()
243 /* Write all eraseblocks, 1 eraseblock at a time */ in mtd_speedtest_init()
259 pr_info("eraseblock write speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
261 /* Read all eraseblocks, 1 eraseblock at a time */ in mtd_speedtest_init()
277 pr_info("eraseblock read speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
283 /* Write all eraseblocks, 1 page at a time */ in mtd_speedtest_init()
299 pr_info("page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
301 /* Read all eraseblocks, 1 page at a time */ in mtd_speedtest_init()
317 pr_info("page read speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
339 pr_info("2 page write speed is %ld KiB/s\n", speed); in mtd_speedtest_init()
[all …]
/linux-6.14.4/drivers/gpu/drm/imagination/
Dpvr_mmu.h32 * device page sizes are: 4KiB, 16KiB, 64KiB, 256KiB, 1MiB and 2MiB.
89 #define PVR_PAGE_TABLE_ADDR_MASK (PVR_PAGE_TABLE_ADDR_SPACE_SIZE - 1)
/linux-6.14.4/arch/arm/boot/dts/marvell/
Darmada-385-linksys-rango.dts25 wan_white@1 {
86 #address-cells = <1>;
87 #size-cells = <1>;
97 reg = <0x200000 0x20000>; /* 128KiB */
102 reg = <0x220000 0x40000>; /* 256KiB */
107 reg = <0x7e0000 0x40000>; /* 256KiB */
113 reg = <0x820000 0x1e0000>; /* 1920KiB */
163 no-1-8-v;
/linux-6.14.4/tools/perf/arch/arm64/util/
Darm-spe.c32 #define KiB(x) ((x) * 1024) macro
114 if (perf_pmu__scan_file(pmu, "caps/min_interval", "%lu", &val) != 1) in arm_spe_save_cpu_header()
176 * snapshot size is specified, then the default is 4MiB for privileged users, 128KiB for in arm_spe_snapshot_resolve_auxtrace_defaults()
179 * The default auxtrace mmap size is 4MiB/page_size for privileged users, 128KiB for in arm_spe_snapshot_resolve_auxtrace_defaults()
181 * will be reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the in arm_spe_snapshot_resolve_auxtrace_defaults()
192 opts->auxtrace_mmap_pages = KiB(128) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults()
194 opts->mmap_pages = KiB(256) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults()
197 opts->mmap_pages = KiB(256) / page_size; in arm_spe_snapshot_resolve_auxtrace_defaults()
231 &sample_period) != 1) { in arm_spe_pmu__sample_period()
258 evsel__set_config_if_unset(evsel->pmu, evsel, "ts_enable", 1); in arm_spe_setup_evsel()
[all …]
Dhisi-ptt.c27 #define KiB(x) ((x) * 1024) macro
66 bool privileged = perf_event_paranoid_check(-1); in hisi_ptt_set_auxtrace_mmap_page()
75 opts->auxtrace_mmap_pages = KiB(128) / page_size; in hisi_ptt_set_auxtrace_mmap_page()
77 opts->mmap_pages = KiB(256) / page_size; in hisi_ptt_set_auxtrace_mmap_page()
84 size_t min_sz = KiB(8); in hisi_ptt_set_auxtrace_mmap_page()
115 evsel->core.attr.sample_period = 1; in hisi_ptt_recording_options()
141 tracking_evsel->core.attr.sample_period = 1; in hisi_ptt_recording_options()
/linux-6.14.4/drivers/mtd/nand/onenand/
DKconfig16 from 1 to 0. There is a rare possibility that even though the
49 Also, 1st Block of NAND Flash Array can be used as OTP.
63 of 4KiB. Plane1 has only even blocks such as block0, block2, block4
65 So MTD regards it as 4KiB page size and 256KiB block size
/linux-6.14.4/Documentation/driver-api/mtd/
Dspi-nor.rst33 1) Specify the controller that you used to test the flash and specify
41 root@1:~# cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
43 root@1:~# cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
45 root@1:~# cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
47 root@1:~# xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
51 1d81ed0f773830b030b0f7ffffff29c25cfff030c080ffffffffffffffff
69 root@1:~# sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
79 root@1:~# cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
81 1S-1S-1S
85 1S-1S-1S (fast read)
[all …]
/linux-6.14.4/arch/arm64/boot/dts/hisilicon/
Dhi3798cv200.dtsi34 d-cache-size = <0x8000>; /* 32 KiB */
37 i-cache-size = <0x8000>; /* 32 KiB */
43 cpu@1 {
48 d-cache-size = <0x8000>; /* 32 KiB */
51 i-cache-size = <0x8000>; /* 32 KiB */
62 d-cache-size = <0x8000>; /* 32 KiB */
65 i-cache-size = <0x8000>; /* 32 KiB */
76 d-cache-size = <0x8000>; /* 32 KiB */
79 i-cache-size = <0x8000>; /* 32 KiB */
89 cache-size = <0x80000>; /* 512 KiB */
[all …]
/linux-6.14.4/arch/
DKconfig565 An arch should select this symbol to support seccomp mode 1 (the fixed
585 - secure_computing return value is checked and a return value of -1
754 depends on $(success,$(NM) --help | head -n 1 | grep -qi llvm)
755 depends on $(success,$(AR) --help | head -n 1 | grep -qi llvm)
1215 bool "4KiB pages"
1218 This option select the standard 4KiB Linux page size and the only
1219 available option on many architectures. Using 4KiB page size will
1223 assumptions about the page size and only runs on 4KiB pages.
1226 bool "8KiB pages"
1230 processors, and can be slightly faster than 4KiB pages.
[all …]
/linux-6.14.4/fs/jffs2/
Dbuild.c85 if (child_ic->pino_nlink > 1) in jffs2_build_inode_pass1()
86 *dir_hardlinks = 1; in jffs2_build_inode_pass1()
120 dbg_fsbuild("pass 1 starting\n"); in jffs2_build_filesystem()
130 dbg_fsbuild("pass 1 complete\n"); in jffs2_build_filesystem()
199 * value (which is 1). */ in jffs2_build_filesystem()
276 whinged = 1; in jffs2_build_remove_unlinked_inode()
327 size += c->sector_size - 1; /* ... and round up */ in jffs2_calc_trigger_levels()
333 c->resv_blocks_gctrigger = c->resv_blocks_write + 1; in jffs2_calc_trigger_levels()
337 c->resv_blocks_gcmerge = c->resv_blocks_deletion + 1; in jffs2_calc_trigger_levels()
355 dbg_fsbuild("trigger levels (size %d KiB, block size %d KiB, %d blocks)\n", in jffs2_calc_trigger_levels()
[all …]
/linux-6.14.4/Documentation/core-api/
Dswiotlb.rst100 with a max of 1 GiB, which has the potential to be very wasteful of memory.
107 bytes, which is 256 KiB with current definitions. When a device's DMA settings
109 must be limited to that 256 KiB. This value is communicated to higher-level
114 A key device DMA setting is "min_align_mask", which is a power of 2 minus 1
123 swiotlb, max_sectors_kb might be 512 KiB or larger. If a device might use
124 swiotlb, max_sectors_kb will be 256 KiB. When min_align_mask is non-zero,
125 max_sectors_kb might be even smaller, such as 252 KiB.
136 devices. It is set to the granule size - 1 so that the bounce buffer is
153 Each pool is divided into "slots" of size IO_TLB_SIZE, which is 2 KiB with
214 until it succeeds, but with a minimum size of 1 MiB. Given sufficient system
[all …]
/linux-6.14.4/include/linux/mtd/
Dspi-nor.h25 #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
41 #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */
42 #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
43 #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */
45 #define SPINOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */
67 #define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */
68 #define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */
69 #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */
102 #define SR_WEL BIT(1) /* Write enable latch */
105 #define SR_BP1 BIT(3) /* Block protect 1 */
[all …]
/linux-6.14.4/Documentation/filesystems/nfs/
Drpc-server-gss.rst8 NFSv4.1 and higher don't require the client to act as a server for the
55 A) It can handle tokens that are no bigger than 2KiB
58 beyond 64KiB in size due to various authorization extensions attacked to
65 back to the kernel (4KiB).
85 to /var/run/gssproxy.sock and then write "1" to
93 "1"--the read will block until gss-proxy has done its write to the file.

12345678910>>...14