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12

/linux-6.14.4/drivers/gpu/drm/radeon/reg_srcs/
Dr1001 r100 0x3294
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
/linux-6.14.4/arch/arm/mach-omap2/
Dprm7xx.h26 #define DRA7XX_PRM_BASE 0x4ae06000
33 #define DRA7XX_PRM_OCP_SOCKET_INST 0x0000
34 #define DRA7XX_PRM_CKGEN_INST 0x0100
35 #define DRA7XX_PRM_MPU_INST 0x0300
36 #define DRA7XX_PRM_DSP1_INST 0x0400
37 #define DRA7XX_PRM_IPU_INST 0x0500
38 #define DRA7XX_PRM_COREAON_INST 0x0628
39 #define DRA7XX_PRM_CORE_INST 0x0700
40 #define DRA7XX_PRM_IVA_INST 0x0f00
41 #define DRA7XX_PRM_CAM_INST 0x1000
[all …]
/linux-6.14.4/drivers/accel/habanalabs/include/gaudi2/asic_reg/
Ddcore0_tpc0_eml_spmu_regs.h23 #define mmDCORE0_TPC0_EML_SPMU_PMEVCNTR0_EL0 0x1000
25 #define mmDCORE0_TPC0_EML_SPMU_PMEVCNTR1_EL0 0x1008
27 #define mmDCORE0_TPC0_EML_SPMU_PMEVCNTR2_EL0 0x1010
29 #define mmDCORE0_TPC0_EML_SPMU_PMEVCNTR3_EL0 0x1018
31 #define mmDCORE0_TPC0_EML_SPMU_PMEVCNTR4_EL0 0x1020
33 #define mmDCORE0_TPC0_EML_SPMU_PMEVCNTR5_EL0 0x1028
35 #define mmDCORE0_TPC0_EML_SPMU_PMCCNTR_L_EL0 0x10F8
37 #define mmDCORE0_TPC0_EML_SPMU_PMCCNTR_H_EL0 0x10FC
39 #define mmDCORE0_TPC0_EML_SPMU_PMTRC 0x1200
41 #define mmDCORE0_TPC0_EML_SPMU_TRC_CTRL_HOST 0x1204
[all …]
/linux-6.14.4/lib/
Dcrc16.c10 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */
12 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
13 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
14 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
15 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
16 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
17 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
18 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
19 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
20 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dqcom,pcie-sc7280.yaml95 reg = <0 0x01c08000 0 0x3000>,
96 <0 0x40000000 0 0xf1d>,
97 <0 0x40000f20 0 0xa8>,
98 <0 0x40001000 0 0x1000>,
99 <0 0x40100000 0 0x100000>;
101 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
102 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
104 bus-range = <0x00 0xff>;
156 interrupt-map-mask = <0 0 0 0x7>;
157 interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/linux-6.14.4/drivers/perf/hisilicon/
Dhisi_uncore_cpa_pmu.c23 #define CPA_PERF_CTRL 0x1c00
24 #define CPA_EVENT_CTRL 0x1c04
25 #define CPA_INT_MASK 0x1c70
26 #define CPA_INT_STATUS 0x1c78
27 #define CPA_INT_CLEAR 0x1c7c
28 #define CPA_EVENT_TYPE0 0x1c80
29 #define CPA_VERSION 0x1cf0
30 #define CPA_CNT0_LOWER 0x1d00
31 #define CPA_CFG_REG 0x0534
34 #define CPA_PERF_CTRL_EN BIT_ULL(0)
[all …]
Dhisi_uncore_pa_pmu.c20 #define PA_PERF_CTRL 0x1c00
21 #define PA_EVENT_CTRL 0x1c04
22 #define PA_TT_CTRL 0x1c08
23 #define PA_TGTID_CTRL 0x1c14
24 #define PA_SRCID_CTRL 0x1c18
27 #define PA_INT_MASK 0x1c70
28 #define PA_INT_STATUS 0x1c78
29 #define PA_INT_CLEAR 0x1c7c
31 #define H60PA_INT_STATUS 0x1c70
32 #define H60PA_INT_MASK 0x1c74
[all …]
/linux-6.14.4/include/video/
Daty128.h13 #define CLOCK_CNTL_INDEX 0x0008
14 #define CLOCK_CNTL_DATA 0x000c
15 #define BIOS_0_SCRATCH 0x0010
16 #define BUS_CNTL 0x0030
17 #define BUS_CNTL1 0x0034
18 #define GEN_INT_CNTL 0x0040
19 #define CRTC_GEN_CNTL 0x0050
20 #define CRTC_EXT_CNTL 0x0054
21 #define DAC_CNTL 0x0058
22 #define I2C_CNTL_1 0x0094
[all …]
/linux-6.14.4/drivers/media/pci/cx25821/
Dcx25821-medusa-reg.h13 #define HOST_REGISTER1 0x0000
14 #define HOST_REGISTER2 0x0001
17 #define CHIP_CTRL 0x0100
18 #define AFE_AB_CTRL 0x0104
19 #define AFE_CD_CTRL 0x0108
20 #define AFE_EF_CTRL 0x010C
21 #define AFE_GH_CTRL 0x0110
22 #define DENC_AB_CTRL 0x0114
23 #define BYP_AB_CTRL 0x0118
24 #define MON_A_CTRL 0x011C
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtw88/
Drtw8822c.h11 u8 res0[0x30]; /* 0x120 */
12 u8 vid[2]; /* 0x150 */
15 u8 mac_addr[ETH_ALEN]; /* 0x157 */
16 u8 res2[0x3d];
20 u8 res0[0x4a]; /* 0x120 */
21 u8 mac_addr[ETH_ALEN]; /* 0x16a */
25 u8 mac_addr[ETH_ALEN]; /* 0x120 */
33 u8 ltr_cap; /* 0x133 */
38 u8 res0:2; /* 0x144 */
65 u8 res1[0x09];
[all …]
/linux-6.14.4/arch/sh/boards/
Dboard-sh7757lcr.c27 .start = 0xffec005c, /* PUDR */
28 .end = 0xffec005c,
32 static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
51 #define GBECONT 0xffc10100
56 if (((unsigned long)addr & 0x00000fff) < 0x0800) in sh7757_eth_set_mdio_gate()
64 .start = 0xfef00000,
65 .end = 0xfef001ff,
68 .start = evt2irq(0xc80),
69 .end = evt2irq(0xc80),
82 .id = 0,
[all …]
/linux-6.14.4/drivers/video/fbdev/matrox/
Dmatroxfb_base.h92 #define PCI_SS_VENDOR_ID_SIEMENS_NIXDORF 0x110A
99 #define PCI_SS_ID_MATROX_GENERIC 0xFF00
100 #define PCI_SS_ID_MATROX_PRODUCTIVA_G100_AGP 0xFF01
101 #define PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP 0xFF02
102 #define PCI_SS_ID_MATROX_MILLENIUM_G200_AGP 0xFF03
103 #define PCI_SS_ID_MATROX_MARVEL_G200_AGP 0xFF04
104 #define PCI_SS_ID_MATROX_MGA_G100_PCI 0xFF05
105 #define PCI_SS_ID_MATROX_MGA_G100_AGP 0x1001
106 #define PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP 0x2179
107 #define PCI_SS_ID_SIEMENS_MGA_G100_AGP 0x001E /* 30 */
[all …]
/linux-6.14.4/drivers/gpu/drm/mgag200/
Dmgag200_reg.h24 #define MGAREG_DWGCTL 0x1c00
25 #define MGAREG_MACCESS 0x1c04
27 #define MGAREG_MCTLWTST 0x1c08
28 #define MGAREG_ZORG 0x1c0c
30 #define MGAREG_PAT0 0x1c10
31 #define MGAREG_PAT1 0x1c14
32 #define MGAREG_PLNWT 0x1c1c
34 #define MGAREG_BCOL 0x1c20
35 #define MGAREG_FCOL 0x1c24
37 #define MGAREG_SRC0 0x1c30
[all …]
/linux-6.14.4/drivers/clk/imx/
Dclk-imx93.c20 #define PLAT_IMX93 BIT(0)
65 { IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL },
66 { IMX93_CLK_A55_MTR_BUS, "a55_mtr_bus_root", 0x0080, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
67 { IMX93_CLK_A55, "a55_alt_root", 0x0100, FAST_SEL, CLK_IS_CRITICAL },
68 { IMX93_CLK_M33, "m33_root", 0x0180, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
69 { IMX93_CLK_BUS_WAKEUP, "bus_wakeup_root", 0x0280, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
70 { IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
71 { IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL },
72 { IMX93_CLK_SWO_TRACE, "swo_trace_root", 0x0400, LOW_SPEED_IO_SEL, },
73 { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, 0, PLAT_IMX93, },
[all …]
/linux-6.14.4/drivers/platform/x86/intel/pmc/
Dcore.h21 #define SLP_S0_RES_COUNTER_MASK GENMASK(31, 0)
23 #define PMC_BASE_ADDR_DEFAULT 0xFE000000
28 #define SPT_PMC_PCI_DEVICE_ID 0x9d21
29 #define SPT_PMC_BASE_ADDR_OFFSET 0x48
30 #define SPT_PMC_SLP_S0_RES_COUNTER_OFFSET 0x13c
31 #define SPT_PMC_PM_CFG_OFFSET 0x18
32 #define SPT_PMC_PM_STS_OFFSET 0x1c
33 #define SPT_PMC_MTPMC_OFFSET 0x20
34 #define SPT_PMC_MFPMC_OFFSET 0x38
35 #define SPT_PMC_LTR_IGNORE_OFFSET 0x30C
[all …]
/linux-6.14.4/drivers/gpu/drm/bridge/synopsys/
Ddw-hdmi-qp.h13 #define CORE_ID 0x0
14 #define VER_NUMBER 0x4
15 #define VER_TYPE 0x8
16 #define CONFIG_REG 0xc
19 #define CORE_TIMESTAMP_HHMM 0x14
20 #define CORE_TIMESTAMP_MMDD 0x18
21 #define CORE_TIMESTAMP_YYYY 0x1c
23 #define GLOBAL_SWRESET_REQUEST 0x40
26 #define GLOBAL_SWDISABLE 0x44
30 #define RESET_MANAGER_CONFIG0 0x48
[all …]
/linux-6.14.4/drivers/net/ethernet/qlogic/qed/
Dqed_init_ops.c26 0,
27 0,
28 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
29 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
30 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
31 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
32 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */
33 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */
34 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */
35 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dqcs6490-rb3gen2.dts78 reg = <0x0 0x80700000 0x0 0x100000>;
83 reg = <0x0 0x81800000 0x0 0x1e00000>;
88 reg = <0x0 0x84300000 0x0 0x500000>;
93 reg = <0x0 0x84800000 0x0 0x1900000>;
98 reg = <0x0 0x86100000 0x0 0x2800000>;
103 reg = <0x0 0x88900000 0x0 0x1e00000>;
108 reg = <0x0 0x8a700000 0x0 0x700000>;
113 reg = <0x0 0x8ae00000 0x0 0x500000>;
118 reg = <0x0 0x8b300000 0x0 0x10000>;
123 reg = <0x0 0x8b310000 0x0 0xa000>;
[all …]
/linux-6.14.4/drivers/net/wireless/intel/iwlwifi/
Diwl-fh.h22 #define FH_MEM_LOWER_BOUND (0x1000)
23 #define FH_MEM_UPPER_BOUND (0x2000)
24 #define FH_MEM_LOWER_BOUND_GEN2 (0xa06000)
25 #define FH_MEM_UPPER_BOUND_GEN2 (0xa08000)
42 * 31-0: Keep-warm buffer physical base address [35:4], must be 4K aligned
44 #define FH_KW_MEM_ADDR_REG (FH_MEM_LOWER_BOUND + 0x97C)
52 * (see struct iwl_tfd_frame). These 16 pointer registers are offset by 0x04
54 * aligned (address bits 0-7 must be 0).
59 * 27-0: TFD CB physical base address [35:8], must be 256-byte aligned
61 #define FH_MEM_CBBC_0_15_LOWER_BOUND (FH_MEM_LOWER_BOUND + 0x9D0)
[all …]
/linux-6.14.4/include/linux/mfd/mt6357/
Dregisters.h10 #define MT6357_TOP0_ID 0x0
11 #define MT6357_TOP0_REV0 0x2
12 #define MT6357_TOP0_DSN_DBI 0x4
13 #define MT6357_TOP0_DSN_DXI 0x6
14 #define MT6357_HWCID 0x8
15 #define MT6357_SWCID 0xa
16 #define MT6357_PONSTS 0xc
17 #define MT6357_POFFSTS 0xe
18 #define MT6357_PSTSCTL 0x10
19 #define MT6357_PG_DEB_STS0 0x12
[all …]
/linux-6.14.4/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7757.c33 DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */
34 DEFINE_RES_IRQ(evt2irq(0x700)),
39 .id = 0,
53 DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */
54 DEFINE_RES_IRQ(evt2irq(0xb80)),
73 DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */
74 DEFINE_RES_IRQ(evt2irq(0xf00)),
92 DEFINE_RES_MEM(0xfe430000, 0x20),
93 DEFINE_RES_IRQ(evt2irq(0x580)),
94 DEFINE_RES_IRQ(evt2irq(0x5a0)),
[all …]
/linux-6.14.4/arch/arm/boot/dts/ti/omap/
Ddra7.dtsi60 reg = <0x0 0x48211000 0x0 0x1000>,
61 <0x0 0x48212000 0x0 0x2000>,
62 <0x0 0x48214000 0x0 0x2000>,
63 <0x0 0x48216000 0x0 0x2000>;
72 reg = <0x0 0x48281000 0x0 0x1000>;
78 #size-cells = <0>;
80 cpu0: cpu@0 {
83 reg = <0>;
108 opp-supported-hw = <0xFF 0x01>;
118 opp-supported-hw = <0xFF 0x02>;
[all …]
/linux-6.14.4/sound/pci/cs46xx/
Ddsp_spos_scb_lib.c35 if (snd_BUG_ON(ins->symbol_table.nsymbols <= 0)) in remove_symbol()
37 if (snd_BUG_ON(symbol_index < 0 || in remove_symbol()
69 for (col = 0,j = 0;j < 0x10; j++,col++) { in cs46xx_dsp_proc_scb_info_read()
72 col = 0; in cs46xx_dsp_proc_scb_info_read()
154 for (i = 0; i < dword_count ; ++i ) { in _dsp_clear_sample_buffer()
155 writel(0, dst); in _dsp_clear_sample_buffer()
166 if (snd_BUG_ON(scb->index < 0 || in cs46xx_dsp_remove_scb()
171 #if 0 in cs46xx_dsp_remove_scb()
205 #if 0 in cs46xx_dsp_remove_scb()
280 (ins->the_null_scb->address << 0x10) | ins->the_null_scb->address; in _dsp_create_generic_scb()
[all …]
/linux-6.14.4/drivers/gpu/drm/meson/
Dmeson_registers.h18 #define VPP2_DUMMY_DATA 0x1900
19 #define VPP2_LINE_IN_LENGTH 0x1901
20 #define VPP2_PIC_IN_HEIGHT 0x1902
21 #define VPP2_SCALE_COEF_IDX 0x1903
22 #define VPP2_SCALE_COEF 0x1904
23 #define VPP2_VSC_REGION12_STARTP 0x1905
24 #define VPP2_VSC_REGION34_STARTP 0x1906
25 #define VPP2_VSC_REGION4_ENDP 0x1907
26 #define VPP2_VSC_START_PHASE_STEP 0x1908
27 #define VPP2_VSC_REGION0_PHASE_SLOPE 0x1909
[all …]
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h26 #define ixATTR00 0x0000
27 #define ixATTR01 0x0001
28 #define ixATTR02 0x0002
29 #define ixATTR03 0x0003
30 #define ixATTR04 0x0004
31 #define ixATTR05 0x0005
32 #define ixATTR06 0x0006
33 #define ixATTR07 0x0007
34 #define ixATTR08 0x0008
35 #define ixATTR09 0x0009
[all …]

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