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Searched defs:RCC_CFGR_PPRE1_DIV4 (Results 1 – 25 of 27) sorted by relevance

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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h4373 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f410tx.h4353 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f410cx.h4369 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f411xe.h4026 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f401xe.h4017 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f401xc.h4017 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f412cx.h8446 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f415xx.h9548 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f412zx.h9380 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f412vx.h9378 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f412rx.h9374 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f405xx.h9283 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f417xx.h9845 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f407xx.h9583 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f446xx.h10199 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f413xx.h9614 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f423xx.h9650 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f427xx.h10302 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f437xx.h10581 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f429xx.h10646 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
H A Dstm32f439xx.h10920 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/
H A Dstm32l073xx.h3953 #define RCC_CFGR_PPRE1_DIV4 (0x00000500U) /*!< HCLK divided by… macro
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h9599 #define RCC_CFGR_PPRE1_DIV4 0x00001400U /*!< HCLK divided by… macro
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h9588 #define RCC_CFGR_PPRE1_DIV4 (0x00000500UL) /*!< HCLK divided by… macro
/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l476xx.h10689 #define RCC_CFGR_PPRE1_DIV4 (0x00000500UL) /*!< HCLK divided by… macro

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