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Searched defs:InstructionTable (Results 1 – 3 of 3) sorted by relevance

/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2632 static const struct InstructionTable { in ARMEmitIntExt() struct
2633 uint32_t Opc : 16; in ARMEmitIntExt()
2634 uint32_t hasS : 1; // Some instructions have an S bit, always set it to 0. in ARMEmitIntExt()
2635 uint32_t Shift : 7; // For shift operand addressing mode, used by MOVsi. in ARMEmitIntExt()
2636 uint32_t Imm : 8; // All instructions have either a shift or a mask. in ARMEmitIntExt()
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2635 static const struct InstructionTable { in ARMEmitIntExt() struct
2636 uint32_t Opc : 16; in ARMEmitIntExt()
2637 uint32_t hasS : 1; // Some instructions have an S bit, always set it to 0. in ARMEmitIntExt()
2638 uint32_t Shift : 7; // For shift operand addressing mode, used by MOVsi. in ARMEmitIntExt()
2639 uint32_t Imm : 8; // All instructions have either a shift or a mask. in ARMEmitIntExt()
/aosp_15_r20/external/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2613 static const struct InstructionTable { in ARMEmitIntExt() struct
2614 uint32_t Opc : 16; in ARMEmitIntExt()
2615 uint32_t hasS : 1; // Some instructions have an S bit, always set it to 0. in ARMEmitIntExt()
2616 uint32_t Shift : 7; // For shift operand addressing mode, used by MOVsi. in ARMEmitIntExt()
2617 uint32_t Imm : 8; // All instructions have either a shift or a mask. in ARMEmitIntExt()