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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/
H A DReachingDefAnalysis.cpp169 int Def = Incoming[Unit]; in reprocessBasicBlock() local
254 for (int Def : RegUnitDefs) { in traverse() local
273 for (int Def : MBBReachingDefs[MBBNumber][*Unit]) { in getReachingDef() local
331 void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def, in getReachingLocalUses()
403 if (auto *Def = getUniqueReachingMIDef(MI, PhysReg)) { in getGlobalReachingDefs() local
430 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) in getLiveOuts() local
499 if (auto *Def = getLocalLiveOutMIDef(MBB, PhysReg)) in isRegDefinedAfter() local
514 int Def = getReachingDef(MI, PhysReg); in isReachingDefLiveOut() local
538 int Def = getReachingDef(&*Last, PhysReg); in getLocalLiveOutMIDef() local
652 auto IsDead = [this, &Dead](MachineInstr *Def, MCRegister PhysReg) { in collectKilledOperands()
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H A DMachineCopyPropagation.cpp188 MCRegister Def = CopyOperands->Destination->getReg().asMCReg(); in trackCopy() local
384 MCRegister Def, const TargetRegisterInfo *TRI, in isNopCopy()
403 MCRegister Src, MCRegister Def) { in eraseIfRedundant()
446 Register Def = CopyOperands->Destination->getReg(); in isBackwardPropagatableRegClassCopy() local
547 const MachineInstr &MI, const MachineOperand &MODef, Register Def) { in hasOverlappingMultipleDef()
670 MCRegister Def = RegDef.asMCReg(); in ForwardCopyPropagateBlock() local
855 Register Def = CopyOperands->Destination->getReg(); in isBackwardPropagatableCopy() local
896 Register Def = CopyOperands->Destination->getReg(); in propagateDefs() local
939 MCRegister Def = DefReg.asMCReg(); in BackwardCopyPropagateBlock() local
997 Register Def = CopyOperands->Destination->getReg(); in BackwardCopyPropagateBlock() local
H A DDetectDeadLanes.cpp246 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
281 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
304 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def, in transferDefinedLanes()
352 const MachineOperand &Def = *MRI->def_begin(Reg); in determineInitialDefinedLanes() local
424 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes() local
466 const MachineOperand &Def = MI.getOperand(0); in isUndefInput() local
508 MachineOperand &Def = *MRI->def_begin(Reg); in runOnce() local
H A DPeepholeOptimizer.cpp369 const MachineInstr *Def = nullptr; member in __anon5d69c1490111::ValueTracker
1132 RegSubRegPair Def, in getNewSource()
1243 RegSubRegPair Def, RewriteMapTy &RewriteMap) { in rewriteSource()
1297 RegSubRegPair Def; in optimizeUncoalescableCopy() local
1314 for (const RegSubRegPair &Def : RewritePairs) { in optimizeUncoalescableCopy() local
1678 const auto &Def = NAPhysToVirtMIs.find(Reg); in runOnMachineFunction() local
1690 Register Def = RegMI.first; in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp155 Register Def = MI->getOperand(0).getReg(); in trackCopy() local
334 unsigned Def, const TargetRegisterInfo *TRI) { in isNopCopy()
351 unsigned Def) { in eraseIfRedundant()
387 Register Def = Copy.getOperand(0).getReg(); in isBackwardPropagatableRegClassCopy() local
564 Register Def = MI->getOperand(0).getReg(); in ForwardCopyPropagateBlock() local
736 Register Def = MI.getOperand(0).getReg(); in isBackwardPropagatableCopy() local
775 Register Def = Copy->getOperand(0).getReg(); in propagateDefs() local
816 Register Def = MI->getOperand(0).getReg(); in BackwardCopyPropagateBlock() local
H A DDetectDeadLanes.cpp252 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
287 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
310 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def, in transferDefinedLanes()
358 const MachineOperand &Def = *MRI->def_begin(Reg); in determineInitialDefinedLanes() local
430 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes() local
472 const MachineOperand &Def = MI.getOperand(0); in isUndefInput() local
514 MachineOperand &Def = *MRI->def_begin(Reg); in runOnce() local
H A DReachingDefAnalysis.cpp181 for (int Def : MBBReachingDefs[MBBNumber][*Unit]) { in getReachingDef() local
227 void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def, int PhysReg, in getReachingLocalUses()
248 unsigned ReachingDefAnalysis::getNumUses(MachineInstr *Def, int PhysReg) { in getNumUses()
281 int Def = getReachingDef(MI, PhysReg); in isReachingDefLiveOut() local
301 int Def = getReachingDef(Last, PhysReg); in getLocalLiveOutMIDef() local
/aosp_15_r20/external/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp255 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
290 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
313 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def, in transferDefinedLanes()
361 const MachineOperand &Def = *MRI->def_begin(Reg); in determineInitialDefinedLanes() local
433 const MachineOperand &Def = *UseMI.defs().begin(); in determineInitialUsedLanes() local
475 const MachineOperand &Def = MI.getOperand(0); in isUndefInput() local
517 MachineOperand &Def = *MRI->def_begin(Reg); in runOnce() local
H A DPeepholeOptimizer.cpp294 const MachineInstr *Def; member in __anondcfab1a10111::ValueTracker
820 TargetInstrInfo::RegSubRegPair Def, in getNewSource()
873 RewriteSource(TargetInstrInfo::RegSubRegPair Def, in RewriteSource()
928 RewriteSource(TargetInstrInfo::RegSubRegPair Def, in RewriteSource()
1271 TargetInstrInfo::RegSubRegPair Def(CopyDefReg, CopyDefSubReg); in optimizeUncoalescableCopy() local
1279 for (const auto &Def : RewritePairs) { in optimizeUncoalescableCopy() local
1540 const auto &Def = NAPhysToVirtMIs.find(Reg); in runOnMachineFunction() local
1552 unsigned Def = RegMI.first; in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/TableGen/
H A DDirectiveEmitter.h72 explicit BaseRecord(const llvm::Record *Def) : Def(Def) {} in BaseRecord()
102 explicit Directive(const llvm::Record *Def) : BaseRecord(Def) {} in Directive()
125 explicit Clause(const llvm::Record *Def) : BaseRecord(Def) {} in Clause()
193 explicit VersionedClause(const llvm::Record *Def) : Def(Def) {} in VersionedClause()
208 explicit ClauseVal(const llvm::Record *Def) : BaseRecord(Def) {} in ClauseVal()
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/TableGen/
DDirectiveEmitter.h77 explicit BaseRecord(const llvm::Record *Def) : Def(Def) {} in BaseRecord()
107 explicit Directive(const llvm::Record *Def) : BaseRecord(Def) {} in Directive()
130 explicit Clause(const llvm::Record *Def) : BaseRecord(Def) {} in Clause()
198 explicit VersionedClause(const llvm::Record *Def) : Def(Def) {} in VersionedClause()
213 explicit ClauseVal(const llvm::Record *Def) : BaseRecord(Def) {} in ClauseVal()
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/TableGen/
DDirectiveEmitter.h81 explicit BaseRecord(const llvm::Record *Def) : Def(Def) {} in BaseRecord()
111 explicit Directive(const llvm::Record *Def) : BaseRecord(Def) {} in Directive()
140 explicit Clause(const llvm::Record *Def) : BaseRecord(Def) {} in Clause()
208 explicit VersionedClause(const llvm::Record *Def) : Def(Def) {} in VersionedClause()
223 explicit ClauseVal(const llvm::Record *Def) : BaseRecord(Def) {} in ClauseVal()
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/TableGen/
DDirectiveEmitter.h81 explicit BaseRecord(const llvm::Record *Def) : Def(Def) {} in BaseRecord()
111 explicit Directive(const llvm::Record *Def) : BaseRecord(Def) {} in Directive()
140 explicit Clause(const llvm::Record *Def) : BaseRecord(Def) {} in Clause()
208 explicit VersionedClause(const llvm::Record *Def) : Def(Def) {} in VersionedClause()
223 explicit ClauseVal(const llvm::Record *Def) : BaseRecord(Def) {} in ClauseVal()
/aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/TableGen/
DDirectiveEmitter.h81 explicit BaseRecord(const llvm::Record *Def) : Def(Def) {} in BaseRecord()
111 explicit Directive(const llvm::Record *Def) : BaseRecord(Def) {} in Directive()
140 explicit Clause(const llvm::Record *Def) : BaseRecord(Def) {} in Clause()
208 explicit VersionedClause(const llvm::Record *Def) : Def(Def) {} in VersionedClause()
223 explicit ClauseVal(const llvm::Record *Def) : BaseRecord(Def) {} in ClauseVal()
/aosp_15_r20/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp219 static bool ShouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, in ShouldRematerialize()
232 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in GetVRegDef() local
246 static bool HasOneUse(unsigned Reg, MachineInstr *Def, in HasOneUse()
276 static bool IsSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, in IsSafeToMove()
435 MachineInstr *Def, in MoveForSingleUse()
477 unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, in RematerializeCheapDef()
537 unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, in MoveAndTeeForMultiUse()
754 MachineInstr *Def = GetVRegDef(Reg, Insert, MRI, LIS); in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp257 static bool shouldRematerialize(const MachineInstr &Def, in shouldRematerialize()
269 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef() local
283 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, in hasOneUse()
312 static bool isSafeToMove(const MachineOperand *Def, const MachineOperand *Use, in isSafeToMove()
521 MachineInstr *Def, MachineBasicBlock &MBB, in moveForSingleUse()
566 unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, in rematerializeCheapDef()
634 unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, in moveAndTeeForMultiUse()
867 MachineOperand *Def = DefI->findRegisterDefOperand(Reg); in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp261 static bool shouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, in shouldRematerialize()
273 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef() local
287 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, in hasOneUse()
316 static bool isSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, in isSafeToMove()
484 MachineInstr *Def, MachineBasicBlock &MBB, in moveForSingleUse()
529 unsigned Reg, MachineOperand &Op, MachineInstr &Def, MachineBasicBlock &MBB, in rematerializeCheapDef()
597 unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, in moveAndTeeForMultiUse()
818 MachineInstr *Def = getVRegDef(Reg, Insert, MRI, LIS); in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp468 MachineInstr *Def = MRI->getVRegDef(UseReg); in getRegSeqInit() local
528 MachineInstr *Def = MRI->getVRegDef(UseReg); in tryToFoldACImm() local
736 MachineOperand *Def = Defs[I].first; in foldOperand() local
1010 MachineInstr *Def = MRI->getVRegDef(Op.getReg()); in getImmOrMaterializedImm() local
1371 MachineInstr *Def = MRI->getVRegDef(ClampSrc->getReg()); in tryFoldClamp() local
1524 MachineInstr *Def = MRI->getVRegDef(RegOp->getReg()); in tryFoldOMod() local
1563 for (auto &Def : Defs) { in tryFoldRegSequence() local
1603 MachineOperand *Def = Defs[I].first; in tryFoldRegSequence() local
1686 MachineOperand &Def = MI.getOperand(0); in tryFoldLoad() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/WindowsManifest/
H A DWindowsManifestMerger.cpp127 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
155 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
157 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))) in searchOrDefine() local
182 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in getNamespaceWithPrefix() local
345 for (xmlNsPtr Def = AdditionalNode->nsDef; Def; Def = Def->next) { in mergeNamespaces() local
601 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in checkAndStripPrefixes() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/WindowsManifest/
H A DWindowsManifestMerger.cpp125 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
153 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
155 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))) in searchOrDefine() local
180 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in getNamespaceWithPrefix() local
343 for (xmlNsPtr Def = AdditionalNode->nsDef; Def; Def = Def->next) { in mergeNamespaces() local
599 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in checkAndStripPrefixes() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
/aosp_15_r20/external/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp217 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
230 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
310 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
329 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
H A DAArch64CollectLOH.cpp501 static bool canDefBePartOfLOH(const MachineInstr *Def) { in canDefBePartOfLOH()
578 const MachineInstr *Def = DefsIt.first; in reachedUsesToDefs() local
701 const MachineInstr *Def = *UseToDefs.find(Instr)->second.begin(); in isCandidate() local
747 const MachineInstr &Def = **It->second.begin(); in registerADRCandidate() local
827 const MachineInstr *Def = *UseToDefs.find(Candidate)->second.begin(); in computeOthers() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
/aosp_15_r20/external/pytorch/torch/csrc/jit/frontend/
H A Dtree_views.h404 struct Def : public TreeView { struct
405 explicit Def(const TreeRef& tree) : TreeView(tree) { in Def() argument
408 Def withName(std::string new_name) const { in withName() argument
412 Def withDecl(const Decl& decl) const { in withDecl() argument
424 static Def create( in create() argument

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