Lines Matching full:12
56 #define CP0_STATUS $12
101 #define CP0_S2_SRSCTL $12 /* MIPSR2 */
106 #define CP0_S3_SRSMAP $12 /* MIPSR2 */
191 #define IE_IRQ2 (_ULCAST_(1) << 12)
203 #define C_IRQ2 (_ULCAST_(1) << 12)
302 #define STATUSB_IP4 12
303 #define STATUSF_IP4 (_ULCAST_(1) << 12)
356 #define CAUSEB_IP4 12
357 #define CAUSEF_IP4 (_ULCAST_(1) << 12)
407 #define R5K_CONF_SE (_ULCAST_(1) << 12)
412 #define RM7K_CONF_TE (_ULCAST_(1) << 12)
432 #define VR41_CONF_CS (_ULCAST_(1) << 12)
480 #define MIPS_CONF2_SU (_ULCAST_(15)<< 12)
529 #define CE0_EXT_INTERVENTIONS_REQ 12
549 #define CE1_EXT_INTERVENTION_HITS 12
653 #define read_c0_status() __read_32bit_c0_register($12, 0)
654 #define write_c0_status(val) __write_32bit_c0_register($12, 0, val)