Lines Matching full:12
102 #define REG_T4 12 /* caller saved 4 …
159 #define FP32CTX_24 (FP32CTX_0 + (12 * 8))
177 #define FP64CTX_24 (FP64CTX_0 + (12 * 8))
192 #define FP64CTX_23 (FP64CTX_30 + (12 * 8))
237 #define CP0_STATUS $12
372 #define PL_4K 12
389 #define IE_IRQ2 (_ULCAST_(1) << 12)
401 #define C_IRQ2 (_ULCAST_(1) << 12)
488 #define STATUSB_IP4 12
489 #define STATUSF_IP4 (_ULCAST_(1) << 12)
543 #define CAUSEB_IP4 12
544 #define CAUSEF_IP4 (_ULCAST_(1) << 12)
594 #define R5K_CONF_SE (_ULCAST_(1) << 12)
611 #define VR41_CONF_CS (_ULCAST_(1) << 12)
661 #define CE0_EXT_INTERVENTIONS_REQ 12
681 #define CE1_EXT_INTERVENTION_HITS 12
901 #define read_c0_status() __read_32bit_c0_register($12, 0)
902 #define write_c0_status(val) __write_32bit_c0_register($12, 0, val)