Lines Matching full:selection

161 ;//     <o2.0..1>   CLKSRC: PLL Clock Source Selection
169 ;//     <o3.0..14>    MSEL: PLL Multiplier Selection
172 ;//     <o3.16..23>   NSEL: PLL Divider Selection
187 ;//   <h> Peripheral Clock Selection Register 0 (PCLKSEL0)
188 ;//     <o6.0..1>      PCLK_WDT: Peripheral Clock Selection for WDT
193 ;//     <o6.2..3>   PCLK_TIMER0: Peripheral Clock Selection for TIMER0
198 ;//     <o6.4..5>   PCLK_TIMER1: Peripheral Clock Selection for TIMER1
203 ;//     <o6.6..7>    PCLK_UART0: Peripheral Clock Selection for UART0
208 ;//     <o6.8..9>    PCLK_UART1: Peripheral Clock Selection for UART1
213 ;//     <o6.10..11>   PCLK_PWM0: Peripheral Clock Selection for PWM0
218 ;//     <o6.12..13>   PCLK_PWM1: Peripheral Clock Selection for PWM1
223 ;//     <o6.14..15>   PCLK_I2C0: Peripheral Clock Selection for I2C0
228 ;//     <o6.16..17>    PCLK_SPI: Peripheral Clock Selection for SPI
233 ;//     <o6.18..19>    PCLK_RTC: Peripheral Clock Selection for RTC
238 ;//     <o6.20..21>   PCLK_SSP1: Peripheral Clock Selection for SSP1
243 ;//     <o6.22..23>    PCLK_DAC: Peripheral Clock Selection for DAC
248 ;//     <o6.24..25>    PCLK_ADC: Peripheral Clock Selection for ADC
253 ;//     <o6.26..27>   PCLK_CAN1: Peripheral Clock Selection for CAN1
258 ;//     <o6.28..29>   PCLK_CAN2: Peripheral Clock Selection for CAN2
263 ;//     <o6.30..31>    PCLK_ACF: Peripheral Clock Selection for ACF
270 ;//   <h> Peripheral Clock Selection Register 1 (PCLKSEL1)
271 ;//     <o7.0..1>  PCLK_BAT_RAM: Peripheral Clock Selection for the Battery Supported RAM
276 ;//     <o7.2..3>     PCLK_GPIO: Peripheral Clock Selection for GPIOs
281 ;//     <o7.4..5>      PCLK_PCB: Peripheral Clock Selection for Pin Connect Block
286 ;//     <o7.6..7>     PCLK_I2C1: Peripheral Clock Selection for I2C1
291 ;//     <o7.10..11>   PCLK_SSP0: Peripheral Clock Selection for SSP0
296 ;//     <o7.12..13> PCLK_TIMER2: Peripheral Clock Selection for TIMER2
301 ;//     <o7.14..15> PCLK_TIMER3: Peripheral Clock Selection for TIMER3
306 ;//     <o7.16..17>  PCLK_UART2: Peripheral Clock Selection for UART2
311 ;//     <o7.18..19>  PCLK_UART3: Peripheral Clock Selection for UART3
316 ;//     <o7.20..21>   PCLK_I2C2: Peripheral Clock Selection for I2C2
321 ;//     <o7.22..23>    PCLK_I2S: Peripheral Clock Selection for I2S
326 ;//     <o7.24..25>    PCLK_MCI: Peripheral Clock Selection for MCI
331 ;//     <o7.28..29> PCLK_SYSCON: Peripheral Clock Selection for System Control Block