Lines Matching full:12
218 ;// <o6.12..13> PCLK_PWM1: Peripheral Clock Selection for PWM1
296 ;// <o7.12..13> PCLK_TIMER2: Peripheral Clock Selection for TIMER2
585 ;// <o0.12> AM 12: External bus memory type
591 ;// <0x04=> 64 Mb = 8MB (8Mx8), 4 banks, row length = 12, column length = 9
592 ;// <0x05=> 64 Mb = 8MB (4Mx16), 4 banks, row length = 12, column length = 8
593 ;// <0x08=> 128 Mb = 16MB (16Mx8), 4 banks, row length = 12, column length = 10
594 ;// <0x09=> 128 Mb = 16MB (8Mx16), 4 banks, row length = 12, column length = 9
632 ;// <o0.12> AM 12: External bus memory type
638 ;// <0x04=> 64 Mb = 8MB (8Mx8), 4 banks, row length = 12, column length = 9
639 ;// <0x05=> 64 Mb = 8MB (4Mx16), 4 banks, row length = 12, column length = 8
640 ;// <0x08=> 128 Mb = 16MB (16Mx8), 4 banks, row length = 12, column length = 10
641 ;// <0x09=> 128 Mb = 16MB (8Mx16), 4 banks, row length = 12, column length = 9
678 ;// <o0.12> AM 12: External bus memory type
684 ;// <0x04=> 64 Mb = 8MB (8Mx8), 4 banks, row length = 12, column length = 9
685 ;// <0x05=> 64 Mb = 8MB (4Mx16), 4 banks, row length = 12, column length = 8
686 ;// <0x08=> 128 Mb = 16MB (16Mx8), 4 banks, row length = 12, column length = 10
687 ;// <0x09=> 128 Mb = 16MB (8Mx16), 4 banks, row length = 12, column length = 9
724 ;// <o0.12> AM 12: External bus memory type
730 ;// <0x04=> 64 Mb = 8MB (8Mx8), 4 banks, row length = 12, column length = 9
731 ;// <0x05=> 64 Mb = 8MB (4Mx16), 4 banks, row length = 12, column length = 8
732 ;// <0x08=> 128 Mb = 16MB (16Mx8), 4 banks, row length = 12, column length = 10
733 ;// <0x09=> 128 Mb = 16MB (8Mx16), 4 banks, row length = 12, column length = 9
1345 MOV R5, #(0x33 << 12)
1351 MOV R5, #(0x33 << 12)
1357 MOV R5, #(0x33 << 12)
1363 MOV R5, #(0x33 << 12)