Lines Matching +full:nomadik +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pinmux & pinconf driver for the IP block found in the Nomadik SoC. This
4 * depends on gpio-nomadik and some handling is intertwined; see nmk_gpio_chips
5 * which is used by this driver to access the GPIO banks array.
10 * Copyright (C) 2011-2013 Linus Walleij <[email protected]>
18 #include <linux/gpio/driver.h>
42 #include "../pinctrl-utils.h"
44 #include <linux/gpio/gpio-nomadik.h>
47 * pin configurations are represented by 32-bit integers:
49 * bit 0.. 8 - Pin Number (512 Pins Maximum)
50 * bit 9..10 - Alternate Function Selection
51 * bit 11..12 - Pull up/down state
52 * bit 13 - Sleep mode behaviour
53 * bit 14 - Direction
54 * bit 15 - Value (if output)
55 * bit 16..18 - SLPM pull up/down state
56 * bit 19..20 - SLPM direction
57 * bit 21..22 - SLPM Value (if output)
58 * bit 23..25 - PDIS value (if input)
59 * bit 26 - Gpio mode
60 * bit 27 - Sleep mode
64 * PIN_CFG_DEFAULT - default config (0):
73 * PIN_CFG - default config with alternate function
104 #define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
198 * struct nmk_pinctrl - state container for the Nomadik pin controller
221 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~BIT(offset); in __nmk_gpio_set_mode()
222 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~BIT(offset); in __nmk_gpio_set_mode()
227 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA); in __nmk_gpio_set_mode()
228 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB); in __nmk_gpio_set_mode()
236 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS); in __nmk_gpio_set_pull()
239 nmk_chip->pull_up &= ~BIT(offset); in __nmk_gpio_set_pull()
244 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS); in __nmk_gpio_set_pull()
247 nmk_chip->pull_up |= BIT(offset); in __nmk_gpio_set_pull()
248 writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATS); in __nmk_gpio_set_pull()
250 nmk_chip->pull_up &= ~BIT(offset); in __nmk_gpio_set_pull()
251 writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DATC); in __nmk_gpio_set_pull()
258 bool enabled = nmk_chip->lowemi & BIT(offset); in __nmk_gpio_set_lowemi()
264 nmk_chip->lowemi |= BIT(offset); in __nmk_gpio_set_lowemi()
266 nmk_chip->lowemi &= ~BIT(offset); in __nmk_gpio_set_lowemi()
268 writel_relaxed(nmk_chip->lowemi, in __nmk_gpio_set_lowemi()
269 nmk_chip->addr + NMK_GPIO_LOWEMI); in __nmk_gpio_set_lowemi()
275 writel(BIT(offset), nmk_chip->addr + NMK_GPIO_DIRC); in __nmk_gpio_make_input()
282 u32 rwimsc = nmk_chip->rwimsc; in __nmk_gpio_set_mode_safe()
283 u32 fwimsc = nmk_chip->fwimsc; in __nmk_gpio_set_mode_safe()
285 if (glitch && nmk_chip->set_ioforce) { in __nmk_gpio_set_mode_safe()
289 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC); in __nmk_gpio_set_mode_safe()
290 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC); in __nmk_gpio_set_mode_safe()
292 nmk_chip->set_ioforce(true); in __nmk_gpio_set_mode_safe()
297 if (glitch && nmk_chip->set_ioforce) { in __nmk_gpio_set_mode_safe()
298 nmk_chip->set_ioforce(false); in __nmk_gpio_set_mode_safe()
300 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC); in __nmk_gpio_set_mode_safe()
301 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC); in __nmk_gpio_set_mode_safe()
308 u32 falling = nmk_chip->fimsc & BIT(offset); in nmk_gpio_disable_lazy_irq()
309 u32 rising = nmk_chip->rimsc & BIT(offset); in nmk_gpio_disable_lazy_irq()
310 int gpio = nmk_chip->chip.base + offset; in nmk_gpio_disable_lazy_irq() local
311 int irq = irq_find_mapping(nmk_chip->chip.irq.domain, offset); in nmk_gpio_disable_lazy_irq()
321 nmk_chip->rimsc &= ~BIT(offset); in nmk_gpio_disable_lazy_irq()
322 writel_relaxed(nmk_chip->rimsc, in nmk_gpio_disable_lazy_irq()
323 nmk_chip->addr + NMK_GPIO_RIMSC); in nmk_gpio_disable_lazy_irq()
327 nmk_chip->fimsc &= ~BIT(offset); in nmk_gpio_disable_lazy_irq()
328 writel_relaxed(nmk_chip->fimsc, in nmk_gpio_disable_lazy_irq()
329 nmk_chip->addr + NMK_GPIO_FIMSC); in nmk_gpio_disable_lazy_irq()
332 dev_dbg(nmk_chip->chip.parent, "%d: clearing interrupt mask\n", gpio); in nmk_gpio_disable_lazy_irq()
354 if (!npct->prcm_base) in nmk_prcm_altcx_set_mode()
358 dev_err(npct->dev, "PRCM GPIOCR: alternate-C%i is invalid\n", in nmk_prcm_altcx_set_mode()
363 for (i = 0 ; i < npct->soc->npins_altcx ; i++) { in nmk_prcm_altcx_set_mode()
364 if (npct->soc->altcx_pins[i].pin == offset) in nmk_prcm_altcx_set_mode()
367 if (i == npct->soc->npins_altcx) { in nmk_prcm_altcx_set_mode()
368 dev_dbg(npct->dev, "PRCM GPIOCR: pin %i is not found\n", in nmk_prcm_altcx_set_mode()
373 pin_desc = npct->soc->altcx_pins + i; in nmk_prcm_altcx_set_mode()
374 gpiocr_regs = npct->soc->prcm_gpiocr_registers; in nmk_prcm_altcx_set_mode()
382 if (pin_desc->altcx[i].used) { in nmk_prcm_altcx_set_mode()
383 reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; in nmk_prcm_altcx_set_mode()
384 bit = pin_desc->altcx[i].control_bit; in nmk_prcm_altcx_set_mode()
385 if (readl(npct->prcm_base + reg) & BIT(bit)) { in nmk_prcm_altcx_set_mode()
386 nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); in nmk_prcm_altcx_set_mode()
387 dev_dbg(npct->dev, in nmk_prcm_altcx_set_mode()
388 "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", in nmk_prcm_altcx_set_mode()
396 alt_index = alt_num - 1; in nmk_prcm_altcx_set_mode()
397 if (!pin_desc->altcx[alt_index].used) { in nmk_prcm_altcx_set_mode()
398 dev_warn(npct->dev, in nmk_prcm_altcx_set_mode()
399 "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n", in nmk_prcm_altcx_set_mode()
411 if (pin_desc->altcx[i].used) { in nmk_prcm_altcx_set_mode()
412 reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; in nmk_prcm_altcx_set_mode()
413 bit = pin_desc->altcx[i].control_bit; in nmk_prcm_altcx_set_mode()
414 if (readl(npct->prcm_base + reg) & BIT(bit)) { in nmk_prcm_altcx_set_mode()
415 nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0); in nmk_prcm_altcx_set_mode()
416 dev_dbg(npct->dev, in nmk_prcm_altcx_set_mode()
417 "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n", in nmk_prcm_altcx_set_mode()
423 reg = gpiocr_regs[pin_desc->altcx[alt_index].reg_index]; in nmk_prcm_altcx_set_mode()
424 bit = pin_desc->altcx[alt_index].control_bit; in nmk_prcm_altcx_set_mode()
425 dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been selected\n", in nmk_prcm_altcx_set_mode()
427 nmk_write_masked(npct->prcm_base + reg, BIT(bit), BIT(bit)); in nmk_prcm_altcx_set_mode()
431 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
432 * - Save SLPM registers
433 * - Set SLPM=0 for the IOs you want to switch and others to 1
434 * - Configure the GPIO registers for the IOs that are being switched
435 * - Set IOFORCE=1
436 * - Modify the AFLSA/B registers for the IOs that are being switched
437 * - Set IOFORCE=0
438 * - Restore SLPM registers
439 * - Any spurious wake up event during switch sequence to be ignored and
453 ret = clk_enable(chip->clk); in nmk_gpio_glitch_slpm_init()
457 clk_disable(chip->clk); in nmk_gpio_glitch_slpm_init()
463 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC); in nmk_gpio_glitch_slpm_init()
464 writel(temp, chip->addr + NMK_GPIO_SLPC); in nmk_gpio_glitch_slpm_init()
480 writel(slpm[i], chip->addr + NMK_GPIO_SLPC); in nmk_gpio_glitch_slpm_restore()
482 clk_disable(chip->clk); in nmk_gpio_glitch_slpm_restore()
486 /* Only called by gpio-nomadik but requires knowledge of struct nmk_pinctrl. */
487 int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio) in nmk_prcm_gpiocr_get_mode() argument
496 if (!npct->prcm_base) in nmk_prcm_gpiocr_get_mode()
499 for (i = 0; i < npct->soc->npins_altcx; i++) { in nmk_prcm_gpiocr_get_mode()
500 if (npct->soc->altcx_pins[i].pin == gpio) in nmk_prcm_gpiocr_get_mode()
503 if (i == npct->soc->npins_altcx) in nmk_prcm_gpiocr_get_mode()
506 pin_desc = npct->soc->altcx_pins + i; in nmk_prcm_gpiocr_get_mode()
507 gpiocr_regs = npct->soc->prcm_gpiocr_registers; in nmk_prcm_gpiocr_get_mode()
509 if (pin_desc->altcx[i].used) { in nmk_prcm_gpiocr_get_mode()
510 reg = gpiocr_regs[pin_desc->altcx[i].reg_index]; in nmk_prcm_gpiocr_get_mode()
511 bit = pin_desc->altcx[i].control_bit; in nmk_prcm_gpiocr_get_mode()
512 if (readl(npct->prcm_base + reg) & BIT(bit)) in nmk_prcm_gpiocr_get_mode()
523 return npct->soc->ngroups; in nmk_get_groups_cnt()
531 return npct->soc->groups[selector].grp.name; in nmk_get_group_name()
540 *pins = npct->soc->groups[selector].grp.pins; in nmk_get_group_pins()
541 *num_pins = npct->soc->groups[selector].grp.npins; in nmk_get_group_pins()
545 /* This makes the mapping from pin number to a GPIO chip. We also return the pin
546 * offset in the GPIO chip for convenience (and to avoid a second loop).
559 if (pin >= j && pin < j + nmk_gpio->chip.ngpio) { in find_nmk_gpio_from_pin()
561 *offset = pin - j; in find_nmk_gpio_from_pin()
564 j += nmk_gpio->chip.ngpio; in find_nmk_gpio_from_pin()
574 return &nmk_gpio->chip; in find_gc_from_pin()
587 nmk_gpio_dbg_show_one(s, pctldev, chip, offset - chip->base, offset); in nmk_pin_dbg_show()
595 return -ENOSPC; in nmk_dt_add_map_mux()
613 return -ENOSPC; in nmk_dt_add_map_configs()
617 return -ENOMEM; in nmk_dt_add_map_configs()
689 NMK_CONFIG_PIN_ARRAY("ste,sleep-input", nmk_pin_sleep_input_modes),
690 NMK_CONFIG_PIN_ARRAY("ste,sleep-output", nmk_pin_sleep_output_modes),
691 NMK_CONFIG_PIN_ARRAY("ste,sleep-wakeup", nmk_pin_sleep_wakeup_modes),
692 NMK_CONFIG_PIN_ARRAY("ste,gpio", nmk_pin_gpio_modes),
693 NMK_CONFIG_PIN_ARRAY("ste,sleep-pull-disable", nmk_pin_sleep_pdis_modes),
715 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1) in nmk_find_pin_name()
716 for (i = 0; i < npct->soc->npins; i++) in nmk_find_pin_name()
717 if (npct->soc->pins[i].number == pin_number) in nmk_find_pin_name()
718 return npct->soc->pins[i].name; in nmk_find_pin_name()
731 if (ret != -EINVAL) { in nmk_pinctrl_dt_get_config()
848 return npct->soc->nfunctions; in nmk_pmx_get_funcs_cnt()
856 return npct->soc->functions[function].name; in nmk_pmx_get_func_name()
866 *groups = npct->soc->functions[function].groups; in nmk_pmx_get_func_groups()
867 *num_groups = npct->soc->functions[function].ngroups; in nmk_pmx_get_func_groups()
880 int ret = -EINVAL; in nmk_pmx_set()
883 g = &npct->soc->groups[group]; in nmk_pmx_set()
885 if (g->altsetting < 0) in nmk_pmx_set()
886 return -EINVAL; in nmk_pmx_set()
888 dev_dbg(npct->dev, "enable group %s, %zu pins\n", g->grp.name, g->grp.npins); in nmk_pmx_set()
895 * Safe sequence used to switch IOs between GPIO and Alternate-C mode: in nmk_pmx_set()
896 * - Save SLPM registers (since we have a shadow register in the in nmk_pmx_set()
898 * - Set SLPM=0 for the IOs you want to switch and others to 1 in nmk_pmx_set()
899 * - Configure the GPIO registers for the IOs that are being switched in nmk_pmx_set()
900 * - Set IOFORCE=1 in nmk_pmx_set()
901 * - Modify the AFLSA/B registers for the IOs that are being switched in nmk_pmx_set()
902 * - Set IOFORCE=0 in nmk_pmx_set()
903 * - Restore SLPM registers in nmk_pmx_set()
904 * - Any spurious wake up event during switch sequence to be ignored in nmk_pmx_set()
911 glitch = ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C); in nmk_pmx_set()
923 for (i = 0; i < g->grp.npins; i++) { in nmk_pmx_set()
927 nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); in nmk_pmx_set()
929 dev_err(npct->dev, in nmk_pmx_set()
931 g->grp.pins[i], g->grp.name, i); in nmk_pmx_set()
935 slpm[nmk_chip->bank] &= ~BIT(bit); in nmk_pmx_set()
942 for (i = 0; i < g->grp.npins; i++) { in nmk_pmx_set()
946 nmk_chip = find_nmk_gpio_from_pin(g->grp.pins[i], &bit); in nmk_pmx_set()
948 dev_err(npct->dev, in nmk_pmx_set()
950 g->grp.pins[i], g->grp.name, i); in nmk_pmx_set()
953 dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", in nmk_pmx_set()
954 g->grp.pins[i], g->altsetting); in nmk_pmx_set()
956 ret = clk_enable(nmk_chip->clk); in nmk_pmx_set()
970 (g->altsetting & NMK_GPIO_ALT_C), glitch); in nmk_pmx_set()
971 clk_disable(nmk_chip->clk); in nmk_pmx_set()
976 * - If selection is a ALTCx, some bits in PRCM GPIOCR registers in nmk_pmx_set()
978 * - If selection is pure ALTC and previous selection was ALTCx, in nmk_pmx_set()
981 if ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C) in nmk_pmx_set()
982 nmk_prcm_altcx_set_mode(npct, g->grp.pins[i], in nmk_pmx_set()
983 g->altsetting >> NMK_GPIO_ALT_CX_SHIFT); in nmk_pmx_set()
1010 dev_err(npct->dev, "invalid range\n"); in nmk_gpio_request_enable()
1011 return -EINVAL; in nmk_gpio_request_enable()
1013 if (!range->gc) { in nmk_gpio_request_enable()
1014 dev_err(npct->dev, "missing GPIO chip in range\n"); in nmk_gpio_request_enable()
1015 return -EINVAL; in nmk_gpio_request_enable()
1017 chip = range->gc; in nmk_gpio_request_enable()
1020 dev_dbg(npct->dev, "enable pin %u as GPIO\n", pin); in nmk_gpio_request_enable()
1024 ret = clk_enable(nmk_chip->clk); in nmk_gpio_request_enable()
1027 /* There is no glitch when converting any pin to GPIO */ in nmk_gpio_request_enable()
1029 clk_disable(nmk_chip->clk); in nmk_gpio_request_enable()
1040 dev_dbg(npct->dev, "disable pin %u as GPIO\n", pin); in nmk_gpio_disable_free()
1041 /* Set the pin to some default state, GPIO is usually default */ in nmk_gpio_disable_free()
1058 return -EINVAL; in nmk_pin_config_get()
1072 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup", in nmk_pin_config_set()
1084 dev_err(npct->dev, in nmk_pin_config_set()
1086 return -EINVAL; in nmk_pin_config_set()
1109 /* All pins go into GPIO mode at sleep */ in nmk_pin_config_set()
1117 pull = slpm_pull - 1; in nmk_pin_config_set()
1119 output = slpm_output - 1; in nmk_pin_config_set()
1121 val = slpm_val - 1; in nmk_pin_config_set()
1123 dev_dbg(nmk_chip->chip.parent, in nmk_pin_config_set()
1132 dev_dbg(nmk_chip->chip.parent, in nmk_pin_config_set()
1139 ret = clk_enable(nmk_chip->clk); in nmk_pin_config_set()
1143 /* No glitch when going to GPIO mode */ in nmk_pin_config_set()
1155 clk_disable(nmk_chip->clk); in nmk_pin_config_set()
1167 .name = "pinctrl-nomadik",
1176 .compatible = "stericsson,stn8815-pinctrl",
1180 .compatible = "stericsson,db8500-pinctrl",
1193 return -EINVAL; in nmk_pinctrl_suspend()
1195 return pinctrl_force_sleep(npct->pctl); in nmk_pinctrl_suspend()
1204 return -EINVAL; in nmk_pinctrl_resume()
1206 return pinctrl_force_default(npct->pctl); in nmk_pinctrl_resume()
1212 struct fwnode_handle *fwnode = dev_fwnode(&pdev->dev); in nmk_pinctrl_probe()
1218 npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL); in nmk_pinctrl_probe()
1220 return -ENOMEM; in nmk_pinctrl_probe()
1222 version = (uintptr_t)device_get_match_data(&pdev->dev); in nmk_pinctrl_probe()
1226 nmk_pinctrl_stn8815_init(&npct->soc); in nmk_pinctrl_probe()
1228 nmk_pinctrl_db8500_init(&npct->soc); in nmk_pinctrl_probe()
1231 * Since we depend on the GPIO chips to provide clock and register base in nmk_pinctrl_probe()
1234 * them. The GPIO portion of the actual hardware may be probed before in nmk_pinctrl_probe()
1241 gpio_fwnode = fwnode_find_reference(fwnode, "nomadik-gpio-chips", i); in nmk_pinctrl_probe()
1245 dev_info(&pdev->dev, "populate NMK GPIO %d \"%pfwP\"\n", i, gpio_fwnode); in nmk_pinctrl_probe()
1248 dev_err(&pdev->dev, in nmk_pinctrl_probe()
1249 "could not populate nmk chip struct - continue anyway\n"); in nmk_pinctrl_probe()
1251 /* We are NOT compatible with mobileye,eyeq5-gpio. */ in nmk_pinctrl_probe()
1252 BUG_ON(nmk_chip->is_mobileye_soc); in nmk_pinctrl_probe()
1258 npct->prcm_base = fwnode_iomap(prcm_fwnode, 0); in nmk_pinctrl_probe()
1261 if (!npct->prcm_base) { in nmk_pinctrl_probe()
1263 dev_info(&pdev->dev, in nmk_pinctrl_probe()
1264 "No PRCM base, assuming no ALT-Cx control is available\n"); in nmk_pinctrl_probe()
1266 dev_err(&pdev->dev, "missing PRCM base address\n"); in nmk_pinctrl_probe()
1267 return -EINVAL; in nmk_pinctrl_probe()
1271 nmk_pinctrl_desc.pins = npct->soc->pins; in nmk_pinctrl_probe()
1272 nmk_pinctrl_desc.npins = npct->soc->npins; in nmk_pinctrl_probe()
1273 npct->dev = &pdev->dev; in nmk_pinctrl_probe()
1275 npct->pctl = devm_pinctrl_register(&pdev->dev, &nmk_pinctrl_desc, npct); in nmk_pinctrl_probe()
1276 if (IS_ERR(npct->pctl)) { in nmk_pinctrl_probe()
1277 dev_err(&pdev->dev, "could not register Nomadik pinctrl driver\n"); in nmk_pinctrl_probe()
1278 return PTR_ERR(npct->pctl); in nmk_pinctrl_probe()
1282 dev_info(&pdev->dev, "initialized Nomadik pin control driver\n"); in nmk_pinctrl_probe()
1293 .name = "pinctrl-nomadik",