1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/nvmem-consumer.h>
18 #include "phy-mtk-io.h"
19 #include "phy-mtk-hdmi.h"
20 #include "phy-mtk-hdmi-mt8195.h"
25 	mtk_phy_set_bits(hdmi_phy->regs + HDMI_ANA_CTL, REG_ANA_HDMI20_FIFO_EN);  in mtk_hdmi_ana_fifo_en()
31 	void __iomem *regs = hdmi_phy->regs;  in mtk_phy_tmds_clk_ratio()
35 	/* HDMI 2.0 specification, 3.4Gbps <= TMDS Bit Rate <= 6G,  in mtk_phy_tmds_clk_ratio()
47 	void __iomem *regs = hdmi_phy->regs;  in mtk_hdmi_pll_sel_src()
59 	void __iomem *regs = hdmi_phy->regs;  in mtk_hdmi_pll_perf()
92 	void __iomem *regs = hdmi_phy->regs;  in mtk_hdmi_pll_set_hw()
132 		return -EINVAL;  in mtk_hdmi_pll_set_hw()
153 		return -EINVAL;  in mtk_hdmi_pll_set_hw()
176 		return -EINVAL;  in mtk_hdmi_pll_set_hw()
205 		mtk_phy_update_field(regs + HDMI_CTL_3, REG_HDMITXPLL_DIV, digital_div - 1);  in mtk_hdmi_pll_set_hw()
212 			     unsigned long rate, unsigned long parent_rate)  in mtk_hdmi_pll_calc()  argument
220 	pixel_clk = rate;  in mtk_hdmi_pll_calc()
224 		return -EINVAL;  in mtk_hdmi_pll_calc()
227 		hdmi_phy->tmds_over_340M = true;  in mtk_hdmi_pll_calc()
229 		hdmi_phy->tmds_over_340M = false;  in mtk_hdmi_pll_calc()
231 	/* in Hz */  in mtk_hdmi_pll_calc()
235 	 *	0M  <  TMDS clk  < 54M		  /8  in mtk_hdmi_pll_calc()
236 	 *	54M <= TMDS clk  < 148.35M    /4  in mtk_hdmi_pll_calc()
237 	 *	148.35M <=TMDS clk < 296.7M   /2  in mtk_hdmi_pll_calc()
238 	 *	296.7 <=TMDS clk <= 594M	  /1  in mtk_hdmi_pll_calc()
249 		return -EINVAL;  in mtk_hdmi_pll_calc()
252 	 * ICO clk = 5*TMDS_CLK*TXPOSDIV*TXPREDIV  in mtk_hdmi_pll_calc()
253 	 * ICO clk constraint: 5G =< ICO clk <= 12G  in mtk_hdmi_pll_calc()
261 	if (i == (ARRAY_SIZE(txpredivs) - 1) &&  in mtk_hdmi_pll_calc()
263 		return -EINVAL;  in mtk_hdmi_pll_calc()
266 		return -EINVAL;  in mtk_hdmi_pll_calc()
279 		return -EINVAL;  in mtk_hdmi_pll_calc()
286 	 * 24bit -> posdiv1 /10, 30bit -> posdiv1 /12.5,  in mtk_hdmi_pll_calc()
287 	 * 36bit -> posdiv1 /15, 48bit -> posdiv1 /10  in mtk_hdmi_pll_calc()
292 	/* Digital clk divider, max /32 */  in mtk_hdmi_pll_calc()
295 		return -EINVAL;  in mtk_hdmi_pll_calc()
305 	void __iomem *regs = hdmi_phy->regs;  in mtk_hdmi_pll_drv_setting()
309 	u32 pixel_clk = hdmi_phy->pll_rate;  in mtk_hdmi_pll_drv_setting()
314 	 * 3G < data rate <= 6G: enable impedance 100ohm,  in mtk_hdmi_pll_drv_setting()
316 	 * pixel clk >= HD,  74.175MHZ <= pixel clk <= 300MHZ:  in mtk_hdmi_pll_drv_setting()
319 	 * 27M =< pixel clk < 74.175: disable impedance  in mtk_hdmi_pll_drv_setting()
323 	/* 3G < data rate <= 6G, 300M < tmds rate <= 594M */  in mtk_hdmi_pll_drv_setting()
340 		return -EINVAL;  in mtk_hdmi_pll_drv_setting()
362 	void __iomem *regs = hdmi_phy->regs;  in mtk_hdmi_pll_prepare()
396 	void __iomem *regs = hdmi_phy->regs;  in mtk_hdmi_pll_unprepare()
410 static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,  in mtk_hdmi_pll_set_rate()  argument
415 	dev_dbg(hdmi_phy->dev, "%s: %lu Hz, parent: %lu Hz\n", __func__, rate,  in mtk_hdmi_pll_set_rate()
418 	return mtk_hdmi_pll_calc(hdmi_phy, hw, rate, parent_rate);  in mtk_hdmi_pll_set_rate()
421 static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate,  in mtk_hdmi_pll_round_rate()  argument
426 	hdmi_phy->pll_rate = rate;  in mtk_hdmi_pll_round_rate()
427 	return rate;  in mtk_hdmi_pll_round_rate()
435 	return hdmi_phy->pll_rate;  in mtk_hdmi_pll_recalc_rate()
448 	void __iomem *regs = hdmi_phy->regs;  in vtx_signal_en()
469 	struct phy_configure_opts_dp *dp_opts = &opts->dp;  in mtk_hdmi_phy_configure()
473 	ret = clk_set_rate(hdmi_phy->pll, dp_opts->link_rate);  in mtk_hdmi_phy_configure()
478 	mtk_phy_tmds_clk_ratio(hdmi_phy, hdmi_phy->tmds_over_340M);  in mtk_hdmi_phy_configure()
487 	mtk_phy_set_bits(hdmi_phy->regs + HDMI_CTL_1, RG_HDMITX_PWR5V_O);  in mtk_hdmi_phy_pwr5v_enable()
496 	mtk_phy_clear_bits(hdmi_phy->regs + HDMI_CTL_1, RG_HDMITX_PWR5V_O);  in mtk_hdmi_phy_pwr5v_disable()
505 	return !!(readl(hdmi_phy->regs + HDMI_CTL_1) & RG_HDMITX_PWR5V_O);  in mtk_hdmi_phy_pwr5v_is_enabled()
515 	.name = "hdmi-pwr5v",
516 	.id = -1,