Lines Matching +full:rockchip +full:- +full:device
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Rockchip SoCs.
5 * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
6 * http://www.rock-chips.com
8 * Author: Simon Xue <xxm@rock-chips.com>
24 #include "pcie-designware.h"
34 #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev)
75 static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg) in rockchip_pcie_readl_apb() argument
77 return readl_relaxed(rockchip->apb_base + reg); in rockchip_pcie_readl_apb()
80 static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, u32 val, in rockchip_pcie_writel_apb() argument
83 writel_relaxed(val, rockchip->apb_base + reg); in rockchip_pcie_writel_apb()
89 struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc); in rockchip_pcie_intx_handler() local
94 reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_LEGACY); in rockchip_pcie_intx_handler()
97 generic_handle_domain_irq(rockchip->irq_domain, hwirq); in rockchip_pcie_intx_handler()
105 HIWORD_UPDATE_BIT(BIT(data->hwirq)), in rockchip_intx_mask()
112 HIWORD_DISABLE_BIT(BIT(data->hwirq)), in rockchip_intx_unmask()
127 irq_set_chip_data(irq, domain->host_data); in rockchip_pcie_intx_map()
136 static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip) in rockchip_pcie_init_irq_domain() argument
138 struct device *dev = rockchip->pci.dev; in rockchip_pcie_init_irq_domain()
141 intc = of_get_child_by_name(dev->of_node, "legacy-interrupt-controller"); in rockchip_pcie_init_irq_domain()
143 dev_err(dev, "missing child interrupt-controller node\n"); in rockchip_pcie_init_irq_domain()
144 return -EINVAL; in rockchip_pcie_init_irq_domain()
147 rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX, in rockchip_pcie_init_irq_domain()
148 &intx_domain_ops, rockchip); in rockchip_pcie_init_irq_domain()
150 if (!rockchip->irq_domain) { in rockchip_pcie_init_irq_domain()
152 return -EINVAL; in rockchip_pcie_init_irq_domain()
158 static u32 rockchip_pcie_get_ltssm(struct rockchip_pcie *rockchip) in rockchip_pcie_get_ltssm() argument
160 return rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_LTSSM_STATUS); in rockchip_pcie_get_ltssm()
163 static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip) in rockchip_pcie_enable_ltssm() argument
165 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM, in rockchip_pcie_enable_ltssm()
169 static void rockchip_pcie_disable_ltssm(struct rockchip_pcie *rockchip) in rockchip_pcie_disable_ltssm() argument
171 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_DISABLE_LTSSM, in rockchip_pcie_disable_ltssm()
177 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); in rockchip_pcie_link_up() local
178 u32 val = rockchip_pcie_get_ltssm(rockchip); in rockchip_pcie_link_up()
189 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); in rockchip_pcie_start_link() local
191 /* Reset device */ in rockchip_pcie_start_link()
192 gpiod_set_value_cansleep(rockchip->rst_gpio, 0); in rockchip_pcie_start_link()
194 rockchip_pcie_enable_ltssm(rockchip); in rockchip_pcie_start_link()
198 * PERST. See table 2-4 in section 2.6.2 AC Specifications of the PCI in rockchip_pcie_start_link()
203 * 100us as we don't know how long should the device need to reset. in rockchip_pcie_start_link()
206 gpiod_set_value_cansleep(rockchip->rst_gpio, 1); in rockchip_pcie_start_link()
213 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); in rockchip_pcie_stop_link() local
215 rockchip_pcie_disable_ltssm(rockchip); in rockchip_pcie_stop_link()
221 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); in rockchip_pcie_host_init() local
222 struct device *dev = rockchip->pci.dev; in rockchip_pcie_host_init()
225 irq = of_irq_get_byname(dev->of_node, "legacy"); in rockchip_pcie_host_init()
229 ret = rockchip_pcie_init_irq_domain(rockchip); in rockchip_pcie_host_init()
234 rockchip); in rockchip_pcie_host_init()
265 dev_err(pci->dev, "UNKNOWN IRQ type\n"); in rockchip_pcie_raise_irq()
308 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); in rockchip_pcie_get_features() local
310 return rockchip->data->epc_features; in rockchip_pcie_get_features()
319 static int rockchip_pcie_clk_init(struct rockchip_pcie *rockchip) in rockchip_pcie_clk_init() argument
321 struct device *dev = rockchip->pci.dev; in rockchip_pcie_clk_init()
324 ret = devm_clk_bulk_get_all(dev, &rockchip->clks); in rockchip_pcie_clk_init()
328 rockchip->clk_cnt = ret; in rockchip_pcie_clk_init()
330 ret = clk_bulk_prepare_enable(rockchip->clk_cnt, rockchip->clks); in rockchip_pcie_clk_init()
338 struct rockchip_pcie *rockchip) in rockchip_pcie_resource_get() argument
340 rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb"); in rockchip_pcie_resource_get()
341 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_resource_get()
342 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->apb_base), in rockchip_pcie_resource_get()
345 rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", in rockchip_pcie_resource_get()
347 if (IS_ERR(rockchip->rst_gpio)) in rockchip_pcie_resource_get()
348 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst_gpio), in rockchip_pcie_resource_get()
351 rockchip->rst = devm_reset_control_array_get_exclusive(&pdev->dev); in rockchip_pcie_resource_get()
352 if (IS_ERR(rockchip->rst)) in rockchip_pcie_resource_get()
353 return dev_err_probe(&pdev->dev, PTR_ERR(rockchip->rst), in rockchip_pcie_resource_get()
359 static int rockchip_pcie_phy_init(struct rockchip_pcie *rockchip) in rockchip_pcie_phy_init() argument
361 struct device *dev = rockchip->pci.dev; in rockchip_pcie_phy_init()
364 rockchip->phy = devm_phy_get(dev, "pcie-phy"); in rockchip_pcie_phy_init()
365 if (IS_ERR(rockchip->phy)) in rockchip_pcie_phy_init()
366 return dev_err_probe(dev, PTR_ERR(rockchip->phy), in rockchip_pcie_phy_init()
369 ret = phy_init(rockchip->phy); in rockchip_pcie_phy_init()
373 ret = phy_power_on(rockchip->phy); in rockchip_pcie_phy_init()
375 phy_exit(rockchip->phy); in rockchip_pcie_phy_init()
380 static void rockchip_pcie_phy_deinit(struct rockchip_pcie *rockchip) in rockchip_pcie_phy_deinit() argument
382 phy_exit(rockchip->phy); in rockchip_pcie_phy_deinit()
383 phy_power_off(rockchip->phy); in rockchip_pcie_phy_deinit()
394 struct rockchip_pcie *rockchip = arg; in rockchip_pcie_rc_sys_irq_thread() local
395 struct dw_pcie *pci = &rockchip->pci; in rockchip_pcie_rc_sys_irq_thread()
396 struct dw_pcie_rp *pp = &pci->pp; in rockchip_pcie_rc_sys_irq_thread()
397 struct device *dev = pci->dev; in rockchip_pcie_rc_sys_irq_thread()
400 reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_MISC); in rockchip_pcie_rc_sys_irq_thread()
401 rockchip_pcie_writel_apb(rockchip, reg, PCIE_CLIENT_INTR_STATUS_MISC); in rockchip_pcie_rc_sys_irq_thread()
404 dev_dbg(dev, "LTSSM_STATUS: %#x\n", rockchip_pcie_get_ltssm(rockchip)); in rockchip_pcie_rc_sys_irq_thread()
407 val = rockchip_pcie_get_ltssm(rockchip); in rockchip_pcie_rc_sys_irq_thread()
412 pci_rescan_bus(pp->bridge->bus); in rockchip_pcie_rc_sys_irq_thread()
422 struct rockchip_pcie *rockchip = arg; in rockchip_pcie_ep_sys_irq_thread() local
423 struct dw_pcie *pci = &rockchip->pci; in rockchip_pcie_ep_sys_irq_thread()
424 struct device *dev = pci->dev; in rockchip_pcie_ep_sys_irq_thread()
427 reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_MISC); in rockchip_pcie_ep_sys_irq_thread()
428 rockchip_pcie_writel_apb(rockchip, reg, PCIE_CLIENT_INTR_STATUS_MISC); in rockchip_pcie_ep_sys_irq_thread()
431 dev_dbg(dev, "LTSSM_STATUS: %#x\n", rockchip_pcie_get_ltssm(rockchip)); in rockchip_pcie_ep_sys_irq_thread()
434 dev_dbg(dev, "hot reset or link-down reset\n"); in rockchip_pcie_ep_sys_irq_thread()
435 dw_pcie_ep_linkdown(&pci->ep); in rockchip_pcie_ep_sys_irq_thread()
439 val = rockchip_pcie_get_ltssm(rockchip); in rockchip_pcie_ep_sys_irq_thread()
442 dw_pcie_ep_linkup(&pci->ep); in rockchip_pcie_ep_sys_irq_thread()
450 struct rockchip_pcie *rockchip) in rockchip_pcie_configure_rc() argument
452 struct device *dev = &pdev->dev; in rockchip_pcie_configure_rc()
458 return -ENODEV; in rockchip_pcie_configure_rc()
466 IRQF_ONESHOT, "pcie-sys-rc", rockchip); in rockchip_pcie_configure_rc()
474 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); in rockchip_pcie_configure_rc()
476 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE, in rockchip_pcie_configure_rc()
479 pp = &rockchip->pci.pp; in rockchip_pcie_configure_rc()
480 pp->ops = &rockchip_pcie_host_ops; in rockchip_pcie_configure_rc()
481 pp->use_linkup_irq = true; in rockchip_pcie_configure_rc()
491 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_MISC); in rockchip_pcie_configure_rc()
497 struct rockchip_pcie *rockchip) in rockchip_pcie_configure_ep() argument
499 struct device *dev = &pdev->dev; in rockchip_pcie_configure_ep()
504 return -ENODEV; in rockchip_pcie_configure_ep()
512 IRQF_ONESHOT, "pcie-sys-ep", rockchip); in rockchip_pcie_configure_ep()
520 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); in rockchip_pcie_configure_ep()
522 rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_EP_MODE, in rockchip_pcie_configure_ep()
525 rockchip->pci.ep.ops = &rockchip_pcie_ep_ops; in rockchip_pcie_configure_ep()
526 rockchip->pci.ep.page_size = SZ_64K; in rockchip_pcie_configure_ep()
530 ret = dw_pcie_ep_init(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
536 ret = dw_pcie_ep_init_registers(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
539 dw_pcie_ep_deinit(&rockchip->pci.ep); in rockchip_pcie_configure_ep()
543 pci_epc_init_notify(rockchip->pci.ep.epc); in rockchip_pcie_configure_ep()
545 /* unmask DLL up/down indicator and hot reset/link-down reset */ in rockchip_pcie_configure_ep()
547 rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_INTR_MASK_MISC); in rockchip_pcie_configure_ep()
554 struct device *dev = &pdev->dev; in rockchip_pcie_probe()
555 struct rockchip_pcie *rockchip; in rockchip_pcie_probe() local
561 return -EINVAL; in rockchip_pcie_probe()
563 rockchip = devm_kzalloc(dev, sizeof(*rockchip), GFP_KERNEL); in rockchip_pcie_probe()
564 if (!rockchip) in rockchip_pcie_probe()
565 return -ENOMEM; in rockchip_pcie_probe()
567 platform_set_drvdata(pdev, rockchip); in rockchip_pcie_probe()
569 rockchip->pci.dev = dev; in rockchip_pcie_probe()
570 rockchip->pci.ops = &dw_pcie_ops; in rockchip_pcie_probe()
571 rockchip->data = data; in rockchip_pcie_probe()
573 ret = rockchip_pcie_resource_get(pdev, rockchip); in rockchip_pcie_probe()
577 ret = reset_control_assert(rockchip->rst); in rockchip_pcie_probe()
582 rockchip->vpcie3v3 = devm_regulator_get_optional(dev, "vpcie3v3"); in rockchip_pcie_probe()
583 if (IS_ERR(rockchip->vpcie3v3)) { in rockchip_pcie_probe()
584 if (PTR_ERR(rockchip->vpcie3v3) != -ENODEV) in rockchip_pcie_probe()
585 return dev_err_probe(dev, PTR_ERR(rockchip->vpcie3v3), in rockchip_pcie_probe()
587 rockchip->vpcie3v3 = NULL; in rockchip_pcie_probe()
589 ret = regulator_enable(rockchip->vpcie3v3); in rockchip_pcie_probe()
595 ret = rockchip_pcie_phy_init(rockchip); in rockchip_pcie_probe()
599 ret = reset_control_deassert(rockchip->rst); in rockchip_pcie_probe()
603 ret = rockchip_pcie_clk_init(rockchip); in rockchip_pcie_probe()
607 switch (data->mode) { in rockchip_pcie_probe()
609 ret = rockchip_pcie_configure_rc(pdev, rockchip); in rockchip_pcie_probe()
614 ret = rockchip_pcie_configure_ep(pdev, rockchip); in rockchip_pcie_probe()
619 dev_err(dev, "INVALID device type %d\n", data->mode); in rockchip_pcie_probe()
620 ret = -EINVAL; in rockchip_pcie_probe()
627 clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks); in rockchip_pcie_probe()
629 rockchip_pcie_phy_deinit(rockchip); in rockchip_pcie_probe()
631 if (rockchip->vpcie3v3) in rockchip_pcie_probe()
632 regulator_disable(rockchip->vpcie3v3); in rockchip_pcie_probe()
653 .compatible = "rockchip,rk3568-pcie",
657 .compatible = "rockchip,rk3568-pcie-ep",
661 .compatible = "rockchip,rk3588-pcie-ep",
669 .name = "rockchip-dw-pcie",