Lines Matching +full:realtek +full:- +full:mdio
1 // SPDX-License-Identifier: GPL-2.0+
2 /* drivers/net/phy/realtek.c
4 * Driver for Realtek PHYs
17 #include "realtek.h"
78 /* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
79 * is set, they cannot be accessed by C45-over-C22.
107 MODULE_DESCRIPTION("Realtek PHY driver");
130 struct device *dev = &phydev->mdio.dev; in rtl821x_probe()
132 u32 phy_id = phydev->drv->phy_id; in rtl821x_probe()
137 return -ENOMEM; in rtl821x_probe()
139 priv->clk = devm_clk_get_optional_enabled(dev, NULL); in rtl821x_probe()
140 if (IS_ERR(priv->clk)) in rtl821x_probe()
141 return dev_err_probe(dev, PTR_ERR(priv->clk), in rtl821x_probe()
148 priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF); in rtl821x_probe()
149 if (of_property_read_bool(dev->of_node, "realtek,aldps-enable")) in rtl821x_probe()
150 priv->phycr1 |= RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF; in rtl821x_probe()
152 priv->has_phycr2 = !(phy_id == RTL_8211FVD_PHYID); in rtl821x_probe()
153 if (priv->has_phycr2) { in rtl821x_probe()
158 priv->phycr2 = ret & RTL8211F_CLKOUT_EN; in rtl821x_probe()
159 if (of_property_read_bool(dev->of_node, "realtek,clkout-disable")) in rtl821x_probe()
160 priv->phycr2 &= ~RTL8211F_CLKOUT_EN; in rtl821x_probe()
163 phydev->priv = priv; in rtl821x_probe()
200 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in rtl8201_config_intr()
223 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in rtl8211b_config_intr()
245 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in rtl8211e_config_intr()
268 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in rtl8211f_config_intr()
358 if (phydev->speed == SPEED_100 && phydev->autoneg == AUTONEG_DISABLE) { in rtl8211_config_aneg()
378 struct rtl821x_priv *priv = phydev->priv; in rtl8211f_config_init()
379 struct device *dev = &phydev->mdio.dev; in rtl8211f_config_init()
385 priv->phycr1); in rtl8211f_config_init()
392 switch (phydev->interface) { in rtl8211f_config_init()
424 "%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n", in rtl8211f_config_init()
428 "2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n", in rtl8211f_config_init()
439 "%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n", in rtl8211f_config_init()
443 "2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n", in rtl8211f_config_init()
447 if (priv->has_phycr2) { in rtl8211f_config_init()
449 RTL8211F_CLKOUT_EN, priv->phycr2); in rtl8211f_config_init()
464 struct rtl821x_priv *priv = phydev->priv; in rtl821x_suspend()
467 if (!phydev->wol_enabled) { in rtl821x_suspend()
473 clk_disable_unprepare(priv->clk); in rtl821x_suspend()
481 struct rtl821x_priv *priv = phydev->priv; in rtl821x_resume()
484 if (!phydev->wol_enabled) in rtl821x_resume()
485 clk_prepare_enable(priv->clk); in rtl821x_resume()
506 * - Link: Configurable subset of 10/100/1000 link rates in rtl8211f_led_hw_is_supported()
507 * - Active: Blink on activity, RX or TX is not differentiated in rtl8211f_led_hw_is_supported()
509 * - A: Link and Active indication at configurable, but matching, in rtl8211f_led_hw_is_supported()
511 * - B: Link indication at configurable subset of 10/100/1000 link in rtl8211f_led_hw_is_supported()
518 return -EINVAL; in rtl8211f_led_hw_is_supported()
522 return -EOPNOTSUPP; in rtl8211f_led_hw_is_supported()
526 return -EOPNOTSUPP; in rtl8211f_led_hw_is_supported()
537 return -EINVAL; in rtl8211f_led_hw_control_get()
570 return -EINVAL; in rtl8211f_led_hw_control_set()
597 /* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */ in rtl8211e_config_init()
598 switch (phydev->interface) { in rtl8211e_config_init()
622 * 10:0 = Test && debug settings reserved by realtek in rtl8211e_config_init()
661 dev_err(&phydev->mdio.dev, in rtl8366rb_config_init()
676 phydev->duplex = DUPLEX_FULL; in rtlgen_decode_physr()
678 phydev->duplex = DUPLEX_HALF; in rtlgen_decode_physr()
682 phydev->speed = SPEED_10; in rtlgen_decode_physr()
685 phydev->speed = SPEED_100; in rtlgen_decode_physr()
688 phydev->speed = SPEED_1000; in rtlgen_decode_physr()
691 phydev->speed = SPEED_10000; in rtlgen_decode_physr()
694 phydev->speed = SPEED_2500; in rtlgen_decode_physr()
697 phydev->speed = SPEED_5000; in rtlgen_decode_physr()
707 if (phydev->speed >= 1000) { in rtlgen_decode_physr()
709 phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER; in rtlgen_decode_physr()
711 phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE; in rtlgen_decode_physr()
713 phydev->master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED; in rtlgen_decode_physr()
725 if (!phydev->link) in rtlgen_read_status()
758 ret = -EOPNOTSUPP; in rtlgen_read_mmd()
778 ret = -EOPNOTSUPP; in rtlgen_write_mmd()
788 if (ret != -EOPNOTSUPP) in rtl822x_read_mmd()
813 if (ret != -EOPNOTSUPP) in rtl822x_write_mmd()
828 phydev->phy_id != RTL_GENERIC_PHYID) in rtl822x_probe()
841 phydev->host_interfaces) || in rtl822xb_config_init()
842 phydev->interface == PHY_INTERFACE_MODE_2500BASEX; in rtl822xb_config_init()
845 phydev->host_interfaces) || in rtl822xb_config_init()
846 phydev->interface == PHY_INTERFACE_MODE_SGMII; in rtl822xb_config_init()
849 __assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces, in rtl822xb_config_init()
851 __assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces, in rtl822xb_config_init()
860 phydev->rate_matching = RATE_MATCH_PAUSE; in rtl822xb_config_init()
863 phydev->rate_matching = RATE_MATCH_NONE; in rtl822xb_config_init()
896 /* Only rate matching at 2500base-x */ in rtl822xb_get_rate_matching()
921 phydev->supported, val & MDIO_PMA_SPEED_2_5G); in rtl822x_get_features()
923 phydev->supported, val & MDIO_PMA_SPEED_5G); in rtl822x_get_features()
925 phydev->supported, val & MDIO_SPEED_10G); in rtl822x_get_features()
934 if (phydev->autoneg == AUTONEG_ENABLE) { in rtl822x_config_aneg()
935 u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising); in rtl822x_config_aneg()
952 if (!phydev->link) in rtl822xb_update_interface()
962 phydev->interface = PHY_INTERFACE_MODE_2500BASEX; in rtl822xb_update_interface()
965 phydev->interface = PHY_INTERFACE_MODE_SGMII; in rtl822xb_update_interface()
974 mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, 0); in rtl822x_read_status()
980 if (phydev->autoneg == AUTONEG_DISABLE || in rtl822x_read_status()
981 !phydev->autoneg_complete) in rtl822x_read_status()
988 mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, lpadv); in rtl822x_read_status()
1009 phydev->supported); in rtl822x_c45_get_features()
1019 if (phydev->autoneg == AUTONEG_DISABLE) in rtl822x_c45_config_aneg()
1028 val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising); in rtl822x_c45_config_aneg()
1046 if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) { in rtl822x_c45_read_status()
1054 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val); in rtl822x_c45_read_status()
1060 if (!phydev->link) { in rtl822x_c45_read_status()
1061 phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN; in rtl822x_c45_read_status()
1100 * Check a MMD register which is known to be non-zero.
1118 return phydev->phy_id == RTL_GENERIC_PHYID && in rtlgen_match_phy_device()
1124 return phydev->phy_id == RTL_GENERIC_PHYID && in rtl8226_match_phy_device()
1132 if (phydev->is_c45) in rtlgen_is_c45_match()
1133 return is_c45 && (id == phydev->c45_ids.device_ids[1]); in rtlgen_is_c45_match()
1135 return !is_c45 && (id == phydev->phy_id); in rtlgen_is_c45_match()
1140 return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev); in rtl8221b_match_phy_device()
1165 if (phydev->is_c45) in rtl_internal_nbaset_match_phy_device()
1168 switch (phydev->phy_id) { in rtl_internal_nbaset_match_phy_device()
1207 phydev->autoneg = AUTONEG_DISABLE; in rtl9000a_config_init()
1208 phydev->speed = SPEED_100; in rtl9000a_config_init()
1209 phydev->duplex = DUPLEX_FULL; in rtl9000a_config_init()
1219 switch (phydev->master_slave_set) { in rtl9000a_config_aneg()
1230 return -EOPNOTSUPP; in rtl9000a_config_aneg()
1244 phydev->master_slave_get = MASTER_SLAVE_CFG_UNKNOWN; in rtl9000a_read_status()
1245 phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN; in rtl9000a_read_status()
1255 phydev->master_slave_get = MASTER_SLAVE_CFG_MASTER_FORCE; in rtl9000a_read_status()
1257 phydev->master_slave_get = MASTER_SLAVE_CFG_SLAVE_FORCE; in rtl9000a_read_status()
1263 phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER; in rtl9000a_read_status()
1265 phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE; in rtl9000a_read_status()
1284 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in rtl9000a_config_intr()
1409 .name = "RTL8211F-VD Gigabit Ethernet",
1421 .name = "Generic FE-GE Realtek PHY",
1454 .name = "RTL8226-CG 2.5Gbps PHY",
1464 .name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
1476 .name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
1489 .name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
1500 .name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
1513 .name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
1535 .name = "Realtek Internal NBASE-T PHY",
1583 .name = "RTL8365MB-VC Gigabit Ethernet",
1606 MODULE_DEVICE_TABLE(mdio, realtek_tbl);