1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
20 static int ixgbe_update_flash_X540(struct ixgbe_hw *hw);
21 static int ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw);
22 static int ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw);
23 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);
25 enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)  in ixgbe_get_media_type_X540()  argument
30 int ixgbe_get_invariants_X540(struct ixgbe_hw *hw)  in ixgbe_get_invariants_X540()  argument
32 	struct ixgbe_mac_info *mac = &hw->mac;  in ixgbe_get_invariants_X540()
33 	struct ixgbe_phy_info *phy = &hw->phy;  in ixgbe_get_invariants_X540()
36 	phy->ops.set_phy_power = ixgbe_set_copper_phy_power;  in ixgbe_get_invariants_X540()
38 	mac->mcft_size = IXGBE_X540_MC_TBL_SIZE;  in ixgbe_get_invariants_X540()
39 	mac->vft_size = IXGBE_X540_VFT_TBL_SIZE;  in ixgbe_get_invariants_X540()
40 	mac->num_rar_entries = IXGBE_X540_RAR_ENTRIES;  in ixgbe_get_invariants_X540()
41 	mac->rx_pb_size = IXGBE_X540_RX_PB_SIZE;  in ixgbe_get_invariants_X540()
42 	mac->max_rx_queues = IXGBE_X540_MAX_RX_QUEUES;  in ixgbe_get_invariants_X540()
43 	mac->max_tx_queues = IXGBE_X540_MAX_TX_QUEUES;  in ixgbe_get_invariants_X540()
44 	mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);  in ixgbe_get_invariants_X540()
50  *  ixgbe_setup_mac_link_X540 - Set the auto advertised capabilitires
51  *  @hw: pointer to hardware structure
55 int ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed,  in ixgbe_setup_mac_link_X540()  argument
58 	return hw->phy.ops.setup_link_speed(hw, speed,  in ixgbe_setup_mac_link_X540()
63  *  ixgbe_reset_hw_X540 - Perform hardware reset
64  *  @hw: pointer to hardware structure
72 int ixgbe_reset_hw_X540(struct ixgbe_hw *hw)  in ixgbe_reset_hw_X540()  argument
74 	u32 swfw_mask = hw->phy.phy_semaphore_mask;  in ixgbe_reset_hw_X540()
79 	status = hw->mac.ops.stop_adapter(hw);  in ixgbe_reset_hw_X540()
84 	ixgbe_clear_tx_pending(hw);  in ixgbe_reset_hw_X540()
87 	status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);  in ixgbe_reset_hw_X540()
89 		hw_dbg(hw, "semaphore failed with %d", status);  in ixgbe_reset_hw_X540()
90 		return -EBUSY;  in ixgbe_reset_hw_X540()
94 	ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);  in ixgbe_reset_hw_X540()
95 	IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);  in ixgbe_reset_hw_X540()
96 	IXGBE_WRITE_FLUSH(hw);  in ixgbe_reset_hw_X540()
97 	hw->mac.ops.release_swfw_sync(hw, swfw_mask);  in ixgbe_reset_hw_X540()
100 	/* Poll for reset bit to self-clear indicating reset is complete */  in ixgbe_reset_hw_X540()
102 		ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);  in ixgbe_reset_hw_X540()
109 		status = -EIO;  in ixgbe_reset_hw_X540()
110 		hw_dbg(hw, "Reset polling failed to complete.\n");  in ixgbe_reset_hw_X540()
117 	 * for any pending HW events to complete.  in ixgbe_reset_hw_X540()
119 	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {  in ixgbe_reset_hw_X540()
120 		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;  in ixgbe_reset_hw_X540()
125 	IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT);  in ixgbe_reset_hw_X540()
128 	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);  in ixgbe_reset_hw_X540()
135 	hw->mac.num_rar_entries = IXGBE_X540_MAX_TX_QUEUES;  in ixgbe_reset_hw_X540()
136 	hw->mac.ops.init_rx_addrs(hw);  in ixgbe_reset_hw_X540()
139 	if (hw->mac.type == ixgbe_mac_e610)  in ixgbe_reset_hw_X540()
143 	hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);  in ixgbe_reset_hw_X540()
146 	if (is_valid_ether_addr(hw->mac.san_addr)) {  in ixgbe_reset_hw_X540()
148 		hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;  in ixgbe_reset_hw_X540()
150 		hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,  in ixgbe_reset_hw_X540()
151 				    hw->mac.san_addr, 0, IXGBE_RAH_AV);  in ixgbe_reset_hw_X540()
154 		hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,  in ixgbe_reset_hw_X540()
158 		hw->mac.num_rar_entries--;  in ixgbe_reset_hw_X540()
162 	hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,  in ixgbe_reset_hw_X540()
163 				   &hw->mac.wwpn_prefix);  in ixgbe_reset_hw_X540()
169  *  ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx
170  *  @hw: pointer to hardware structure
174  *  Then performs revision-specific operations, if any.
176 int ixgbe_start_hw_X540(struct ixgbe_hw *hw)  in ixgbe_start_hw_X540()  argument
180 	ret_val = ixgbe_start_hw_generic(hw);  in ixgbe_start_hw_X540()
184 	return ixgbe_start_hw_gen2(hw);  in ixgbe_start_hw_X540()
188  *  ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
189  *  @hw: pointer to hardware structure
194 int ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)  in ixgbe_init_eeprom_params_X540()  argument
196 	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;  in ixgbe_init_eeprom_params_X540()
198 	if (eeprom->type == ixgbe_eeprom_uninitialized) {  in ixgbe_init_eeprom_params_X540()
202 		eeprom->semaphore_delay = 10;  in ixgbe_init_eeprom_params_X540()
203 		eeprom->type = ixgbe_flash;  in ixgbe_init_eeprom_params_X540()
205 		eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));  in ixgbe_init_eeprom_params_X540()
207 		eeprom->word_size = BIT(eeprom_size +  in ixgbe_init_eeprom_params_X540()
210 		hw_dbg(hw, "Eeprom params: type = %d, size = %d\n",  in ixgbe_init_eeprom_params_X540()
211 		       eeprom->type, eeprom->word_size);  in ixgbe_init_eeprom_params_X540()
218  *  ixgbe_read_eerd_X540- Read EEPROM word using EERD
219  *  @hw: pointer to hardware structure
225 static int ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)  in ixgbe_read_eerd_X540()  argument
229 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_read_eerd_X540()
230 		return -EBUSY;  in ixgbe_read_eerd_X540()
232 	status = ixgbe_read_eerd_generic(hw, offset, data);  in ixgbe_read_eerd_X540()
234 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_read_eerd_X540()
239  *  ixgbe_read_eerd_buffer_X540 - Read EEPROM word(s) using EERD
240  *  @hw: pointer to hardware structure
247 static int ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw,  in ixgbe_read_eerd_buffer_X540()  argument
252 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_read_eerd_buffer_X540()
253 		return -EBUSY;  in ixgbe_read_eerd_buffer_X540()
255 	status = ixgbe_read_eerd_buffer_generic(hw, offset, words, data);  in ixgbe_read_eerd_buffer_X540()
257 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_read_eerd_buffer_X540()
262  *  ixgbe_write_eewr_X540 - Write EEPROM word using EEWR
263  *  @hw: pointer to hardware structure
269 static int ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data)  in ixgbe_write_eewr_X540()  argument
273 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_write_eewr_X540()
274 		return -EBUSY;  in ixgbe_write_eewr_X540()
276 	status = ixgbe_write_eewr_generic(hw, offset, data);  in ixgbe_write_eewr_X540()
278 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_write_eewr_X540()
283  *  ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR
284  *  @hw: pointer to hardware structure
291 static int ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw,  in ixgbe_write_eewr_buffer_X540()  argument
296 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_write_eewr_buffer_X540()
297 		return -EBUSY;  in ixgbe_write_eewr_buffer_X540()
299 	status = ixgbe_write_eewr_buffer_generic(hw, offset, words, data);  in ixgbe_write_eewr_buffer_X540()
301 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_write_eewr_buffer_X540()
306  *  ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum
311  *  @hw: pointer to hardware structure
313 static int ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw)  in ixgbe_calc_eeprom_checksum_X540()  argument
325 	 * Do not use hw->eeprom.ops.read because we do not want to take  in ixgbe_calc_eeprom_checksum_X540()
330 	/* Include 0x0-0x3F in the checksum */  in ixgbe_calc_eeprom_checksum_X540()
332 		if (ixgbe_read_eerd_generic(hw, i, &word)) {  in ixgbe_calc_eeprom_checksum_X540()
333 			hw_dbg(hw, "EEPROM read failed\n");  in ixgbe_calc_eeprom_checksum_X540()
334 			return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
340 	 * Include all data from pointers 0x3, 0x6-0xE.  This excludes the  in ixgbe_calc_eeprom_checksum_X540()
347 		if (ixgbe_read_eerd_generic(hw, i, &pointer)) {  in ixgbe_calc_eeprom_checksum_X540()
348 			hw_dbg(hw, "EEPROM read failed\n");  in ixgbe_calc_eeprom_checksum_X540()
354 		    pointer >= hw->eeprom.word_size)  in ixgbe_calc_eeprom_checksum_X540()
357 		if (ixgbe_read_eerd_generic(hw, pointer, &length)) {  in ixgbe_calc_eeprom_checksum_X540()
358 			hw_dbg(hw, "EEPROM read failed\n");  in ixgbe_calc_eeprom_checksum_X540()
359 			return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
364 		    (pointer + length) >= hw->eeprom.word_size)  in ixgbe_calc_eeprom_checksum_X540()
368 			if (ixgbe_read_eerd_generic(hw, j, &word)) {  in ixgbe_calc_eeprom_checksum_X540()
369 				hw_dbg(hw, "EEPROM read failed\n");  in ixgbe_calc_eeprom_checksum_X540()
370 				return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
376 	checksum = (u16)IXGBE_EEPROM_SUM - checksum;  in ixgbe_calc_eeprom_checksum_X540()
382  *  ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum
383  *  @hw: pointer to hardware structure
389 static int ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw,  in ixgbe_validate_eeprom_checksum_X540()  argument
400 	status = hw->eeprom.ops.read(hw, 0, &checksum);  in ixgbe_validate_eeprom_checksum_X540()
402 		hw_dbg(hw, "EEPROM read failed\n");  in ixgbe_validate_eeprom_checksum_X540()
406 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_validate_eeprom_checksum_X540()
407 		return -EBUSY;  in ixgbe_validate_eeprom_checksum_X540()
409 	status = hw->eeprom.ops.calc_checksum(hw);  in ixgbe_validate_eeprom_checksum_X540()
415 	/* Do not use hw->eeprom.ops.read because we do not want to take  in ixgbe_validate_eeprom_checksum_X540()
418 	status = ixgbe_read_eerd_generic(hw, IXGBE_EEPROM_CHECKSUM,  in ixgbe_validate_eeprom_checksum_X540()
427 		hw_dbg(hw, "Invalid EEPROM checksum");  in ixgbe_validate_eeprom_checksum_X540()
428 		status = -EIO;  in ixgbe_validate_eeprom_checksum_X540()
436 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_validate_eeprom_checksum_X540()
442  * ixgbe_update_eeprom_checksum_X540 - Updates the EEPROM checksum and flash
443  * @hw: pointer to hardware structure
449 static int ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw)  in ixgbe_update_eeprom_checksum_X540()  argument
458 	status = hw->eeprom.ops.read(hw, 0, &checksum);  in ixgbe_update_eeprom_checksum_X540()
460 		hw_dbg(hw, "EEPROM read failed\n");  in ixgbe_update_eeprom_checksum_X540()
464 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_update_eeprom_checksum_X540()
465 		return  -EBUSY;  in ixgbe_update_eeprom_checksum_X540()
467 	status = hw->eeprom.ops.calc_checksum(hw);  in ixgbe_update_eeprom_checksum_X540()
473 	/* Do not use hw->eeprom.ops.write because we do not want to  in ixgbe_update_eeprom_checksum_X540()
476 	status = ixgbe_write_eewr_generic(hw, IXGBE_EEPROM_CHECKSUM, checksum);  in ixgbe_update_eeprom_checksum_X540()
480 	status = ixgbe_update_flash_X540(hw);  in ixgbe_update_eeprom_checksum_X540()
483 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_update_eeprom_checksum_X540()
488  * ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device
489  * @hw: pointer to hardware structure
494 static int ixgbe_update_flash_X540(struct ixgbe_hw *hw)  in ixgbe_update_flash_X540()  argument
499 	status = ixgbe_poll_flash_update_done_X540(hw);  in ixgbe_update_flash_X540()
500 	if (status == -EIO) {  in ixgbe_update_flash_X540()
501 		hw_dbg(hw, "Flash update time out\n");  in ixgbe_update_flash_X540()
505 	flup = IXGBE_READ_REG(hw, IXGBE_EEC(hw)) | IXGBE_EEC_FLUP;  in ixgbe_update_flash_X540()
506 	IXGBE_WRITE_REG(hw, IXGBE_EEC(hw), flup);  in ixgbe_update_flash_X540()
508 	status = ixgbe_poll_flash_update_done_X540(hw);  in ixgbe_update_flash_X540()
510 		hw_dbg(hw, "Flash update complete\n");  in ixgbe_update_flash_X540()
512 		hw_dbg(hw, "Flash update time out\n");  in ixgbe_update_flash_X540()
514 	if (hw->revision_id == 0) {  in ixgbe_update_flash_X540()
515 		flup = IXGBE_READ_REG(hw, IXGBE_EEC(hw));  in ixgbe_update_flash_X540()
519 			IXGBE_WRITE_REG(hw, IXGBE_EEC(hw), flup);  in ixgbe_update_flash_X540()
522 		status = ixgbe_poll_flash_update_done_X540(hw);  in ixgbe_update_flash_X540()
524 			hw_dbg(hw, "Flash update complete\n");  in ixgbe_update_flash_X540()
526 			hw_dbg(hw, "Flash update time out\n");  in ixgbe_update_flash_X540()
533  * ixgbe_poll_flash_update_done_X540 - Poll flash update status
534  * @hw: pointer to hardware structure
539 static int ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw)  in ixgbe_poll_flash_update_done_X540()  argument
545 		reg = IXGBE_READ_REG(hw, IXGBE_EEC(hw));  in ixgbe_poll_flash_update_done_X540()
550 	return -EIO;  in ixgbe_poll_flash_update_done_X540()
554  * ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore
555  * @hw: pointer to hardware structure
561 int ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)  in ixgbe_acquire_swfw_sync_X540()  argument
584 		if (ixgbe_get_swfw_sync_semaphore(hw))  in ixgbe_acquire_swfw_sync_X540()
585 			return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
587 		swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw));  in ixgbe_acquire_swfw_sync_X540()
590 			IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swfw_sync);  in ixgbe_acquire_swfw_sync_X540()
591 			ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_acquire_swfw_sync_X540()
599 		ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_acquire_swfw_sync_X540()
603 	/* If the resource is not released by the FW/HW the SW can assume that  in ixgbe_acquire_swfw_sync_X540()
604 	 * the FW/HW malfunctions. In that case the SW should set the SW bit(s)  in ixgbe_acquire_swfw_sync_X540()
605 	 * of the requested resource(s) while ignoring the corresponding FW/HW  in ixgbe_acquire_swfw_sync_X540()
608 	if (ixgbe_get_swfw_sync_semaphore(hw))  in ixgbe_acquire_swfw_sync_X540()
609 		return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
610 	swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw));  in ixgbe_acquire_swfw_sync_X540()
613 		IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swfw_sync);  in ixgbe_acquire_swfw_sync_X540()
614 		ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_acquire_swfw_sync_X540()
630 		ixgbe_release_swfw_sync_X540(hw, rmask);  in ixgbe_acquire_swfw_sync_X540()
631 		ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_acquire_swfw_sync_X540()
632 		return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
634 	ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_acquire_swfw_sync_X540()
636 	return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
640  * ixgbe_release_swfw_sync_X540 - Release SWFW semaphore
641  * @hw: pointer to hardware structure
647 void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)  in ixgbe_release_swfw_sync_X540()  argument
654 	ixgbe_get_swfw_sync_semaphore(hw);  in ixgbe_release_swfw_sync_X540()
656 	swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw));  in ixgbe_release_swfw_sync_X540()
658 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swfw_sync);  in ixgbe_release_swfw_sync_X540()
660 	ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_release_swfw_sync_X540()
665  * ixgbe_get_swfw_sync_semaphore - Get hardware semaphore
666  * @hw: pointer to hardware structure
670 static int ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw)  in ixgbe_get_swfw_sync_semaphore()  argument
681 		swsm = IXGBE_READ_REG(hw, IXGBE_SWSM(hw));  in ixgbe_get_swfw_sync_semaphore()
688 		hw_dbg(hw,  in ixgbe_get_swfw_sync_semaphore()
690 		return -EIO;  in ixgbe_get_swfw_sync_semaphore()
695 		swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw));  in ixgbe_get_swfw_sync_semaphore()
705 	hw_dbg(hw, "REGSMP Software NVM semaphore not granted\n");  in ixgbe_get_swfw_sync_semaphore()
706 	ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_get_swfw_sync_semaphore()
707 	return -EIO;  in ixgbe_get_swfw_sync_semaphore()
711  * ixgbe_release_swfw_sync_semaphore - Release hardware semaphore
712  * @hw: pointer to hardware structure
716 static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)  in ixgbe_release_swfw_sync_semaphore()  argument
722 	swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC(hw));  in ixgbe_release_swfw_sync_semaphore()
724 	IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC(hw), swsm);  in ixgbe_release_swfw_sync_semaphore()
726 	swsm = IXGBE_READ_REG(hw, IXGBE_SWSM(hw));  in ixgbe_release_swfw_sync_semaphore()
728 	IXGBE_WRITE_REG(hw, IXGBE_SWSM(hw), swsm);  in ixgbe_release_swfw_sync_semaphore()
730 	IXGBE_WRITE_FLUSH(hw);  in ixgbe_release_swfw_sync_semaphore()
734  *  ixgbe_init_swfw_sync_X540 - Release hardware semaphore
735  *  @hw: pointer to hardware structure
740 void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw)  in ixgbe_init_swfw_sync_X540()  argument
747 	 * We got the lock - we release it.  in ixgbe_init_swfw_sync_X540()
748 	 * We timeout trying to get the lock - we force its release.  in ixgbe_init_swfw_sync_X540()
750 	ixgbe_get_swfw_sync_semaphore(hw);  in ixgbe_init_swfw_sync_X540()
751 	ixgbe_release_swfw_sync_semaphore(hw);  in ixgbe_init_swfw_sync_X540()
758 	ixgbe_acquire_swfw_sync_X540(hw, rmask);  in ixgbe_init_swfw_sync_X540()
759 	ixgbe_release_swfw_sync_X540(hw, rmask);  in ixgbe_init_swfw_sync_X540()
763  * ixgbe_blink_led_start_X540 - Blink LED based on index.
764  * @hw: pointer to hardware structure
765  * @index: led number to blink
770 int ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)  in ixgbe_blink_led_start_X540()  argument
778 		return -EINVAL;  in ixgbe_blink_led_start_X540()
780 	/* Link should be up in order for the blink bit in the LED control  in ixgbe_blink_led_start_X540()
784 	hw->mac.ops.check_link(hw, &speed, &link_up, false);  in ixgbe_blink_led_start_X540()
786 		macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);  in ixgbe_blink_led_start_X540()
788 		IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);  in ixgbe_blink_led_start_X540()
790 	/* Set the LED to LINK_UP + BLINK. */  in ixgbe_blink_led_start_X540()
791 	ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);  in ixgbe_blink_led_start_X540()
794 	IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);  in ixgbe_blink_led_start_X540()
795 	IXGBE_WRITE_FLUSH(hw);  in ixgbe_blink_led_start_X540()
801  * ixgbe_blink_led_stop_X540 - Stop blinking LED based on index.
802  * @hw: pointer to hardware structure
808 int ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)  in ixgbe_blink_led_stop_X540()  argument
814 		return -EINVAL;  in ixgbe_blink_led_stop_X540()
817 	ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);  in ixgbe_blink_led_stop_X540()
821 	IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);  in ixgbe_blink_led_stop_X540()
824 	macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);  in ixgbe_blink_led_stop_X540()
826 	IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);  in ixgbe_blink_led_stop_X540()
827 	IXGBE_WRITE_FLUSH(hw);  in ixgbe_blink_led_stop_X540()