Lines Matching +full:eeprom +full:- +full:data
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
18 static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,
28 u16 words, u16 *data);
30 u16 words, u16 *data);
41 * ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow
55 switch (hw->phy.media_type) { in ixgbe_device_supports_autoneg_fc()
58 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
65 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_device_supports_autoneg_fc()
75 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI) in ixgbe_device_supports_autoneg_fc()
82 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
106 hw->device_id); in ixgbe_device_supports_autoneg_fc()
112 * ixgbe_setup_fc_generic - Set up flow control
128 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { in ixgbe_setup_fc_generic()
130 return -EINVAL; in ixgbe_setup_fc_generic()
134 * 10gig parts do not have a word in the EEPROM to determine the in ixgbe_setup_fc_generic()
137 if (hw->fc.requested_mode == ixgbe_fc_default) in ixgbe_setup_fc_generic()
138 hw->fc.requested_mode = ixgbe_fc_full; in ixgbe_setup_fc_generic()
145 switch (hw->phy.media_type) { in ixgbe_setup_fc_generic()
148 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, ®_bp); in ixgbe_setup_fc_generic()
158 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_fc_generic()
175 switch (hw->fc.requested_mode) { in ixgbe_setup_fc_generic()
179 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
182 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
192 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
195 } else if (hw->phy.media_type == ixgbe_media_type_copper) { in ixgbe_setup_fc_generic()
213 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
216 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
221 return -EIO; in ixgbe_setup_fc_generic()
224 if (hw->mac.type != ixgbe_mac_X540) { in ixgbe_setup_fc_generic()
226 * Enable auto-negotiation between the MAC & PHY; in ixgbe_setup_fc_generic()
233 if (hw->fc.strict_ieee) in ixgbe_setup_fc_generic()
245 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
250 ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked); in ixgbe_setup_fc_generic()
254 } else if ((hw->phy.media_type == ixgbe_media_type_copper) && in ixgbe_setup_fc_generic()
256 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_fc_generic()
265 * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
280 hw->phy.media_type = hw->mac.ops.get_media_type(hw); in ixgbe_start_hw_generic()
283 hw->phy.ops.identify(hw); in ixgbe_start_hw_generic()
286 hw->mac.ops.clear_vfta(hw); in ixgbe_start_hw_generic()
289 hw->mac.ops.clear_hw_cntrs(hw); in ixgbe_start_hw_generic()
298 if (hw->mac.ops.setup_fc) { in ixgbe_start_hw_generic()
299 ret_val = hw->mac.ops.setup_fc(hw); in ixgbe_start_hw_generic()
305 switch (hw->mac.type) { in ixgbe_start_hw_generic()
309 hw->mac.ops.get_device_caps(hw, &device_caps); in ixgbe_start_hw_generic()
311 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
313 hw->need_crosstalk_fix = true; in ixgbe_start_hw_generic()
316 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
321 hw->adapter_stopped = false; in ixgbe_start_hw_generic()
327 * ixgbe_start_hw_gen2 - Init sequence for common device family
341 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_start_hw_gen2()
351 * ixgbe_init_hw_generic - Generic hardware initialization
365 status = hw->mac.ops.reset_hw(hw); in ixgbe_init_hw_generic()
369 status = hw->mac.ops.start_hw(hw); in ixgbe_init_hw_generic()
373 if (hw->mac.ops.init_led_link_act) in ixgbe_init_hw_generic()
374 hw->mac.ops.init_led_link_act(hw); in ixgbe_init_hw_generic()
380 * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters
402 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
413 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
421 if (hw->mac.type >= ixgbe_mac_82599EB) in ixgbe_clear_hw_cntrs_generic()
438 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_clear_hw_cntrs_generic()
463 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
475 if (hw->mac.type == ixgbe_mac_X550 || in ixgbe_clear_hw_cntrs_generic()
476 hw->mac.type == ixgbe_mac_X540 || in ixgbe_clear_hw_cntrs_generic()
477 hw->mac.type == ixgbe_mac_e610) { in ixgbe_clear_hw_cntrs_generic()
478 if (hw->phy.id == 0) in ixgbe_clear_hw_cntrs_generic()
479 hw->phy.ops.identify(hw); in ixgbe_clear_hw_cntrs_generic()
482 if (hw->mac.type == ixgbe_mac_X550 || hw->mac.type == ixgbe_mac_X540) { in ixgbe_clear_hw_cntrs_generic()
483 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
484 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
485 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
486 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
493 * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
495 * @pba_num: stores the part number string from the EEPROM
498 * Reads the part number string from the EEPROM.
507 u16 data; in ixgbe_read_pba_string_generic() local
511 return -EINVAL; in ixgbe_read_pba_string_generic()
514 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_string_generic()
520 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr); in ixgbe_read_pba_string_generic()
527 * if data is not ptr guard the PBA must be in legacy format which in ixgbe_read_pba_string_generic()
528 * means pba_ptr is actually our second data word for the PBA number in ixgbe_read_pba_string_generic()
531 if (data != IXGBE_PBANUM_PTR_GUARD) { in ixgbe_read_pba_string_generic()
537 return -ENOSPC; in ixgbe_read_pba_string_generic()
540 /* extract hex string from data and pba_ptr */ in ixgbe_read_pba_string_generic()
541 pba_num[0] = (data >> 12) & 0xF; in ixgbe_read_pba_string_generic()
542 pba_num[1] = (data >> 8) & 0xF; in ixgbe_read_pba_string_generic()
543 pba_num[2] = (data >> 4) & 0xF; in ixgbe_read_pba_string_generic()
544 pba_num[3] = data & 0xF; in ixgbe_read_pba_string_generic()
547 pba_num[6] = '-'; in ixgbe_read_pba_string_generic()
555 /* switch all the data but the '-' to hex char */ in ixgbe_read_pba_string_generic()
560 pba_num[offset] += 'A' - 0xA; in ixgbe_read_pba_string_generic()
566 ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length); in ixgbe_read_pba_string_generic()
574 return -EIO; in ixgbe_read_pba_string_generic()
578 if (pba_num_size < (((u32)length * 2) - 1)) { in ixgbe_read_pba_string_generic()
580 return -ENOSPC; in ixgbe_read_pba_string_generic()
585 length--; in ixgbe_read_pba_string_generic()
588 ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data); in ixgbe_read_pba_string_generic()
593 pba_num[offset * 2] = (u8)(data >> 8); in ixgbe_read_pba_string_generic()
594 pba_num[(offset * 2) + 1] = (u8)(data & 0xFF); in ixgbe_read_pba_string_generic()
602 * ixgbe_get_mac_addr_generic - Generic get MAC address
608 * in order for the MAC address to have been loaded from the EEPROM into RAR0
659 * ixgbe_get_bus_info_generic - Generic set PCI bus info
668 hw->bus.type = ixgbe_bus_type_pci_express; in ixgbe_get_bus_info_generic()
671 if (hw->mac.type == ixgbe_mac_e610) in ixgbe_get_bus_info_generic()
677 hw->bus.width = ixgbe_convert_bus_width(link_status); in ixgbe_get_bus_info_generic()
678 hw->bus.speed = ixgbe_convert_bus_speed(link_status); in ixgbe_get_bus_info_generic()
680 hw->mac.ops.set_lan_id(hw); in ixgbe_get_bus_info_generic()
686 * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
689 * Determines the LAN function id by reading memory-mapped registers
694 struct ixgbe_bus_info *bus = &hw->bus; in ixgbe_set_lan_id_multi_port_pcie()
699 bus->func = FIELD_GET(IXGBE_STATUS_LAN_ID, reg); in ixgbe_set_lan_id_multi_port_pcie()
700 bus->lan_id = bus->func; in ixgbe_set_lan_id_multi_port_pcie()
705 bus->func ^= 0x1; in ixgbe_set_lan_id_multi_port_pcie()
707 /* Get MAC instance from EEPROM for configuring CS4227 */ in ixgbe_set_lan_id_multi_port_pcie()
708 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) { in ixgbe_set_lan_id_multi_port_pcie()
709 hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4); in ixgbe_set_lan_id_multi_port_pcie()
710 bus->instance_id = FIELD_GET(IXGBE_EE_CTRL_4_INST_ID, in ixgbe_set_lan_id_multi_port_pcie()
716 * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units
733 hw->adapter_stopped = true; in ixgbe_stop_adapter_generic()
736 hw->mac.ops.disable_rx(hw); in ixgbe_stop_adapter_generic()
745 for (i = 0; i < hw->mac.max_tx_queues; i++) in ixgbe_stop_adapter_generic()
749 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_stop_adapter_generic()
761 * Prevent the PCI-E bus from hanging by disabling PCI-E primary in ixgbe_stop_adapter_generic()
768 * ixgbe_init_led_link_act_generic - Store the LED index link/activity.
776 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_led_link_act_generic()
788 mac->led_link_act = i; in ixgbe_init_led_link_act_generic()
796 switch (hw->mac.type) { in ixgbe_init_led_link_act_generic()
798 mac->led_link_act = 0; in ixgbe_init_led_link_act_generic()
801 mac->led_link_act = 1; in ixgbe_init_led_link_act_generic()
804 mac->led_link_act = 2; in ixgbe_init_led_link_act_generic()
811 * ixgbe_led_on_generic - Turns on the software controllable LEDs.
820 return -EINVAL; in ixgbe_led_on_generic()
832 * ixgbe_led_off_generic - Turns off the software controllable LEDs.
841 return -EINVAL; in ixgbe_led_off_generic()
853 * ixgbe_init_eeprom_params_generic - Initialize EEPROM params
856 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
857 * ixgbe_hw struct in order to set up EEPROM access.
861 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_generic() local
865 if (eeprom->type == ixgbe_eeprom_uninitialized) { in ixgbe_init_eeprom_params_generic()
866 eeprom->type = ixgbe_eeprom_none; in ixgbe_init_eeprom_params_generic()
869 eeprom->semaphore_delay = 10; in ixgbe_init_eeprom_params_generic()
870 /* Clear EEPROM page size, it will be initialized as needed */ in ixgbe_init_eeprom_params_generic()
871 eeprom->word_page_size = 0; in ixgbe_init_eeprom_params_generic()
874 * Check for EEPROM present first. in ixgbe_init_eeprom_params_generic()
879 eeprom->type = ixgbe_eeprom_spi; in ixgbe_init_eeprom_params_generic()
882 * SPI EEPROM is assumed here. This code would need to in ixgbe_init_eeprom_params_generic()
883 * change if a future EEPROM is not SPI. in ixgbe_init_eeprom_params_generic()
886 eeprom->word_size = BIT(eeprom_size + in ixgbe_init_eeprom_params_generic()
891 eeprom->address_bits = 16; in ixgbe_init_eeprom_params_generic()
893 eeprom->address_bits = 8; in ixgbe_init_eeprom_params_generic()
894 hw_dbg(hw, "Eeprom params: type = %d, size = %d, address bits: %d\n", in ixgbe_init_eeprom_params_generic()
895 eeprom->type, eeprom->word_size, eeprom->address_bits); in ixgbe_init_eeprom_params_generic()
902 * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang
904 * @offset: offset within the EEPROM to write
906 * @data: 16 bit word(s) to write to EEPROM
908 * Reads 16 bit word(s) from EEPROM through bit-bang method
911 u16 words, u16 *data) in ixgbe_write_eeprom_buffer_bit_bang_generic() argument
916 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_buffer_bit_bang_generic()
918 if (words == 0 || (offset + words > hw->eeprom.word_size)) in ixgbe_write_eeprom_buffer_bit_bang_generic()
919 return -EINVAL; in ixgbe_write_eeprom_buffer_bit_bang_generic()
922 * The EEPROM page size cannot be queried from the chip. We do lazy in ixgbe_write_eeprom_buffer_bit_bang_generic()
925 if ((hw->eeprom.word_page_size == 0) && in ixgbe_write_eeprom_buffer_bit_bang_generic()
935 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_write_eeprom_buffer_bit_bang_generic()
936 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_write_eeprom_buffer_bit_bang_generic()
938 count, &data[i]); in ixgbe_write_eeprom_buffer_bit_bang_generic()
948 * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM
950 * @offset: offset within the EEPROM to be written to
952 * @data: 16 bit word(s) to be written to the EEPROM
955 * EEPROM will most likely contain an invalid checksum.
958 u16 words, u16 *data) in ixgbe_write_eeprom_buffer_bit_bang() argument
966 /* Prepare the EEPROM for writing */ in ixgbe_write_eeprom_buffer_bit_bang()
973 return -EIO; in ixgbe_write_eeprom_buffer_bit_bang()
989 if ((hw->eeprom.address_bits == 8) && in ixgbe_write_eeprom_buffer_bit_bang()
993 /* Send the Write command (8-bit opcode + addr) */ in ixgbe_write_eeprom_buffer_bit_bang()
997 hw->eeprom.address_bits); in ixgbe_write_eeprom_buffer_bit_bang()
999 page_size = hw->eeprom.word_page_size; in ixgbe_write_eeprom_buffer_bit_bang()
1001 /* Send the data in burst via SPI */ in ixgbe_write_eeprom_buffer_bit_bang()
1003 word = data[i]; in ixgbe_write_eeprom_buffer_bit_bang()
1011 if (((offset + i) & (page_size - 1)) == in ixgbe_write_eeprom_buffer_bit_bang()
1012 (page_size - 1)) in ixgbe_write_eeprom_buffer_bit_bang()
1019 /* Done with writing - release the EEPROM */ in ixgbe_write_eeprom_buffer_bit_bang()
1026 * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM
1028 * @offset: offset within the EEPROM to be written to
1029 * @data: 16 bit word to be written to the EEPROM
1032 * EEPROM will most likely contain an invalid checksum.
1034 int ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data) in ixgbe_write_eeprom_generic() argument
1036 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_generic()
1038 if (offset >= hw->eeprom.word_size) in ixgbe_write_eeprom_generic()
1039 return -EINVAL; in ixgbe_write_eeprom_generic()
1041 return ixgbe_write_eeprom_buffer_bit_bang(hw, offset, 1, &data); in ixgbe_write_eeprom_generic()
1045 * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang
1047 * @offset: offset within the EEPROM to be read
1049 * @data: read 16 bit words(s) from EEPROM
1051 * Reads 16 bit word(s) from EEPROM through bit-bang method
1054 u16 words, u16 *data) in ixgbe_read_eeprom_buffer_bit_bang_generic() argument
1059 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1061 if (words == 0 || (offset + words > hw->eeprom.word_size)) in ixgbe_read_eeprom_buffer_bit_bang_generic()
1062 return -EINVAL; in ixgbe_read_eeprom_buffer_bit_bang_generic()
1070 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_read_eeprom_buffer_bit_bang_generic()
1071 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1074 count, &data[i]); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1084 * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang
1086 * @offset: offset within the EEPROM to be read
1088 * @data: read 16 bit word(s) from EEPROM
1090 * Reads 16 bit word(s) from EEPROM through bit-bang method
1093 u16 words, u16 *data) in ixgbe_read_eeprom_buffer_bit_bang() argument
1100 /* Prepare the EEPROM for reading */ in ixgbe_read_eeprom_buffer_bit_bang()
1107 return -EIO; in ixgbe_read_eeprom_buffer_bit_bang()
1115 if ((hw->eeprom.address_bits == 8) && in ixgbe_read_eeprom_buffer_bit_bang()
1123 hw->eeprom.address_bits); in ixgbe_read_eeprom_buffer_bit_bang()
1125 /* Read the data. */ in ixgbe_read_eeprom_buffer_bit_bang()
1127 data[i] = (word_in >> 8) | (word_in << 8); in ixgbe_read_eeprom_buffer_bit_bang()
1137 * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang
1139 * @offset: offset within the EEPROM to be read
1140 * @data: read 16 bit value from EEPROM
1142 * Reads 16 bit value from EEPROM through bit-bang method
1145 u16 *data) in ixgbe_read_eeprom_bit_bang_generic() argument
1147 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_bit_bang_generic()
1149 if (offset >= hw->eeprom.word_size) in ixgbe_read_eeprom_bit_bang_generic()
1150 return -EINVAL; in ixgbe_read_eeprom_bit_bang_generic()
1152 return ixgbe_read_eeprom_buffer_bit_bang(hw, offset, 1, data); in ixgbe_read_eeprom_bit_bang_generic()
1156 * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD
1158 * @offset: offset of word in the EEPROM to read
1160 * @data: 16 bit word(s) from the EEPROM
1162 * Reads a 16 bit word(s) from the EEPROM using the EERD register.
1165 u16 words, u16 *data) in ixgbe_read_eerd_buffer_generic() argument
1171 hw->eeprom.ops.init_params(hw); in ixgbe_read_eerd_buffer_generic()
1173 if (words == 0 || offset >= hw->eeprom.word_size) in ixgbe_read_eerd_buffer_generic()
1174 return -EINVAL; in ixgbe_read_eerd_buffer_generic()
1184 data[i] = (IXGBE_READ_REG(hw, IXGBE_EERD) >> in ixgbe_read_eerd_buffer_generic()
1187 hw_dbg(hw, "Eeprom read timed out\n"); in ixgbe_read_eerd_buffer_generic()
1196 * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size
1198 * @offset: offset within the EEPROM to be used as a scratch pad
1200 * Discover EEPROM page size by writing marching data at given offset.
1202 * at given offset so the data would be overwritten anyway.
1207 u16 data[IXGBE_EEPROM_PAGE_SIZE_MAX]; in ixgbe_detect_eeprom_page_size_generic() local
1212 data[i] = i; in ixgbe_detect_eeprom_page_size_generic()
1214 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX; in ixgbe_detect_eeprom_page_size_generic()
1216 IXGBE_EEPROM_PAGE_SIZE_MAX, data); in ixgbe_detect_eeprom_page_size_generic()
1217 hw->eeprom.word_page_size = 0; in ixgbe_detect_eeprom_page_size_generic()
1221 status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset, 1, data); in ixgbe_detect_eeprom_page_size_generic()
1227 * EEPROM address wraps around current page. in ixgbe_detect_eeprom_page_size_generic()
1229 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; in ixgbe_detect_eeprom_page_size_generic()
1231 hw_dbg(hw, "Detected EEPROM page size = %d words.\n", in ixgbe_detect_eeprom_page_size_generic()
1232 hw->eeprom.word_page_size); in ixgbe_detect_eeprom_page_size_generic()
1237 * ixgbe_read_eerd_generic - Read EEPROM word using EERD
1239 * @offset: offset of word in the EEPROM to read
1240 * @data: word read from the EEPROM
1242 * Reads a 16 bit word from the EEPROM using the EERD register.
1244 int ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data) in ixgbe_read_eerd_generic() argument
1246 return ixgbe_read_eerd_buffer_generic(hw, offset, 1, data); in ixgbe_read_eerd_generic()
1250 * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR
1252 * @offset: offset of word in the EEPROM to write
1254 * @data: word(s) write to the EEPROM
1256 * Write a 16 bit word(s) to the EEPROM using the EEWR register.
1259 u16 words, u16 *data) in ixgbe_write_eewr_buffer_generic() argument
1265 hw->eeprom.ops.init_params(hw); in ixgbe_write_eewr_buffer_generic()
1267 if (words == 0 || offset >= hw->eeprom.word_size) in ixgbe_write_eewr_buffer_generic()
1268 return -EINVAL; in ixgbe_write_eewr_buffer_generic()
1272 (data[i] << IXGBE_EEPROM_RW_REG_DATA) | in ixgbe_write_eewr_buffer_generic()
1277 hw_dbg(hw, "Eeprom write EEWR timed out\n"); in ixgbe_write_eewr_buffer_generic()
1285 hw_dbg(hw, "Eeprom write EEWR timed out\n"); in ixgbe_write_eewr_buffer_generic()
1294 * ixgbe_write_eewr_generic - Write EEPROM word using EEWR
1296 * @offset: offset of word in the EEPROM to write
1297 * @data: word write to the EEPROM
1299 * Write a 16 bit word to the EEPROM using the EEWR register.
1301 int ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data) in ixgbe_write_eewr_generic() argument
1303 return ixgbe_write_eewr_buffer_generic(hw, offset, 1, &data); in ixgbe_write_eewr_generic()
1307 * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status
1309 * @ee_reg: EEPROM flag for polling
1330 return -EIO; in ixgbe_poll_eerd_eewr_done()
1334 * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang
1337 * Prepares EEPROM for access using bit-bang method. This function should
1338 * be called before issuing a command to the EEPROM.
1345 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) != 0) in ixgbe_acquire_eeprom()
1346 return -EBUSY; in ixgbe_acquire_eeprom()
1350 /* Request EEPROM Access */ in ixgbe_acquire_eeprom()
1365 hw_dbg(hw, "Could not acquire EEPROM grant\n"); in ixgbe_acquire_eeprom()
1367 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_acquire_eeprom()
1368 return -EIO; in ixgbe_acquire_eeprom()
1371 /* Setup EEPROM for Read/Write */ in ixgbe_acquire_eeprom()
1381 * ixgbe_get_eeprom_semaphore - Get hardware semaphore
1384 * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
1405 hw_dbg(hw, "Driver can't access the Eeprom - SMBI Semaphore not granted.\n"); in ixgbe_get_eeprom_semaphore()
1421 return -EIO; in ixgbe_get_eeprom_semaphore()
1429 /* Set the SW EEPROM semaphore bit to request access */ in ixgbe_get_eeprom_semaphore()
1443 /* Release semaphores and return error if SW EEPROM semaphore in ixgbe_get_eeprom_semaphore()
1444 * was not granted because we don't have access to the EEPROM in ixgbe_get_eeprom_semaphore()
1447 hw_dbg(hw, "SWESMBI Software EEPROM semaphore not granted.\n"); in ixgbe_get_eeprom_semaphore()
1449 return -EIO; in ixgbe_get_eeprom_semaphore()
1456 * ixgbe_release_eeprom_semaphore - Release hardware semaphore
1474 * ixgbe_ready_eeprom - Polls for EEPROM ready
1484 * EEPROM will signal that the command has been completed by clearing in ixgbe_ready_eeprom()
1500 * On some parts, SPI write time could vary from 0-20mSec on 3.3V in ixgbe_ready_eeprom()
1501 * devices (and only 0-5mSec on 5V devices) in ixgbe_ready_eeprom()
1504 hw_dbg(hw, "SPI EEPROM Status error\n"); in ixgbe_ready_eeprom()
1505 return -EIO; in ixgbe_ready_eeprom()
1512 * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state
1533 * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
1535 * @data: data to send to the EEPROM
1538 static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data, in ixgbe_shift_out_eeprom_bits() argument
1548 * Mask is used to shift "count" bits of "data" out to the EEPROM in ixgbe_shift_out_eeprom_bits()
1551 mask = BIT(count - 1); in ixgbe_shift_out_eeprom_bits()
1555 * A "1" is shifted out to the EEPROM by setting bit "DI" to a in ixgbe_shift_out_eeprom_bits()
1557 * bit controls the clock input to the EEPROM). A "0" is in ixgbe_shift_out_eeprom_bits()
1558 * shifted out to the EEPROM by setting "DI" to "0" and then in ixgbe_shift_out_eeprom_bits()
1561 if (data & mask) in ixgbe_shift_out_eeprom_bits()
1575 * Shift mask to signify next bit of data to shift in to the in ixgbe_shift_out_eeprom_bits()
1576 * EEPROM in ixgbe_shift_out_eeprom_bits()
1588 * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
1596 u16 data = 0; in ixgbe_shift_in_eeprom_bits() local
1599 * In order to read a register from the EEPROM, we need to shift in ixgbe_shift_in_eeprom_bits()
1600 * 'count' bits in from the EEPROM. Bits are "shifted in" by raising in ixgbe_shift_in_eeprom_bits()
1601 * the clock input to the EEPROM (setting the SK bit), and then reading in ixgbe_shift_in_eeprom_bits()
1610 data = data << 1; in ixgbe_shift_in_eeprom_bits()
1617 data |= 1; in ixgbe_shift_in_eeprom_bits()
1622 return data; in ixgbe_shift_in_eeprom_bits()
1626 * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input.
1633 * Raise the clock input to the EEPROM in ixgbe_raise_eeprom_clk()
1643 * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input.
1650 * Lower the clock input to the EEPROM (clearing the SK bit), then in ixgbe_lower_eeprom_clk()
1660 * ixgbe_release_eeprom - Release EEPROM, release semaphores
1677 /* Stop requesting EEPROM access */ in ixgbe_release_eeprom()
1681 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_release_eeprom()
1687 usleep_range(hw->eeprom.semaphore_delay * 1000, in ixgbe_release_eeprom()
1688 hw->eeprom.semaphore_delay * 2000); in ixgbe_release_eeprom()
1692 * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum
1704 /* Include 0x0-0x3F in the checksum */ in ixgbe_calc_eeprom_checksum_generic()
1706 if (hw->eeprom.ops.read(hw, i, &word)) { in ixgbe_calc_eeprom_checksum_generic()
1707 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1713 /* Include all data from pointers except for the fw pointer */ in ixgbe_calc_eeprom_checksum_generic()
1715 if (hw->eeprom.ops.read(hw, i, &pointer)) { in ixgbe_calc_eeprom_checksum_generic()
1716 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1717 return -EIO; in ixgbe_calc_eeprom_checksum_generic()
1724 if (hw->eeprom.ops.read(hw, pointer, &length)) { in ixgbe_calc_eeprom_checksum_generic()
1725 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1726 return -EIO; in ixgbe_calc_eeprom_checksum_generic()
1733 if (hw->eeprom.ops.read(hw, j, &word)) { in ixgbe_calc_eeprom_checksum_generic()
1734 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1735 return -EIO; in ixgbe_calc_eeprom_checksum_generic()
1741 checksum = (u16)IXGBE_EEPROM_SUM - checksum; in ixgbe_calc_eeprom_checksum_generic()
1747 * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum
1751 * Performs checksum calculation and validates the EEPROM checksum. If the
1762 * Read the first word from the EEPROM. If this times out or fails, do in ixgbe_validate_eeprom_checksum_generic()
1764 * EEPROM read fails in ixgbe_validate_eeprom_checksum_generic()
1766 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_validate_eeprom_checksum_generic()
1768 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_validate_eeprom_checksum_generic()
1772 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_generic()
1778 status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum); in ixgbe_validate_eeprom_checksum_generic()
1780 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_validate_eeprom_checksum_generic()
1784 /* Verify read checksum from EEPROM is the same as in ixgbe_validate_eeprom_checksum_generic()
1788 status = -EIO; in ixgbe_validate_eeprom_checksum_generic()
1798 * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum
1807 * Read the first word from the EEPROM. If this times out or fails, do in ixgbe_update_eeprom_checksum_generic()
1809 * EEPROM read fails in ixgbe_update_eeprom_checksum_generic()
1811 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_update_eeprom_checksum_generic()
1813 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_update_eeprom_checksum_generic()
1817 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_update_eeprom_checksum_generic()
1823 status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum); in ixgbe_update_eeprom_checksum_generic()
1829 * ixgbe_set_rar_generic - Set Rx address register
1842 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_rar_generic()
1847 return -EINVAL; in ixgbe_set_rar_generic()
1851 hw->mac.ops.set_vmdq(hw, index, vmdq); in ixgbe_set_rar_generic()
1885 * ixgbe_clear_rar_generic - Remove Rx address register
1894 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_rar_generic()
1899 return -EINVAL; in ixgbe_clear_rar_generic()
1919 hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_clear_rar_generic()
1925 * ixgbe_init_rx_addrs_generic - Initializes receive address filters.
1935 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_init_rx_addrs_generic()
1940 * Otherwise, use the permanent address from the eeprom. in ixgbe_init_rx_addrs_generic()
1942 if (!is_valid_ether_addr(hw->mac.addr)) { in ixgbe_init_rx_addrs_generic()
1944 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1946 hw_dbg(hw, " Keeping Current RAR0 Addr =%pM\n", hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1950 hw_dbg(hw, " New MAC Addr =%pM\n", hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1952 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); in ixgbe_init_rx_addrs_generic()
1956 hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_init_rx_addrs_generic()
1958 hw->addr_ctrl.overflow_promisc = 0; in ixgbe_init_rx_addrs_generic()
1960 hw->addr_ctrl.rar_used_count = 1; in ixgbe_init_rx_addrs_generic()
1963 hw_dbg(hw, "Clearing RAR[1-%d]\n", rar_entries - 1); in ixgbe_init_rx_addrs_generic()
1970 hw->addr_ctrl.mta_in_use = 0; in ixgbe_init_rx_addrs_generic()
1971 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_init_rx_addrs_generic()
1974 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_init_rx_addrs_generic()
1977 if (hw->mac.ops.init_uta_tables) in ixgbe_init_rx_addrs_generic()
1978 hw->mac.ops.init_uta_tables(hw); in ixgbe_init_rx_addrs_generic()
1984 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
1989 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
1990 * incoming rx multicast addresses, to determine the bit-vector to check in
1991 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
1999 switch (hw->mac.mc_filter_type) { in ixgbe_mta_vector()
2017 /* vector can only be 12-bits or boundary will be exceeded */ in ixgbe_mta_vector()
2023 * ixgbe_set_mta - Set bit-vector in multicast table
2027 * Sets the bit-vector in the multicast table.
2035 hw->addr_ctrl.mta_in_use++; in ixgbe_set_mta()
2038 hw_dbg(hw, " bit-vector = 0x%03X\n", vector); in ixgbe_set_mta()
2041 * The MTA is a register array of 128 32-bit registers. It is treated in ixgbe_set_mta()
2051 hw->mac.mta_shadow[vector_reg] |= BIT(vector_bit); in ixgbe_set_mta()
2055 * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses
2074 hw->addr_ctrl.num_mc_addrs = netdev_mc_count(netdev); in ixgbe_update_mc_addr_list_generic()
2075 hw->addr_ctrl.mta_in_use = 0; in ixgbe_update_mc_addr_list_generic()
2079 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in ixgbe_update_mc_addr_list_generic()
2084 ixgbe_set_mta(hw, ha->addr); in ixgbe_update_mc_addr_list_generic()
2088 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_update_mc_addr_list_generic()
2090 hw->mac.mta_shadow[i]); in ixgbe_update_mc_addr_list_generic()
2092 if (hw->addr_ctrl.mta_in_use > 0) in ixgbe_update_mc_addr_list_generic()
2094 IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type); in ixgbe_update_mc_addr_list_generic()
2101 * ixgbe_enable_mc_generic - Enable multicast address in RAR
2108 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_enable_mc_generic()
2110 if (a->mta_in_use > 0) in ixgbe_enable_mc_generic()
2112 hw->mac.mc_filter_type); in ixgbe_enable_mc_generic()
2118 * ixgbe_disable_mc_generic - Disable multicast address in RAR
2125 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_disable_mc_generic()
2127 if (a->mta_in_use > 0) in ixgbe_disable_mc_generic()
2128 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_disable_mc_generic()
2134 * ixgbe_fc_enable_generic - Enable flow control
2147 if (!hw->fc.pause_time) in ixgbe_fc_enable_generic()
2148 return -EINVAL; in ixgbe_fc_enable_generic()
2152 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2153 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2154 if (!hw->fc.low_water[i] || in ixgbe_fc_enable_generic()
2155 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2157 return -EINVAL; in ixgbe_fc_enable_generic()
2163 hw->mac.ops.fc_autoneg(hw); in ixgbe_fc_enable_generic()
2182 switch (hw->fc.current_mode) { in ixgbe_fc_enable_generic()
2214 return -EIO; in ixgbe_fc_enable_generic()
2224 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2225 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2226 fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; in ixgbe_fc_enable_generic()
2228 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_generic()
2234 * to the Rx packet buffer size - 24KB. This allows in ixgbe_fc_enable_generic()
2238 fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; in ixgbe_fc_enable_generic()
2245 reg = hw->fc.pause_time * 0x00010001U; in ixgbe_fc_enable_generic()
2249 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); in ixgbe_fc_enable_generic()
2255 * ixgbe_negotiate_fc - Negotiate flow control
2271 return -EINVAL; in ixgbe_negotiate_fc()
2281 if (hw->fc.requested_mode == ixgbe_fc_full) { in ixgbe_negotiate_fc()
2282 hw->fc.current_mode = ixgbe_fc_full; in ixgbe_negotiate_fc()
2285 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2290 hw->fc.current_mode = ixgbe_fc_tx_pause; in ixgbe_negotiate_fc()
2294 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2297 hw->fc.current_mode = ixgbe_fc_none; in ixgbe_negotiate_fc()
2304 * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
2316 * - link is up but AN did not complete, or if in ixgbe_fc_autoneg_fiber()
2317 * - link is up and AN completed but timed out in ixgbe_fc_autoneg_fiber()
2323 return -EIO; in ixgbe_fc_autoneg_fiber()
2338 * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
2350 * - backplane autoneg was not completed, or if in ixgbe_fc_autoneg_backplane()
2351 * - we are 82599 and link partner is not AN enabled in ixgbe_fc_autoneg_backplane()
2355 return -EIO; in ixgbe_fc_autoneg_backplane()
2357 if (hw->mac.type == ixgbe_mac_82599EB) { in ixgbe_fc_autoneg_backplane()
2360 return -EIO; in ixgbe_fc_autoneg_backplane()
2377 * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
2387 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_fc_autoneg_copper()
2390 hw->phy.ops.read_reg(hw, MDIO_AN_LPA, in ixgbe_fc_autoneg_copper()
2401 * ixgbe_fc_autoneg - Configure flow control
2410 int ret_val = -EIO; in ixgbe_fc_autoneg()
2416 * - FC autoneg is disabled, or if in ixgbe_fc_autoneg()
2417 * - link is not up. in ixgbe_fc_autoneg()
2422 if (hw->fc.disable_fc_autoneg) in ixgbe_fc_autoneg()
2425 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_fc_autoneg()
2429 switch (hw->phy.media_type) { in ixgbe_fc_autoneg()
2453 hw->fc.fc_was_autonegged = true; in ixgbe_fc_autoneg()
2455 hw->fc.fc_was_autonegged = false; in ixgbe_fc_autoneg()
2456 hw->fc.current_mode = hw->fc.requested_mode; in ixgbe_fc_autoneg()
2461 * ixgbe_pcie_timeout_poll - Return number of times to poll for completion
2464 * System-wide timeout range is encoded in PCIe Device Control2 register.
2508 * ixgbe_disable_pcie_primary - Disable PCI-express primary access
2511 * Disables PCI-Express primary access and verifies there are no pending
2512 * requests. -EALREADY is returned if primary disable
2531 hw_dbg(hw, "GIO disable did not set - requesting resets\n"); in ixgbe_disable_pcie_primary()
2537 ixgbe_removed(hw->hw_addr)) in ixgbe_disable_pcie_primary()
2555 hw_dbg(hw, "GIO Primary Disable bit didn't clear - requesting resets\n"); in ixgbe_disable_pcie_primary()
2557 hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_disable_pcie_primary()
2559 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_disable_pcie_primary()
2570 if (ixgbe_removed(hw->hw_addr)) in ixgbe_disable_pcie_primary()
2577 return -EALREADY; in ixgbe_disable_pcie_primary()
2581 * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore
2586 * function (CSR, PHY0, PHY1, EEPROM, Flash)
2602 return -EBUSY; in ixgbe_acquire_swfw_sync()
2622 return -EBUSY; in ixgbe_acquire_swfw_sync()
2626 * ixgbe_release_swfw_sync - Release SWFW semaphore
2631 * function (CSR, PHY0, PHY1, EEPROM, Flash)
2648 * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read
2664 * prot_autoc_write_generic - Hides MAC differences needed for AUTOC write
2677 * ixgbe_disable_rx_buff_generic - Stops the receive data path
2680 * Stops the receive data path and waits for the HW to internally
2697 /* Use interrupt-safe sleep just in case */ in ixgbe_disable_rx_buff_generic()
2710 * ixgbe_enable_rx_buff_generic - Enables the receive data path
2713 * Enables the receive data path
2728 * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit
2737 hw->mac.ops.enable_rx(hw); in ixgbe_enable_rx_dma_generic()
2739 hw->mac.ops.disable_rx(hw); in ixgbe_enable_rx_dma_generic()
2745 * ixgbe_blink_led_start_generic - Blink LED based on index.
2759 return -EINVAL; in ixgbe_blink_led_start_generic()
2762 * Link must be up to auto-blink the LEDs; in ixgbe_blink_led_start_generic()
2765 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_blink_led_start_generic()
2768 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_start_generic()
2775 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_start_generic()
2793 * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
2805 return -EINVAL; in ixgbe_blink_led_stop_generic()
2807 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_stop_generic()
2814 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_stop_generic()
2828 * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
2832 * This function will read the EEPROM location for the SAN MAC address
2842 * First read the EEPROM pointer to see if the MAC addresses are in ixgbe_get_san_mac_addr_offset()
2845 ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, in ixgbe_get_san_mac_addr_offset()
2848 hw_err(hw, "eeprom read at offset %d failed\n", in ixgbe_get_san_mac_addr_offset()
2855 * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM
2859 * Reads the SAN MAC address from the EEPROM, if it's available. This is
2860 * per-port, so set_lan_id() must be called before reading the addresses.
2862 * upon for non-SFP connections, so we must call it here.
2871 * First read the EEPROM pointer to see if the MAC addresses are in ixgbe_get_san_mac_addr_generic()
2880 hw->mac.ops.set_lan_id(hw); in ixgbe_get_san_mac_addr_generic()
2882 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : in ixgbe_get_san_mac_addr_generic()
2885 ret_val = hw->eeprom.ops.read(hw, san_mac_offset, in ixgbe_get_san_mac_addr_generic()
2888 hw_err(hw, "eeprom read at offset %d failed\n", in ixgbe_get_san_mac_addr_generic()
2899 /* No addresses available in this EEPROM. It's not necessarily an in ixgbe_get_san_mac_addr_generic()
2908 * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count
2911 * Read PCIe configuration space, and get the MSI-X vector count from
2920 switch (hw->mac.type) { in ixgbe_get_pcie_msix_count_generic()
2942 if (ixgbe_removed(hw->hw_addr)) in ixgbe_get_pcie_msix_count_generic()
2946 /* MSI-X count is zero-based in HW */ in ixgbe_get_pcie_msix_count_generic()
2956 * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address
2964 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_vmdq_generic()
2969 return -EINVAL; in ixgbe_clear_vmdq_generic()
2975 if (ixgbe_removed(hw->hw_addr)) in ixgbe_clear_vmdq_generic()
2994 mpsar_hi &= ~BIT(vmdq - 32); in ixgbe_clear_vmdq_generic()
3000 rar != 0 && rar != hw->mac.san_mac_rar_index) in ixgbe_clear_vmdq_generic()
3001 hw->mac.ops.clear_rar(hw, rar); in ixgbe_clear_vmdq_generic()
3007 * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address
3015 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_vmdq_generic()
3020 return -EINVAL; in ixgbe_set_vmdq_generic()
3029 mpsar |= BIT(vmdq - 32); in ixgbe_set_vmdq_generic()
3036 * ixgbe_set_vmdq_san_mac_generic - Associate VMDq pool index with a rx address
3043 * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index]
3047 u32 rar = hw->mac.san_mac_rar_index; in ixgbe_set_vmdq_san_mac_generic()
3054 IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), BIT(vmdq - 32)); in ixgbe_set_vmdq_san_mac_generic()
3061 * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array
3075 * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
3097 first_empty_slot = vlvf_bypass ? -ENOSPC : 0; in ixgbe_find_vlvf_slot()
3105 * pre-decrement loop covering (IXGBE_VLVF_ENTRIES - 1) .. 1 in ixgbe_find_vlvf_slot()
3107 for (regindex = IXGBE_VLVF_ENTRIES; --regindex;) { in ixgbe_find_vlvf_slot()
3121 return first_empty_slot ? : -ENOSPC; in ixgbe_find_vlvf_slot()
3125 * ixgbe_set_vfta_generic - Set VLAN filter table
3141 return -EINVAL; in ixgbe_set_vfta_generic()
3144 * this is a 2 part operation - first the VFTA, then the in ixgbe_set_vfta_generic()
3150 * The VFTA is a bitstring made up of 128 32-bit registers in ixgbe_set_vfta_generic()
3152 * bits[11-5]: which register in ixgbe_set_vfta_generic()
3153 * bits[4-0]: which bit in the register in ixgbe_set_vfta_generic()
3195 !IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + 1 - vind / 32))) { in ixgbe_set_vfta_generic()
3240 * ixgbe_clear_vfta_generic - Clear VLAN filter table
3249 for (offset = 0; offset < hw->mac.vft_size; offset++) in ixgbe_clear_vfta_generic()
3262 * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
3271 if (!hw->need_crosstalk_fix) in ixgbe_need_crosstalk_fix()
3275 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_need_crosstalk_fix()
3287 * ixgbe_check_mac_link_generic - Determine link and speed status
3308 switch (hw->mac.type) { in ixgbe_check_mac_link_generic()
3319 /* sanity check - No SFP+ devices here */ in ixgbe_check_mac_link_generic()
3375 if ((hw->mac.type >= ixgbe_mac_X550) && in ixgbe_check_mac_link_generic()
3385 if ((hw->mac.type >= ixgbe_mac_X550 || in ixgbe_check_mac_link_generic()
3386 hw->mac.type == ixgbe_mac_e610) && in ixgbe_check_mac_link_generic()
3394 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T || in ixgbe_check_mac_link_generic()
3395 hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) { in ixgbe_check_mac_link_generic()
3407 * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from
3408 * the EEPROM
3413 * This function will read the EEPROM from the alternative SAN MAC address
3428 if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset)) in ixgbe_get_wwn_prefix_generic()
3437 if (hw->eeprom.ops.read(hw, offset, &caps)) in ixgbe_get_wwn_prefix_generic()
3444 if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) in ixgbe_get_wwn_prefix_generic()
3445 hw_err(hw, "eeprom read at offset %d failed\n", offset); in ixgbe_get_wwn_prefix_generic()
3448 if (hw->eeprom.ops.read(hw, offset, wwpn_prefix)) in ixgbe_get_wwn_prefix_generic()
3454 hw_err(hw, "eeprom read at offset %d failed\n", offset); in ixgbe_get_wwn_prefix_generic()
3459 * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
3461 * @enable: enable or disable switch for MAC anti-spoofing
3462 * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
3471 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_mac_anti_spoofing()
3483 * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
3485 * @enable: enable or disable switch for VLAN anti-spoofing
3486 * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
3495 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_vlan_anti_spoofing()
3507 * ixgbe_get_device_caps_generic - Get additional device capabilities
3509 * @device_caps: the EEPROM word with the extra device capabilities
3511 * This function will read the EEPROM location for the device capabilities,
3516 hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); in ixgbe_get_device_caps_generic()
3522 * ixgbe_set_rxpba_generic - Initialize RX packet buffer
3533 u32 pbsize = hw->mac.rx_pb_size; in ixgbe_set_rxpba_generic()
3538 pbsize -= headroom; in ixgbe_set_rxpba_generic()
3552 pbsize -= rxpktsize * (num_pb / 2); in ixgbe_set_rxpba_generic()
3559 rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; in ixgbe_set_rxpba_generic()
3573 txpbthresh = (txpktsize / 1024) - IXGBE_TXPKT_SIZE_MAX; in ixgbe_set_rxpba_generic()
3588 * ixgbe_calculate_checksum - Calculate checksum for buffer
3589 * @buffer: pointer to EEPROM
3590 * @length: size of EEPROM to calculate a checksum for
3606 return (u8) (0 - sum); in ixgbe_calculate_checksum()
3610 * ixgbe_hic_unlocked - Issue command to manageability block unlocked
3618 * semaphore, -EINVAL when incorrect parameters passed or -EIO when
3631 hw_dbg(hw, "Buffer length failure buffersize-%d.\n", length); in ixgbe_hic_unlocked()
3632 return -EINVAL; in ixgbe_hic_unlocked()
3643 return -EIO; in ixgbe_hic_unlocked()
3649 return -EINVAL; in ixgbe_hic_unlocked()
3674 return -EIO; in ixgbe_hic_unlocked()
3680 * ixgbe_host_interface_command - Issue command to manageability block
3686 * @return_data: read and return data from the buffer (true) or not (false)
3690 * So we will leave this up to the caller to read back the data
3694 * else return -EIO or -EINVAL.
3708 hw_dbg(hw, "Buffer length failure buffersize-%d.\n", length); in ixgbe_host_interface_command()
3709 return -EINVAL; in ixgbe_host_interface_command()
3712 status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
3732 /* If there is any thing in data position pull it in */ in ixgbe_host_interface_command()
3733 buf_len = hdr->buf_len; in ixgbe_host_interface_command()
3739 status = -EIO; in ixgbe_host_interface_command()
3753 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
3759 * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware
3770 * else returns -EBUSY when encountering an error acquiring
3771 * semaphore or -EIO when command fails.
3784 fw_cmd.port_num = hw->bus.func; in ixgbe_set_fw_drv_ver_generic()
3807 ret_val = -EIO; in ixgbe_set_fw_drv_ver_generic()
3816 * ixgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo
3832 if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED)) in ixgbe_clear_tx_pending()
3854 if (ixgbe_removed(hw->hw_addr)) in ixgbe_clear_tx_pending()
3888 * ixgbe_get_ets_data - Extracts the ETS bit data
3890 * @ets_cfg: extected ETS data
3891 * @ets_offset: offset of ETS data
3900 status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, ets_offset); in ixgbe_get_ets_data()
3905 return -EOPNOTSUPP; in ixgbe_get_ets_data()
3907 status = hw->eeprom.ops.read(hw, *ets_offset, ets_cfg); in ixgbe_get_ets_data()
3912 return -EOPNOTSUPP; in ixgbe_get_ets_data()
3918 * ixgbe_get_thermal_sensor_data_generic - Gathers thermal sensor data
3921 * Returns the thermal sensor data structure
3931 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_get_thermal_sensor_data_generic() local
3935 return -EOPNOTSUPP; in ixgbe_get_thermal_sensor_data_generic()
3949 status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i), in ixgbe_get_thermal_sensor_data_generic()
3960 status = hw->phy.ops.read_i2c_byte(hw, in ixgbe_get_thermal_sensor_data_generic()
3963 &data->sensor[i].temp); in ixgbe_get_thermal_sensor_data_generic()
3973 * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
3981 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_init_thermal_sensor_thresh_generic() local
3991 memset(data, 0, sizeof(struct ixgbe_thermal_sensor_data)); in ixgbe_init_thermal_sensor_thresh_generic()
3995 return -EOPNOTSUPP; in ixgbe_init_thermal_sensor_thresh_generic()
4010 if (hw->eeprom.ops.read(hw, ets_offset + 1 + i, &ets_sensor)) { in ixgbe_init_thermal_sensor_thresh_generic()
4011 hw_err(hw, "eeprom read at offset %d failed\n", in ixgbe_init_thermal_sensor_thresh_generic()
4021 hw->phy.ops.write_i2c_byte(hw, in ixgbe_init_thermal_sensor_thresh_generic()
4028 data->sensor[i].location = sensor_location; in ixgbe_init_thermal_sensor_thresh_generic()
4029 data->sensor[i].caution_thresh = therm_limit; in ixgbe_init_thermal_sensor_thresh_generic()
4030 data->sensor[i].max_op_thresh = therm_limit - low_thresh_delta; in ixgbe_init_thermal_sensor_thresh_generic()
4037 * ixgbe_get_orom_version - Return option ROM from EEPROM
4042 * if valid option ROM version, nvm_ver->or_valid set to true
4043 * else nvm_ver->or_valid is false.
4050 nvm_ver->or_valid = false; in ixgbe_get_orom_version()
4052 hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset); in ixgbe_get_orom_version()
4058 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh); in ixgbe_get_orom_version()
4059 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl); in ixgbe_get_orom_version()
4067 nvm_ver->or_valid = true; in ixgbe_get_orom_version()
4068 nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT; in ixgbe_get_orom_version()
4069 nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) | in ixgbe_get_orom_version()
4071 nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK; in ixgbe_get_orom_version()
4075 * ixgbe_get_oem_prod_version - Etrack ID from EEPROM
4079 * if valid OEM product version, nvm_ver->oem_valid set to true
4080 * else nvm_ver->oem_valid is false.
4087 nvm_ver->oem_valid = false; in ixgbe_get_oem_prod_version()
4088 hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset); in ixgbe_get_oem_prod_version()
4095 hw->eeprom.ops.read(hw, offset, &mod_len); in ixgbe_get_oem_prod_version()
4096 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap); in ixgbe_get_oem_prod_version()
4103 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver); in ixgbe_get_oem_prod_version()
4104 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num); in ixgbe_get_oem_prod_version()
4111 nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT; in ixgbe_get_oem_prod_version()
4112 nvm_ver->oem_minor = prod_ver & NVM_VER_MASK; in ixgbe_get_oem_prod_version()
4113 nvm_ver->oem_release = rel_num; in ixgbe_get_oem_prod_version()
4114 nvm_ver->oem_valid = true; in ixgbe_get_oem_prod_version()
4118 * ixgbe_get_etk_id - Return Etrack ID from EEPROM
4130 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l)) in ixgbe_get_etk_id()
4132 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h)) in ixgbe_get_etk_id()
4139 nvm_ver->etk_id = etk_id_h; in ixgbe_get_etk_id()
4140 nvm_ver->etk_id |= (etk_id_l << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
4142 nvm_ver->etk_id = etk_id_l; in ixgbe_get_etk_id()
4143 nvm_ver->etk_id |= (etk_id_h << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
4153 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_disable_rx_generic()
4160 hw->mac.set_lben = true; in ixgbe_disable_rx_generic()
4162 hw->mac.set_lben = false; in ixgbe_disable_rx_generic()
4177 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_enable_rx_generic()
4178 if (hw->mac.set_lben) { in ixgbe_enable_rx_generic()
4184 hw->mac.set_lben = false; in ixgbe_enable_rx_generic()
4189 /** ixgbe_mng_present - returns true when management capability is present
4196 if (hw->mac.type < ixgbe_mac_82599EB) in ixgbe_mng_present()
4205 * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
4223 /* Mask off requested but non-supported speeds */ in ixgbe_setup_mac_link_multispeed_fiber()
4224 status = hw->mac.ops.get_link_capabilities(hw, &link_speed, &autoneg); in ixgbe_setup_mac_link_multispeed_fiber()
4238 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
4240 hw->mac.ops.set_rate_select_speed(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4251 /* Allow module to change analog characteristics (1G->10G) */ in ixgbe_setup_mac_link_multispeed_fiber()
4254 status = hw->mac.ops.setup_mac_link(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4261 if (hw->mac.ops.flap_tx_laser) in ixgbe_setup_mac_link_multispeed_fiber()
4262 hw->mac.ops.flap_tx_laser(hw); in ixgbe_setup_mac_link_multispeed_fiber()
4273 status = hw->mac.ops.check_link(hw, &link_speed, in ixgbe_setup_mac_link_multispeed_fiber()
4289 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
4291 hw->mac.ops.set_rate_select_speed(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4302 /* Allow module to change analog characteristics (10G->1G) */ in ixgbe_setup_mac_link_multispeed_fiber()
4305 status = hw->mac.ops.setup_mac_link(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4312 if (hw->mac.ops.flap_tx_laser) in ixgbe_setup_mac_link_multispeed_fiber()
4313 hw->mac.ops.flap_tx_laser(hw); in ixgbe_setup_mac_link_multispeed_fiber()
4319 status = hw->mac.ops.check_link(hw, &link_speed, &link_up, in ixgbe_setup_mac_link_multispeed_fiber()
4339 hw->phy.autoneg_advertised = 0; in ixgbe_setup_mac_link_multispeed_fiber()
4342 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
4345 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
4351 * ixgbe_set_soft_rate_select_speed - Set module link speed
4377 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
4387 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
4396 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()
4406 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()