Lines Matching +full:i3c +full:- +full:hci
1 // SPDX-License-Identifier: GPL-2.0
29 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
30 * @bus: I3C bus to take the lock on
34 * - enabling/disabling slave events
35 * - re-triggering DAA
36 * - changing the dynamic address of a device
37 * - relinquishing mastership
38 * - ...
41 * logic to rely on I3C device information that could be changed behind their
46 down_write(&bus->lock);
50 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
52 * @bus: I3C bus to release the lock on
60 up_write(&bus->lock);
64 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
65 * @bus: I3C bus to take the lock on
68 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
69 * maintenance operations). Basically all communications with I3C devices are
71 * state or I3C dynamic address).
74 * In other words, transfer requests passed to the I3C master can be submitted
75 * in parallel and I3C master drivers have to use their own locking to make
76 * sure two different communications are not inter-mixed, or access to the
81 down_read(&bus->lock);
85 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
86 * @bus: I3C bus to release the lock on
94 up_read(&bus->lock);
114 if (dev->type == &i3c_device_type)
115 return dev_to_i3cdev(dev)->bus;
119 return &master->bus;
126 if (dev->type == &i3c_device_type)
127 return dev_to_i3cdev(dev)->desc;
131 return master->this;
144 ret = sprintf(buf, "%x\n", desc->info.bcr);
161 ret = sprintf(buf, "%x\n", desc->info.dcr);
178 ret = sprintf(buf, "%llx\n", desc->info.pid);
195 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
203 "hdr-ddr", "hdr-tsp", "hdr-tsl",
218 caps = desc->info.hdr_cap;
250 struct i3c_device *i3c = dev_to_i3cdev(dev);
254 i3c_device_get_info(i3c, &devinfo);
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
263 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
285 if (i3cdev->desc)
286 devinfo = i3cdev->desc->info;
292 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
296 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
310 if (dev->type != &i3c_device_type)
315 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
324 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
326 return driver->probe(i3cdev);
332 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
334 if (driver->remove)
335 driver->remove(i3cdev);
341 .name = "i3c",
357 status = bus->addrslots[bitpos / BITS_PER_LONG];
378 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
406 * Some master controllers (such as HCI) need to prepare the entire above transaction before
407 * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated
410 * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is
411 * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI
414 * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise,
415 * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be
440 return -ENOMEM;
465 idr_remove(&i3c_bus_idr, i3cbus->id);
471 int ret, start, end, id = -1;
473 init_rwsem(&i3cbus->lock);
474 INIT_LIST_HEAD(&i3cbus->devs.i2c);
475 INIT_LIST_HEAD(&i3cbus->devs.i3c);
477 i3cbus->mode = I3C_BUS_MODE_PURE;
480 id = of_alias_get_id(np, "i3c");
497 i3cbus->id = ret;
534 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
535 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
536 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
547 if (i3cbus->mode < 0 ||
548 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
549 !i3c_bus_mode_strings[i3cbus->mode])
552 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
567 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
568 i3cbus->cur_master->info.pid);
583 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
598 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
609 if (!master || !master->ops)
610 return -EINVAL;
612 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
613 return -EINVAL;
615 i3c_bus_normaluse_lock(&master->bus);
618 ret = master->ops->enable_hotjoin(master);
620 ret = master->ops->disable_hotjoin(master);
622 master->hotjoin = enable;
624 i3c_bus_normaluse_unlock(&master->bus);
636 if (!i3cbus->cur_master)
637 return -EINVAL;
640 return -EINVAL;
642 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
650 * i3c_master_enable_hotjoin - Enable hotjoin
651 * @master: I3C master object
662 * i3c_master_disable_hotjoin - Disable hotjoin
663 * @master: I3C master object
679 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
707 if (master->wq)
708 destroy_workqueue(master->wq);
710 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
713 of_node_put(dev->of_node);
725 i3cbus->mode = mode;
727 switch (i3cbus->mode) {
729 if (!i3cbus->scl_rate.i3c)
730 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
734 if (!i3cbus->scl_rate.i3c)
735 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
736 if (!i3cbus->scl_rate.i2c)
737 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
740 if (!i3cbus->scl_rate.i2c)
741 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
742 if (!i3cbus->scl_rate.i3c ||
743 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
744 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
747 return -EINVAL;
750 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
751 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
754 * I3C/I2C frequency may have been overridden, check that user-provided
757 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
758 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
759 return -EINVAL;
773 return &master->i2c;
789 return ERR_PTR(-ENOMEM);
791 dev->common.master = master;
792 dev->addr = addr;
793 dev->lvr = lvr;
801 dest->addr = addr;
802 dest->payload.len = payloadlen;
804 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
806 dest->payload.data = NULL;
808 return dest->payload.data;
813 kfree(dest->payload.data);
820 cmd->rnw = rnw ? 1 : 0;
821 cmd->id = id;
822 cmd->dests = dests;
823 cmd->ndests = ndests;
824 cmd->err = I3C_ERROR_UNKNOWN;
833 return -EINVAL;
835 if (WARN_ON(master->init_done &&
836 !rwsem_is_locked(&master->bus.lock)))
837 return -EINVAL;
839 if (!master->ops->send_ccc_cmd)
840 return -ENOTSUPP;
842 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
843 return -EINVAL;
845 if (master->ops->supports_ccc_cmd &&
846 !master->ops->supports_ccc_cmd(master, cmd))
847 return -ENOTSUPP;
849 ret = master->ops->send_ccc_cmd(master, cmd);
851 if (cmd->err != I3C_ERROR_UNKNOWN)
852 return cmd->err;
866 i3c_bus_for_each_i2cdev(&master->bus, dev) {
867 if (dev->addr == addr)
875 * i3c_master_get_free_addr() - get a free address on the bus
876 * @master: I3C master object
881 * Return: the first free address starting at @start_addr (included) or -ENOMEM
887 return i3c_bus_get_free_addr(&master->bus, start_addr);
895 WARN_ON(i3cdev->desc);
897 of_node_put(i3cdev->dev.of_node);
914 return ERR_PTR(-ENOMEM);
916 dev->common.master = master;
917 dev->info = *info;
918 mutex_init(&dev->ibi_lock);
932 return -EINVAL;
934 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
936 return -EINVAL;
949 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
956 * behind dynamic address assignment has to be handled in the I3C master
961 * Return: 0 in case of success, a positive I3C error code if the error is
989 return -ENOMEM;
991 events->events = evts;
1004 * i3c_master_disec_locked() - send a DISEC CCC command
1006 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1014 * Return: 0 in case of success, a positive I3C error code if the error is
1025 * i3c_master_enec_locked() - send an ENEC CCC command
1027 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1035 * Return: 0 in case of success, a positive I3C error code if the error is
1046 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1053 * This should be called after all I3C devices have been discovered (in other
1055 * &i3c_master_controller_ops->bus_init().
1056 * It should also be called if a master ACKed an Hot-Join request and assigned
1061 * Return: 0 in case of success, a positive I3C error code if the error is
1077 return -EINVAL;
1083 if (i3cdev == master->this)
1086 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1100 ndevs - 1));
1102 return -ENOMEM;
1104 defslvs->count = ndevs;
1105 defslvs->master.bcr = master->this->info.bcr;
1106 defslvs->master.dcr = master->this->info.dcr;
1107 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1108 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1110 desc = defslvs->slaves;
1112 desc->lvr = i2cdev->lvr;
1113 desc->static_addr = i2cdev->addr << 1;
1118 /* Skip the I3C dev representing this master. */
1119 if (i3cdev == master->this)
1122 desc->bcr = i3cdev->info.bcr;
1123 desc->dcr = i3cdev->info.dcr;
1124 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1125 desc->static_addr = i3cdev->info.static_addr << 1;
1146 return -EINVAL;
1150 return -ENOMEM;
1152 setda->addr = newaddr << 1;
1182 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1184 return -ENOMEM;
1190 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1191 dest.payload.len -= 1;
1200 info->max_ibi_len = mrl->ibi_len;
1203 info->max_read_len = be16_to_cpu(mrl->read_len);
1206 ret = -EIO;
1224 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1226 return -ENOMEM;
1234 ret = -EIO;
1238 info->max_write_len = be16_to_cpu(mwl->len);
1254 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1257 return -ENOMEM;
1266 dest.payload.len -= 3;
1273 ret = -EIO;
1277 info->max_read_ds = getmaxds->maxrd;
1278 info->max_write_ds = getmaxds->maxwr;
1280 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1281 ((u32)getmaxds->maxrdturn[1] << 8) |
1282 ((u32)getmaxds->maxrdturn[2] << 16);
1298 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1301 return -ENOMEM;
1309 ret = -EIO;
1313 info->hdr_cap = gethdrcap->modes;
1329 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1331 return -ENOMEM;
1338 info->pid = 0;
1339 for (i = 0; i < sizeof(getpid->pid); i++) {
1340 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1342 info->pid |= (u64)getpid->pid[i] << sft;
1359 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1361 return -ENOMEM;
1368 info->bcr = getbcr->bcr;
1384 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1386 return -ENOMEM;
1393 info->dcr = getdcr->dcr;
1407 if (!dev->info.dyn_addr)
1408 return -EINVAL;
1410 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1411 dev->info.dyn_addr);
1414 return -EINVAL;
1416 ret = i3c_master_getpid_locked(master, &dev->info);
1420 ret = i3c_master_getbcr_locked(master, &dev->info);
1424 ret = i3c_master_getdcr_locked(master, &dev->info);
1428 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1429 ret = i3c_master_getmxds_locked(master, &dev->info);
1434 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1435 dev->info.max_ibi_len = 1;
1437 i3c_master_getmrl_locked(master, &dev->info);
1438 i3c_master_getmwl_locked(master, &dev->info);
1440 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1441 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1453 if (dev->info.static_addr)
1454 i3c_bus_set_addr_slot_status(&master->bus,
1455 dev->info.static_addr,
1458 if (dev->info.dyn_addr)
1459 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1462 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1463 i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr,
1472 if (!dev->info.static_addr && !dev->info.dyn_addr)
1475 if (dev->info.static_addr) {
1476 status = i3c_bus_get_addr_slot_status(&master->bus,
1477 dev->info.static_addr);
1482 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1483 return -EBUSY;
1485 i3c_bus_set_addr_slot_status(&master->bus,
1486 dev->info.static_addr,
1491 * ->init_dyn_addr should have been reserved before that, so, if we're
1492 * trying to apply a pre-reserved dynamic address, we should not try
1495 if (dev->info.dyn_addr &&
1496 (!dev->boardinfo ||
1497 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1498 status = i3c_bus_get_addr_slot_status(&master->bus,
1499 dev->info.dyn_addr);
1503 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1510 if (dev->info.static_addr)
1511 i3c_bus_set_addr_slot_status(&master->bus,
1512 dev->info.static_addr,
1515 return -EBUSY;
1527 if (!dev->info.static_addr && !dev->info.dyn_addr)
1535 if (master->this != dev && master->ops->attach_i3c_dev) {
1536 ret = master->ops->attach_i3c_dev(dev);
1543 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1554 if (dev->info.dyn_addr != old_dyn_addr) {
1555 i3c_bus_set_addr_slot_status(&master->bus,
1556 dev->info.dyn_addr,
1559 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1563 if (master->ops->reattach_i3c_dev) {
1564 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1579 if (master->this != dev && master->ops->detach_i3c_dev)
1580 master->ops->detach_i3c_dev(dev);
1583 list_del(&dev->common.node);
1591 if (master->ops->attach_i2c_dev) {
1592 ret = master->ops->attach_i2c_dev(dev);
1597 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1606 list_del(&dev->common.node);
1608 if (master->ops->detach_i2c_dev)
1609 master->ops->detach_i2c_dev(dev);
1616 .static_addr = boardinfo->static_addr,
1617 .pid = boardinfo->pid,
1624 return -ENOMEM;
1626 i3cdev->boardinfo = boardinfo;
1632 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1633 i3cdev->boardinfo->init_dyn_addr);
1637 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1649 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1664 if (!master->init_done)
1667 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1668 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1671 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1672 if (!desc->dev)
1675 desc->dev->bus = &master->bus;
1676 desc->dev->desc = desc;
1677 desc->dev->dev.parent = &master->dev;
1678 desc->dev->dev.type = &i3c_device_type;
1679 desc->dev->dev.bus = &i3c_bus_type;
1680 desc->dev->dev.release = i3c_device_release;
1681 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1682 desc->info.pid);
1684 if (desc->boardinfo)
1685 desc->dev->dev.of_node = desc->boardinfo->of_node;
1687 ret = device_register(&desc->dev->dev);
1689 dev_err(&master->dev,
1690 "Failed to add I3C device (err = %d)\n", ret);
1691 put_device(&desc->dev->dev);
1697 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1700 * This function is instantiating an I3C device object and adding it to the
1701 * I3C device list. All device information are automatically retrieved using
1704 * The I3C device object is returned in case the master wants to attach
1715 i3c_bus_maintenance_lock(&master->bus);
1716 ret = master->ops->do_daa(master);
1717 i3c_bus_maintenance_unlock(&master->bus);
1722 i3c_bus_normaluse_lock(&master->bus);
1724 i3c_bus_normaluse_unlock(&master->bus);
1731 * i3c_master_set_info() - set master device information
1733 * @info: I3C device information
1736 * &i3c_master_controller_ops->bus_init().
1741 * - &i3c_device_info->dyn_addr
1742 * - &i3c_device_info->bcr
1743 * - &i3c_device_info->dcr
1744 * - &i3c_device_info->pid
1745 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1746 * &i3c_device_info->bcr
1751 * information can be checked, but we can at least make sure @info->dyn_addr
1752 * and @info->bcr are correct), -EINVAL otherwise.
1760 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1761 return -EINVAL;
1763 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1764 master->secondary)
1765 return -EINVAL;
1767 if (master->this)
1768 return -EINVAL;
1774 master->this = i3cdev;
1775 master->bus.cur_master = master->this;
1795 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1799 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1800 i3c_bus_set_addr_slot_status(&master->bus,
1801 i3cdev->boardinfo->init_dyn_addr,
1807 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1810 i3c_bus_set_addr_slot_status(&master->bus,
1811 i2cdev->addr,
1818 * i3c_master_bus_init() - initialize an I3C bus
1821 * This function is following all initialisation steps described in the I3C
1827 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1837 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1838 * also have static_addr, try to pre-assign dynamic addresses requested by
1839 * the FW with SETDASA and attach corresponding statically defined I3C
1843 * remaining I3C devices
1845 * Once this is done, all I3C and I2C devices should be usable.
1861 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1862 status = i3c_bus_get_addr_slot_status(&master->bus,
1863 i2cboardinfo->base.addr);
1865 ret = -EBUSY;
1869 i3c_bus_set_addr_slot_status(&master->bus,
1870 i2cboardinfo->base.addr,
1874 i2cboardinfo->base.addr,
1875 i2cboardinfo->lvr);
1889 * Now execute the controller specific ->bus_init() routine, which
1892 ret = master->ops->bus_init(master);
1897 * The master device should have been instantiated in ->bus_init(),
1900 if (!master->this) {
1901 dev_err(&master->dev,
1902 "master_set_info() was not called in ->bus_init()\n");
1903 ret = -EINVAL;
1907 if (master->ops->set_speed) {
1908 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
1921 if (master->ops->set_speed) {
1922 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
1935 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1937 * In case pre-assign dynamic address fails, setting dynamic address to
1941 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1947 if (!i3cboardinfo->init_dyn_addr)
1950 ret = i3c_bus_get_addr_slot_status(&master->bus,
1951 i3cboardinfo->init_dyn_addr);
1953 ret = -EBUSY;
1958 i3c_bus_set_addr_slot_status_mask(&master->bus,
1959 i3cboardinfo->init_dyn_addr,
1971 if (i3cboardinfo->static_addr)
1985 if (master->ops->bus_cleanup)
1986 master->ops->bus_cleanup(master);
1996 if (master->ops->bus_cleanup)
1997 master->ops->bus_cleanup(master);
2004 struct i3c_master_controller *master = i3cdev->common.master;
2007 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
2008 if (i3cdev->info.pid != i3cboardinfo->pid)
2011 i3cdev->boardinfo = i3cboardinfo;
2012 i3cdev->info.static_addr = i3cboardinfo->static_addr;
2023 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2024 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
2032 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2034 * @addr: I3C slave dynamic address assigned to the device
2036 * This function is instantiating an I3C device object and adding it to the
2037 * I3C device list. All device information are automatically retrieved using
2040 * The I3C device object is returned in case the master wants to attach
2058 return -EINVAL;
2076 newdev->dev = olddev->dev;
2077 if (newdev->dev)
2078 newdev->dev->desc = newdev;
2086 mutex_lock(&olddev->ibi_lock);
2087 if (olddev->ibi) {
2088 ibireq.handler = olddev->ibi->handler;
2089 ibireq.max_payload_len = olddev->ibi->max_payload_len;
2090 ibireq.num_slots = olddev->ibi->num_slots;
2092 if (olddev->ibi->enabled)
2096 * i3c bus as it does not exist and has been assigned
2098 * So, update the olddev->ibi->enabled flag to false
2101 olddev->ibi->enabled = false;
2104 mutex_unlock(&olddev->ibi_lock);
2106 old_dyn_addr = olddev->info.dyn_addr;
2115 * - if the device already had a dynamic address assigned, let's try to
2116 * re-apply this one
2117 * - if the device did not have a dynamic address and the firmware
2119 * - in any other case, keep the address automatically assigned by the
2122 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2124 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2125 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2127 expected_dyn_addr = newdev->info.dyn_addr;
2129 if (newdev->info.dyn_addr != expected_dyn_addr &&
2130 i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) {
2136 newdev->info.dyn_addr,
2139 old_dyn_addr = newdev->info.dyn_addr;
2140 newdev->info.dyn_addr = expected_dyn_addr;
2143 dev_err(&master->dev,
2145 master->bus.id, newdev->info.pid);
2157 mutex_lock(&newdev->ibi_lock);
2160 dev_err(&master->dev,
2161 "Failed to request IBI on device %d-%llx",
2162 master->bus.id, newdev->info.pid);
2166 dev_err(&master->dev,
2167 "Failed to re-enable IBI on device %d-%llx",
2168 master->bus.id, newdev->info.pid);
2170 mutex_unlock(&newdev->ibi_lock);
2176 if (newdev->dev && newdev->dev->desc)
2177 newdev->dev->desc = NULL;
2195 struct device *dev = &master->dev;
2200 return -ENOMEM;
2202 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2207 * The I3C Specification does not clearly say I2C devices with 10-bit
2211 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2213 return -ENOTSUPP;
2217 boardinfo->lvr = reg[2];
2219 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2230 struct device *dev = &master->dev;
2236 return -ENOMEM;
2240 return -EINVAL;
2242 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2245 return -EINVAL;
2248 boardinfo->static_addr = reg[0];
2250 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2252 return -EINVAL;
2254 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2257 return -EINVAL;
2260 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2262 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2263 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2264 return -EINVAL;
2266 boardinfo->init_dyn_addr = init_dyn_addr;
2267 boardinfo->of_node = of_node_get(node);
2268 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2280 return -EINVAL;
2300 struct device *dev = &master->dev;
2301 struct device_node *i3cbus_np = dev->of_node;
2318 * The user might want to limit I2C and I3C speed in case some devices
2322 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2323 master->bus.scl_rate.i2c = val;
2325 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2326 master->bus.scl_rate.i3c = val;
2340 return -EINVAL;
2342 if (!master->ops->i2c_xfers)
2343 return -ENOTSUPP;
2349 return -ENOTSUPP;
2352 i3c_bus_normaluse_lock(&master->bus);
2355 ret = -ENOENT;
2357 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2358 i3c_bus_normaluse_unlock(&master->bus);
2373 if (client->dev.of_node) {
2376 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2392 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2395 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2397 return -EBUSY;
2399 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2402 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2418 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2429 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2431 return -ENODEV;
2434 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2455 if (dev->type != &i2c_client_type)
2459 adap = client->adapter;
2461 if (adap->algo != &i3c_master_i2c_algo)
2466 i3c_bus_maintenance_lock(&master->bus);
2475 i3c_bus_maintenance_unlock(&master->bus);
2489 int ret, id = -ENODEV;
2491 adap->dev.parent = master->dev.parent;
2492 adap->owner = master->dev.parent->driver->owner;
2493 adap->algo = &i3c_master_i2c_algo;
2494 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2496 /* FIXME: Should we allow i3c masters to override these values? */
2497 adap->timeout = 1000;
2498 adap->retries = 3;
2500 if (master->dev.of_node)
2501 id = of_alias_get_id(master->dev.of_node, "i2c");
2504 adap->nr = id;
2516 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2518 i2cboardinfo->base.addr);
2521 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2531 i2c_del_adapter(&master->i2c);
2533 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2534 i2cdev->dev = NULL;
2541 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2542 if (!i3cdev->dev)
2545 i3cdev->dev->desc = NULL;
2546 if (device_is_registered(&i3cdev->dev->dev))
2547 device_unregister(&i3cdev->dev->dev);
2549 put_device(&i3cdev->dev->dev);
2550 i3cdev->dev = NULL;
2555 * i3c_master_queue_ibi() - Queue an IBI
2564 if (!dev->ibi || !slot)
2567 atomic_inc(&dev->ibi->pending_ibis);
2568 queue_work(dev->ibi->wq, &slot->work);
2576 struct i3c_dev_desc *dev = slot->dev;
2580 payload.data = slot->data;
2581 payload.len = slot->len;
2583 if (dev->dev)
2584 dev->ibi->handler(dev->dev, &payload);
2586 master->ops->recycle_ibi_slot(dev, slot);
2587 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2588 complete(&dev->ibi->all_ibis_handled);
2594 slot->dev = dev;
2595 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2613 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2623 while (!list_empty(&pool->free_slots)) {
2624 slot = list_first_entry(&pool->free_slots,
2626 list_del(&slot->node);
2634 WARN_ON(nslots != pool->num_slots);
2636 kfree(pool->payload_buf);
2637 kfree(pool->slots);
2643 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2662 return ERR_PTR(-ENOMEM);
2664 spin_lock_init(&pool->lock);
2665 INIT_LIST_HEAD(&pool->free_slots);
2666 INIT_LIST_HEAD(&pool->pending);
2668 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2669 if (!pool->slots) {
2670 ret = -ENOMEM;
2674 if (req->max_payload_len) {
2675 pool->payload_buf = kcalloc(req->num_slots,
2676 req->max_payload_len, GFP_KERNEL);
2677 if (!pool->payload_buf) {
2678 ret = -ENOMEM;
2683 for (i = 0; i < req->num_slots; i++) {
2684 slot = &pool->slots[i];
2685 i3c_master_init_ibi_slot(dev, &slot->base);
2687 if (req->max_payload_len)
2688 slot->base.data = pool->payload_buf +
2689 (i * req->max_payload_len);
2691 list_add_tail(&slot->node, &pool->free_slots);
2692 pool->num_slots++;
2704 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2719 spin_lock_irqsave(&pool->lock, flags);
2720 slot = list_first_entry_or_null(&pool->free_slots,
2723 list_del(&slot->node);
2724 spin_unlock_irqrestore(&pool->lock, flags);
2726 return slot ? &slot->base : NULL;
2731 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2736 * master driver struct_master_controller_ops->recycle_ibi() method.
2748 spin_lock_irqsave(&pool->lock, flags);
2749 list_add_tail(&slot->node, &pool->free_slots);
2750 spin_unlock_irqrestore(&pool->lock, flags);
2756 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2757 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2758 return -EINVAL;
2760 if (ops->request_ibi &&
2761 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2762 !ops->recycle_ibi_slot))
2763 return -EINVAL;
2769 * i3c_master_register() - register an I3C master
2771 * @parent: the parent device (the one that provides this I3C master
2775 * -ENOTSUPP if set to true since secondary masters are not yet
2780 * - creates and initializes the I3C bus
2781 * - populates the bus with static I2C devs if @parent->of_node is not
2783 * - registers all I3C devices added by the controller during bus
2785 * - registers the I2C adapter and all I2C devices
2802 return -ENOTSUPP;
2808 master->dev.parent = parent;
2809 master->dev.of_node = of_node_get(parent->of_node);
2810 master->dev.bus = &i3c_bus_type;
2811 master->dev.type = &i3c_masterdev_type;
2812 master->dev.release = i3c_masterdev_release;
2813 master->ops = ops;
2814 master->secondary = secondary;
2815 INIT_LIST_HEAD(&master->boardinfo.i2c);
2816 INIT_LIST_HEAD(&master->boardinfo.i3c);
2818 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2822 device_initialize(&master->dev);
2823 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2825 master->dev.dma_mask = parent->dma_mask;
2826 master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2827 master->dev.dma_parms = parent->dma_parms;
2833 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2834 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2848 ret = -EINVAL;
2852 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2860 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2861 if (!master->wq) {
2862 ret = -ENOMEM;
2870 ret = device_add(&master->dev);
2875 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2884 pm_runtime_no_callbacks(&master->dev);
2885 pm_suspend_ignore_children(&master->dev, true);
2886 pm_runtime_enable(&master->dev);
2890 * register I3C devices discovered during the initial DAA.
2892 master->init_done = true;
2893 i3c_bus_normaluse_lock(&master->bus);
2895 i3c_bus_normaluse_unlock(&master->bus);
2900 device_del(&master->dev);
2906 put_device(&master->dev);
2913 * i3c_master_unregister() - unregister an I3C master
2920 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2925 pm_runtime_disable(&master->dev);
2926 device_unregister(&master->dev);
2935 return -ENOENT;
2939 return -EINVAL;
2941 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2942 !dev->boardinfo->static_addr)
2943 return -EINVAL;
2945 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2946 dev->boardinfo->init_dyn_addr);
2956 return -ENOENT;
2960 return -EINVAL;
2962 if (!master->ops->priv_xfers)
2963 return -ENOTSUPP;
2965 return master->ops->priv_xfers(dev, xfers, nxfers);
2973 if (!dev->ibi)
2974 return -EINVAL;
2977 ret = master->ops->disable_ibi(dev);
2981 reinit_completion(&dev->ibi->all_ibis_handled);
2982 if (atomic_read(&dev->ibi->pending_ibis))
2983 wait_for_completion(&dev->ibi->all_ibis_handled);
2985 dev->ibi->enabled = false;
2995 if (!dev->ibi)
2996 return -EINVAL;
2998 ret = master->ops->enable_ibi(dev);
3000 dev->ibi->enabled = true;
3012 if (!master->ops->request_ibi)
3013 return -ENOTSUPP;
3015 if (dev->ibi)
3016 return -EBUSY;
3020 return -ENOMEM;
3022 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
3023 if (!ibi->wq) {
3025 return -ENOMEM;
3028 atomic_set(&ibi->pending_ibis, 0);
3029 init_completion(&ibi->all_ibis_handled);
3030 ibi->handler = req->handler;
3031 ibi->max_payload_len = req->max_payload_len;
3032 ibi->num_slots = req->num_slots;
3034 dev->ibi = ibi;
3035 ret = master->ops->request_ibi(dev, req);
3038 dev->ibi = NULL;
3048 if (!dev->ibi)
3051 if (WARN_ON(dev->ibi->enabled))
3054 master->ops->free_ibi(dev);
3056 if (dev->ibi->wq) {
3057 destroy_workqueue(dev->ibi->wq);
3058 dev->ibi->wq = NULL;
3061 kfree(dev->ibi);
3062 dev->ibi = NULL;
3069 res = of_alias_get_highest_id("i3c");
3102 MODULE_DESCRIPTION("I3C core");