107 { return !(pmd_val(pmd) & 0xFFFFFFF); }  in srmmu_pmd_none()
121 #define MSI_MBUS_ARBEN	0xe0001008	/* MBus Arbiter Enable register */
126 #define MSI_ASYNC_MODE  0x80000000	/* Operate the MSI asynchronously */
130 	__asm__ __volatile__ ("lda [%0] %1, %%g3\n\t"  in msi_set_sync()
132 			      "sta %%g3, [%0] %1\n\t" : :  in msi_set_sync()
154 		printk(KERN_ERR "Size 0x%x too small for nocache request\n",  in __srmmu_get_nocache()
159 		printk(KERN_ERR "Size 0x%x unaligned in nocache request\n",  in __srmmu_get_nocache()
186 		memset(tmp, 0, size);  in srmmu_get_nocache()
198 		printk("Vaddr %lx is smaller than nocache base 0x%lx\n",  in srmmu_free_nocache()
203 		printk("Vaddr %lx is bigger than nocache end 0x%lx\n",  in srmmu_free_nocache()
208 		printk("Size 0x%x is not a power of 2\n", size);  in srmmu_free_nocache()
212 		printk("Size 0x%x is too small\n", size);  in srmmu_free_nocache()
216 		printk("Vaddr %lx is not aligned to size 0x%x\n", vaddr, size);  in srmmu_free_nocache()
232 	unsigned long total = 0;  in probe_memory()
235 	for (i = 0; sp_banks[i].num_bytes; i++)  in probe_memory()
282 	memset(srmmu_nocache_pool, 0, srmmu_nocache_size);  in srmmu_nocache_init()
290 	memset(__nocache_fix(srmmu_swapper_pg_dir), 0, SRMMU_PGD_TABLE_SIZE);  in srmmu_nocache_init()
326 		pgd_t *init = pgd_offset_k(0);  in get_pgd_fast()
327 		memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));  in get_pgd_fast()
451 	for (ctx = 0; ctx < numctx; ctx++) {  in sparc_context_init()
460 	for (ctx = 0; ctx < numctx; ctx++)  in sparc_context_init()
517 	while (len != 0) {  in srmmu_mapiorange()
547 	while (len != 0) {  in srmmu_unmapiorange()
584 #if 0  /* P3: deadwood to debug precise flushes on Swift. */
597 			__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
606 			__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
690 			memset(__nocache_fix(pmdp), 0, SRMMU_PMD_TABLE_SIZE);  in srmmu_early_allocate_ptable_skeleton()
698 			memset(__nocache_fix(ptep), 0, PTE_SIZE);  in srmmu_early_allocate_ptable_skeleton()
701 		if (start > (0xffffffffUL - PMD_SIZE))  in srmmu_early_allocate_ptable_skeleton()
724 			memset(pmdp, 0, SRMMU_PMD_TABLE_SIZE);  in srmmu_allocate_ptable_skeleton()
733 			memset(ptep, 0, PTE_SIZE);  in srmmu_allocate_ptable_skeleton()
736 		if (start > (0xffffffffUL - PMD_SIZE))  in srmmu_allocate_ptable_skeleton()
750 		__asm__ __volatile__("lda [%1] %2, %0\n\t" :  in srmmu_probe()
752 				     "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));  in srmmu_probe()
774 	int what; /* 0 = normal-pte, 1 = pmd-level pte, 2 = pgd-level pte */  in srmmu_inherit_prom_mappings()
777 		if (start == 0)  in srmmu_inherit_prom_mappings()
779 		if (start == 0xfef00000)  in srmmu_inherit_prom_mappings()
789 		what = 0;  in srmmu_inherit_prom_mappings()
815 			memset(__nocache_fix(pmdp), 0, SRMMU_PMD_TABLE_SIZE);  in srmmu_inherit_prom_mappings()
828 			memset(__nocache_fix(ptep), 0, PTE_SIZE);  in srmmu_inherit_prom_mappings()
876 	if (phys_base > 0) {  in map_kernel()
880 	for (i = 0; sp_banks[i].num_bytes != 0; i++) {  in map_kernel()
907 		num_contexts = 0;  in srmmu_paging_init()
908 		while (cpunode != 0) {  in srmmu_paging_init()
911 				num_contexts = prom_getintdefault(cpunode, "mmu-nctx", 0x8);  in srmmu_paging_init()
923 	pages_avail = 0;  in srmmu_paging_init()
928 	srmmu_inherit_prom_mappings(0xfe400000, (LINUX_OPPROM_ENDVM - PAGE_SIZE));  in srmmu_paging_init()
935 	for (i = 0; i < num_contexts; i++)  in srmmu_paging_init()
968 		unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 };  in srmmu_paging_init()
994 	return 0;  in init_new_context()
1025 	int cpu = 0;  in init_vac_layout()
1026 	unsigned long max_size = 0;  in init_vac_layout()
1027 	unsigned long min_line_size = 0x10000000;  in init_vac_layout()
1031 	while ((nd = prom_getsibling(nd)) != 0) {  in init_vac_layout()
1060 	if (nd == 0) {  in init_vac_layout()
1085 #if 0 /* XXX I think this is bad news... -DaveM */  in poke_hypersparc()
1161 #define SWIFT_MASKID_ADDR  0x10003018
1166 	__asm__ __volatile__("lda [%1] %2, %0\n\t"  in init_swift()
1167 			     "srl %0, 0x18, %0\n\t" :  in init_swift()
1172 	case 0x11:  in init_swift()
1173 	case 0x20:  in init_swift()
1174 	case 0x23:  in init_swift()
1175 	case 0x30:  in init_swift()
1196 	case 0x25:  in init_swift()
1197 	case 0x31:  in init_swift()
1212 	flush_page_for_dma_global = 0;  in init_swift()
1332 	case 0: /* No SE cache */  in poke_turbosparc()
1503 		viking_mxcc_present = 0;  in init_viking()
1517 		flush_page_for_dma_global = 0;  in init_viking()
1542 	hwbug_bitmask = 0;  in get_srmmu_type()
1545 	mod_typ = (mreg & 0xf0000000) >> 28;  in get_srmmu_type()
1546 	mod_rev = (mreg & 0x0f000000) >> 24;  in get_srmmu_type()
1547 	psr_typ = (psr >> 28) & 0xf;  in get_srmmu_type()
1548 	psr_vers = (psr >> 24) & 0xf;  in get_srmmu_type()
1563 		case 0:  in get_srmmu_type()
1582 	if (psr_typ == 0 && psr_vers == 5) {  in get_srmmu_type()
1588 	if (psr_typ == 0 && psr_vers == 4) {  in get_srmmu_type()
1594 		while ((cpunode = prom_getsibling(cpunode)) != 0) {  in get_srmmu_type()
1612 	   ((psr_vers == 0) ||  in get_srmmu_type()
1613 	    ((psr_vers == 1) && (mod_typ == 0) && (mod_rev == 0)))) {  in get_srmmu_type()