Lines Matching +full:psci +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
8 #include <dt-bindings/clock/samsung,exynos990.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <1>;
16 interrupt-parent = <&gic>;
28 arm-a55-pmu {
29 compatible = "arm,cortex-a55-pmu";
35 interrupt-affinity = <&cpu0>,
41 arm-a76-pmu {
42 compatible = "arm,cortex-a76-pmu";
46 interrupt-affinity = <&cpu4>,
50 mongoose-m5-pmu {
51 compatible = "samsung,mongoose-pmu";
55 interrupt-affinity = <&cpu6>,
60 #address-cells = <1>;
61 #size-cells = <0>;
63 cpu-map {
103 cpu0: cpu@0 {
105 compatible = "arm,cortex-a55";
106 reg = <0x0>;
107 enable-method = "psci";
112 compatible = "arm,cortex-a55";
113 reg = <0x1>;
114 enable-method = "psci";
119 compatible = "arm,cortex-a55";
120 reg = <0x2>;
121 enable-method = "psci";
126 compatible = "arm,cortex-a55";
127 reg = <0x3>;
128 enable-method = "psci";
133 compatible = "arm,cortex-a76";
134 reg = <0x4>;
135 enable-method = "psci";
140 compatible = "arm,cortex-a76";
141 reg = <0x5>;
142 enable-method = "psci";
147 compatible = "samsung,mongoose-m5";
148 reg = <0x6>;
149 enable-method = "psci";
154 compatible = "samsung,mongoose-m5";
155 reg = <0x7>;
156 enable-method = "psci";
160 oscclk: clock-osc {
161 compatible = "fixed-clock";
162 #clock-cells = <0>;
163 clock-output-names = "oscclk";
166 psci {
167 compatible = "arm,psci-0.2";
171 soc: soc@0 {
172 compatible = "simple-bus";
173 ranges = <0x0 0x0 0x0 0x20000000>;
175 #address-cells = <1>;
176 #size-cells = <1>;
179 compatible = "samsung,exynos990-chipid",
180 "samsung,exynos850-chipid";
181 reg = <0x10000000 0x100>;
184 gic: interrupt-controller@10101000 {
185 compatible = "arm,gic-400";
186 reg = <0x10101000 0x1000>,
187 <0x10102000 0x1000>,
188 <0x10104000 0x2000>,
189 <0x10106000 0x2000>;
190 #interrupt-cells = <3>;
191 interrupt-controller;
194 #address-cells = <0>;
195 #size-cells = <1>;
199 compatible = "samsung,exynos990-pinctrl";
200 reg = <0x10430000 0x1000>;
205 compatible = "samsung,exynos990-pinctrl";
206 reg = <0x10730000 0x1000>;
210 cmu_hsi0: clock-controller@10a00000 {
211 compatible = "samsung,exynos990-cmu-hsi0";
212 reg = <0x10a00000 0x8000>;
213 #clock-cells = <1>;
220 clock-names = "oscclk",
228 compatible = "samsung,exynos990-pinctrl";
229 reg = <0x13040000 0x1000>;
234 compatible = "samsung,exynos990-pinctrl";
235 reg = <0x13c30000 0x1000>;
240 compatible = "samsung,exynos990-pinctrl";
241 reg = <0x15580000 0x1000>;
245 compatible = "samsung,exynos990-pinctrl";
246 reg = <0x15850000 0x1000>;
248 wakeup-interrupt-controller {
249 compatible = "samsung,exynos990-wakeup-eint",
250 "samsung,exynos850-wakeup-eint",
251 "samsung,exynos7-wakeup-eint";
255 pmu_system_controller: system-controller@15860000 {
256 compatible = "samsung,exynos990-pmu",
257 "samsung,exynos7-pmu", "syscon";
258 reg = <0x15860000 0x10000>;
260 reboot: syscon-reboot {
261 compatible = "syscon-reboot";
263 offset = <0x3a00>; /* SWRESET */
264 mask = <0x2>; /* SWRESET_TRIGGER */
265 value = <0x2>;
270 compatible = "samsung,exynos990-pinctrl";
271 reg = <0x15c30000 0x1000>;
274 cmu_top: clock-controller@1a330000 {
275 compatible = "samsung,exynos990-cmu-top";
276 reg = <0x1a330000 0x8000>;
277 #clock-cells = <1>;
280 clock-names = "oscclk";
285 compatible = "arm,armv8-timer";
292 * Non-updatable, broken stock Samsung bootloader does not
295 clock-frequency = <26000000>;
299 #include "exynos990-pinctrl.dtsi"