Lines Matching +full:gcc +full:- +full:sc7180

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <[email protected]>
19 - qcom,sar2130p-qmp-usb3-dp-phy
20 - qcom,sc7180-qmp-usb3-dp-phy
21 - qcom,sc7280-qmp-usb3-dp-phy
22 - qcom,sc8180x-qmp-usb3-dp-phy
23 - qcom,sc8280xp-qmp-usb43dp-phy
24 - qcom,sdm845-qmp-usb3-dp-phy
25 - qcom,sm6350-qmp-usb3-dp-phy
26 - qcom,sm8150-qmp-usb3-dp-phy
27 - qcom,sm8250-qmp-usb3-dp-phy
28 - qcom,sm8350-qmp-usb3-dp-phy
29 - qcom,sm8450-qmp-usb3-dp-phy
30 - qcom,sm8550-qmp-usb3-dp-phy
31 - qcom,sm8650-qmp-usb3-dp-phy
32 - qcom,x1e80100-qmp-usb3-dp-phy
41 clock-names:
44 - const: aux
45 - const: ref
46 - const: com_aux
47 - const: usb3_pipe
48 - const: cfg_ahb
50 power-domains:
56 reset-names:
58 - const: phy
59 - const: common
61 vdda-phy-supply: true
63 vdda-pll-supply: true
65 "#clock-cells":
68 See include/dt-bindings/phy/phy-qcom-qmp.h
70 "#phy-cells":
73 See include/dt-bindings/phy/phy-qcom-qmp.h
75 orientation-switch:
77 Flag the PHY as possible handler of USB Type-C orientation switching
96 - compatible
97 - reg
98 - clocks
99 - clock-names
100 - resets
101 - reset-names
102 - vdda-phy-supply
103 - vdda-pll-supply
104 - "#clock-cells"
105 - "#phy-cells"
108 - if:
112 - qcom,sc7180-qmp-usb3-dp-phy
113 - qcom,sdm845-qmp-usb3-dp-phy
118 clock-names:
124 clock-names:
127 - if:
131 - qcom,sar2130p-qmp-usb3-dp-phy
132 - qcom,sc8280xp-qmp-usb43dp-phy
133 - qcom,sm6350-qmp-usb3-dp-phy
134 - qcom,sm8550-qmp-usb3-dp-phy
135 - qcom,sm8650-qmp-usb3-dp-phy
136 - qcom,x1e80100-qmp-usb3-dp-phy
139 - power-domains
142 power-domains: false
147 - |
148 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
151 compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
154 clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
155 <&gcc GCC_USB4_EUD_CLKREF_CLK>,
156 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
157 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
158 clock-names = "aux", "ref", "com_aux", "usb3_pipe";
160 power-domains = <&gcc USB30_PRIM_GDSC>;
162 resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
163 <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
164 reset-names = "phy", "common";
166 vdda-phy-supply = <&vreg_l9d>;
167 vdda-pll-supply = <&vreg_l4d>;
169 orientation-switch;
171 #clock-cells = <1>;
172 #phy-cells = <1>;
175 #address-cells = <1>;
176 #size-cells = <0>;
182 remote-endpoint = <&typec_connector_ss>;
190 remote-endpoint = <&dwc3_ss_out>;
198 remote-endpoint = <&mdss_dp_out>;