Lines Matching +full:coexist +full:- +full:gpio +full:- +full:pin
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff Johnson <[email protected]>
18 - qcom,ath10k # SDIO-based devices
19 - qcom,ipq4019-wifi
20 - qcom,wcn3990-wifi # SNoC-based devices
25 reg-names:
27 - const: membase
33 interrupt-names:
37 memory-region:
40 Reference to the MSA memory region used by the Wi-Fi firmware
51 clock-names:
58 reset-names:
60 - const: wifi_cpu_init
61 - const: wifi_radio_srif
62 - const: wifi_radio_warm
63 - const: wifi_radio_cold
64 - const: wifi_core_warm
65 - const: wifi_core_cold
67 ext-fem-name:
71 - microsemi-lx5586
72 - sky85703-11
73 - sky85803
75 firmware-name:
81 wifi-firmware:
85 The ath10k Wi-Fi node can contain one optional firmware subnode.
91 - iommus
93 ieee80211-freq-limit: true
95 qcom,ath10k-calibration-data:
96 $ref: /schemas/types.yaml#/definitions/uint8-array
98 Calibration data + board-specific data as a byte array. The length
101 qcom,ath10k-calibration-variant:
104 Unique variant identifier of the calibration data in board-2.bin
107 qcom,ath10k-pre-calibration-data:
108 $ref: /schemas/types.yaml#/definitions/uint8-array
110 Pre-calibration data as a byte array. The length can vary between
113 qcom,coexist-support:
119 qcom,coexist-gpio-pin:
122 COEX GPIO number provided to the Wi-Fi firmware.
124 qcom,msa-fixed-perm:
130 qcom,no-msa-ready-indicator:
135 qcom,smem-states:
136 $ref: /schemas/types.yaml#/definitions/phandle-array
139 - description: Signal bits used to enable/disable low power mode
142 qcom,smem-state-names:
145 - const: wlan-smp2p-out
147 qcom,snoc-host-cap-8bit-quirk:
153 qcom,xo-cal-data:
158 vdd-0.8-cx-mx-supply:
161 vdd-1.8-xo-supply:
164 vdd-1.3-rfa-supply:
167 vdd-3.3-ch0-supply:
168 description: Primary Wi-Fi antenna supply
170 vdd-3.3-ch1-supply:
171 description: Secondary Wi-Fi antenna supply
174 - compatible
175 - reg
180 - $ref: ieee80211.yaml#
181 - if:
186 - qcom,ipq4019-wifi
193 interrupt-names:
195 - const: msi0
196 - const: msi1
197 - const: msi2
198 - const: msi3
199 - const: msi4
200 - const: msi5
201 - const: msi6
202 - const: msi7
203 - const: msi8
204 - const: msi9
205 - const: msi10
206 - const: msi11
207 - const: msi12
208 - const: msi13
209 - const: msi14
210 - const: msi15
211 - const: legacy
215 - description: Wi-Fi command clock
216 - description: Wi-Fi reference clock
217 - description: Wi-Fi RTC clock
219 clock-names:
221 - const: wifi_wcss_cmd
222 - const: wifi_wcss_ref
223 - const: wifi_wcss_rtc
226 - clocks
227 - clock-names
228 - interrupts
229 - interrupt-names
230 - resets
231 - reset-names
233 - if:
238 - qcom,wcn3990-wifi
245 - description: XO reference clock
246 - description: Qualcomm Debug Subsystem clock
248 clock-names:
251 - const: cxo_ref_clk_pin
252 - const: qdss
256 - description: CE0
257 - description: CE1
258 - description: CE2
259 - description: CE3
260 - description: CE4
261 - description: CE5
262 - description: CE6
263 - description: CE7
264 - description: CE8
265 - description: CE9
266 - description: CE10
267 - description: CE11
269 interrupt-names: false
272 - interrupts
276 - |
277 #include <dt-bindings/clock/qcom,rpmcc.h>
278 #include <dt-bindings/interrupt-controller/arm-gic.h>
281 compatible = "qcom,wcn3990-wifi";
283 reg-names = "membase";
284 memory-region = <&wlan_msa_mem>;
286 clock-names = "cxo_ref_clk_pin";
301 qcom,snoc-host-cap-8bit-quirk;
302 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
303 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
304 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
305 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
306 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
308 wifi-firmware {
314 - |
315 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
318 compatible = "qcom,ipq4019-wifi";
326 reset-names = "wifi_cpu_init",
335 clock-names = "wifi_wcss_cmd",
355 interrupt-names = "msi0",
372 ieee80211-freq-limit = <5470000 5875000>;