History log of /XiangShan/src/main/scala/xiangshan/cache/dcache/meta/LegacyMetaArray.scala (Results 1 – 8 of 8)
Revision Date Author Comments
# 11269ca7 09-Mar-2025 Tang Haojin <[email protected]>

chore: fix several deprecation warning (#4352)


# 8b33cd30 13-Dec-2024 klin02 <[email protected]>

feat(XSLog): move all XSLog outside WhenContext for collection

As data in WhenContext is not acessible in another module. To support
XSLog collection, we move all XSLog and related signal outside
Wh

feat(XSLog): move all XSLog outside WhenContext for collection

As data in WhenContext is not acessible in another module. To support
XSLog collection, we move all XSLog and related signal outside
WhenContext. For example, when(cond1){XSDebug(cond2, pable)} to
XSDebug(cond1 && cond2, pable)

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# e3da8bad 22-Jul-2024 Tang Haojin <[email protected]>

build: purge chisel 3 and add deprecation check (#3250)


# bb2f3f51 12-Jul-2024 Tang Haojin <[email protected]>

perf: use perfUtils in `Utility` (#3190)

Currently, log and perf utilities such as `XSPerfAccumulate` are
implemented in many repositories like XiangShan, CoupledL2 and HuanCun.
This PR unifies th

perf: use perfUtils in `Utility` (#3190)

Currently, log and perf utilities such as `XSPerfAccumulate` are
implemented in many repositories like XiangShan, CoupledL2 and HuanCun.
This PR unifies them and put them in Utility repository.

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# 0184a80e 15-Jun-2024 Yanqin Li <[email protected]>

L1CacheErrorInfo: code refactor for correct and convenient clockgate (#3044)


# 8891a219 08-Oct-2023 Yinan Xu <[email protected]>

Bump rocket-chip (#2353)


# 935edac4 21-Sep-2023 Tang Haojin <[email protected]>

chore: remove deprecated brackets, APIs, etc. (#2321)


# 3af6aa6e 22-Oct-2022 William Wang <[email protected]>

dcache: add optional meta prefetch and access bit

Added meta_prefetch and meta_access related sim perf counter

For now, optional dcache meta prefetch and access can be removed safely