History log of /XiangShan/src/main/scala/xiangshan/backend/fu/wrapper/VIAluFix.scala (Results 1 – 25 of 28)
Revision Date Author Comments
# 785e3bfd 03-Oct-2024 Xuan Hu <[email protected]>

fix(fof): always use tail undisturbed when vl updated by un-raised exception.


# bb2f3f51 12-Jul-2024 Tang Haojin <[email protected]>

perf: use perfUtils in `Utility` (#3190)

Currently, log and perf utilities such as `XSPerfAccumulate` are
implemented in many repositories like XiangShan, CoupledL2 and HuanCun.
This PR unifies th

perf: use perfUtils in `Utility` (#3190)

Currently, log and perf utilities such as `XSPerfAccumulate` are
implemented in many repositories like XiangShan, CoupledL2 and HuanCun.
This PR unifies them and put them in Utility repository.

show more ...


# e03e0c5b 20-Jun-2024 Ziyue Zhang <[email protected]>

rv64v: fix the wrong dependency caused by uop split


# 2d12882c 09-Jun-2024 xiaofeibao <[email protected]>

FuConfig: split dataBits into destDataBits and srcDataBits for distinguish input and output data width


# fcd66f18 27-May-2024 Zhaoyang You <[email protected]>

fix Zvbb and vmask bug (#3009)

1. vmask: use old vd when vl = 0 for vmsbf, vmsif and vmsof
2. Zvbb:
1. fix wrong result location for vclz and vctz
2. fix input and output for

fix Zvbb and vmask bug (#3009)

1. vmask: use old vd when vl = 0 for vmsbf, vmsif and vmsof
2. Zvbb:
1. fix wrong result location for vclz and vctz
2. fix input and output for vwsll
3. Util: Concatenate the input and 1 as the new input in priorityEncode to solve the input is all 0

show more ...


# 34588aeb 18-Apr-2024 lewislzh <[email protected]>

Exu,FuncUnit,Vialufix: Add parameterized delay for fixtiming


# 81cbff07 17-Apr-2024 chengguanghui <[email protected]>

FU: fix mgu for body elements's agnostic

* Modify the signal names about divided vector elements to be consistent with RVV Spec.


# e8e02b74 19-Feb-2024 sinceforYy <[email protected]>

rv64v: add fire sign as enable of RegNext


# 7ee6b881 07-Jan-2024 Ziyue Zhang <[email protected]>

rv64v: change vta to always set for mask instructions


# 904d2184 29-Dec-2023 Ziyue Zhang <[email protected]>

rv64v: fix vxsat and vd compute for fixed-point instruction


# 0895fee6 26-Dec-2023 Ziyue Zhang <[email protected]>

rv64v: fix tail compute for vmask instruction


# daae8f22 25-Dec-2023 Ziyue Zhang <[email protected]>

rv64v: fix vector move instruction


# 7c67decc 08-Dec-2023 Ziyue Zhang <[email protected]>

rv64v: fix vmv.s.x instruction


# b1712600 05-Dec-2023 Ziyue Zhang <[email protected]>

rv64v: support copy data directly use i2v
* also fix some bugs for vwadd.w and vrgather.vi


# 92c6b7ed 08-Nov-2023 zhanglinjuan <[email protected]>

Mgu: use sew as element width instead of eew for indexed loads/stores


# c33d4a9e 16-Oct-2023 Xuan Hu <[email protected]>

vector: convert mgu's assertion to EX_II


# 83ba63b3 11-Oct-2023 Xuan Hu <[email protected]>

fix merge error


# 8f7a869b 21-Sep-2023 Ziyue Zhang <[email protected]>

vector: update interface connection for vialu


# b3e2881c 04-Sep-2023 xiaofeibao-xjtu <[email protected]>

assert: mgu's vl must <= vlmax


# 30fcc710 31-Aug-2023 Ziyue Zhang <[email protected]>

rv64v: fix vmask instructions' tail elements
*pass: vmand.mm, vmnand.mm, vmandn.mm, vmxor.mm, vmor.mm, vmnor.mm, vmorn.mm, vmxnor.mm


# 1a6cfb3d 26-Jun-2023 xgkiri <[email protected]>

fix: use mask to generate the vxsat


# cdf8c16c 26-Jun-2023 xgkiri <[email protected]>

modify the fix-point vector alu wrapper and mgu


# 2569173e 26-May-2023 Xuan Hu <[email protected]>

vector: update vialufix wrapper


# 9eaaa75d 21-May-2023 Xuan Hu <[email protected]>

vector: update decoder


# 39c388b5 20-May-2023 Xuan Hu <[email protected]>

vector: add mask dst data path


12