vtype: add illegal check when modified reserved bits of vtype (#3170)

VsetModule: fix vlIsVlmax, checking tail should use max(VLMAX, VLEN/SEW) (#3135)

rv64v: fix vwsll's imm read and illegal vsew check (#3131)

rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the ol

rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the old value
3. when vl = vlmax, we can set srctype to imm when vta is not se

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Backend: fix avl of vsetivli

* avl of vsetivli should be vl encoded in instruction, regardless of the value imm vl.

fix merge error

backend: refactor vset and add rab support

backend,vector: rewrite vset uop and base module

* Add unit-test for vset base module

add vset support

Co-authored-by: zhanglyGit <[email protected]>
Co-authored-by: Xuan Hu <[email protected]>

v2backend: huge tmp commit

refactor(Alu): split Vset from Alu (#1906)