1/dts-v1/; 2 3/ { 4 #address-cells = <0x1>; 5 #size-cells = <0x1>; 6 compatible = "xlnx,zynq-7000"; 7 interrupt-parent = <0x1>; 8 model = "Xilinx Zynq ZED"; 9 10 cpus { 11 #address-cells = <0x1>; 12 #size-cells = <0x0>; 13 14 cpu@0 { 15 compatible = "arm,cortex-a9"; 16 device_type = "cpu"; 17 reg = <0x0>; 18 clocks = <0x2 0x3>; 19 clock-latency = <0x3e8>; 20 cpu0-supply = <0x3>; 21 operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>; 22 }; 23 24 cpu@1 { 25 compatible = "arm,cortex-a9"; 26 device_type = "cpu"; 27 reg = <0x1>; 28 clocks = <0x2 0x3>; 29 }; 30 }; 31 32 fpga-full { 33 compatible = "fpga-region"; 34 fpga-mgr = <0x4>; 35 #address-cells = <0x1>; 36 #size-cells = <0x1>; 37 ranges; 38 }; 39 40 pmu@f8891000 { 41 compatible = "arm,cortex-a9-pmu"; 42 interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>; 43 interrupt-parent = <0x1>; 44 reg = <0xf8891000 0x1000 0xf8893000 0x1000>; 45 }; 46 47 fixedregulator { 48 compatible = "regulator-fixed"; 49 regulator-name = "VCCPINT"; 50 regulator-min-microvolt = <0xf4240>; 51 regulator-max-microvolt = <0xf4240>; 52 regulator-boot-on; 53 regulator-always-on; 54 linux,phandle = <0x3>; 55 phandle = <0x3>; 56 }; 57 58 amba { 59 u-boot,dm-pre-reloc; 60 compatible = "simple-bus"; 61 #address-cells = <0x1>; 62 #size-cells = <0x1>; 63 interrupt-parent = <0x1>; 64 ranges; 65 66 adc@f8007100 { 67 compatible = "xlnx,zynq-xadc-1.00.a"; 68 reg = <0xf8007100 0x20>; 69 interrupts = <0x0 0x7 0x4>; 70 interrupt-parent = <0x1>; 71 clocks = <0x2 0xc>; 72 }; 73 74 can@e0008000 { 75 compatible = "xlnx,zynq-can-1.0"; 76 status = "disabled"; 77 clocks = <0x2 0x13 0x2 0x24>; 78 clock-names = "can_clk", "pclk"; 79 reg = <0xe0008000 0x1000>; 80 interrupts = <0x0 0x1c 0x4>; 81 interrupt-parent = <0x1>; 82 tx-fifo-depth = <0x40>; 83 rx-fifo-depth = <0x40>; 84 }; 85 86 can@e0009000 { 87 compatible = "xlnx,zynq-can-1.0"; 88 status = "disabled"; 89 clocks = <0x2 0x14 0x2 0x25>; 90 clock-names = "can_clk", "pclk"; 91 reg = <0xe0009000 0x1000>; 92 interrupts = <0x0 0x33 0x4>; 93 interrupt-parent = <0x1>; 94 tx-fifo-depth = <0x40>; 95 rx-fifo-depth = <0x40>; 96 }; 97 98 gpio@e000a000 { 99 compatible = "xlnx,zynq-gpio-1.0"; 100 #gpio-cells = <0x2>; 101 clocks = <0x2 0x2a>; 102 gpio-controller; 103 interrupt-controller; 104 #interrupt-cells = <0x2>; 105 interrupt-parent = <0x1>; 106 interrupts = <0x0 0x14 0x4>; 107 reg = <0xe000a000 0x1000>; 108 linux,phandle = <0x6>; 109 phandle = <0x6>; 110 }; 111 112 i2c@e0004000 { 113 compatible = "cdns,i2c-r1p10"; 114 status = "disabled"; 115 clocks = <0x2 0x26>; 116 interrupt-parent = <0x1>; 117 interrupts = <0x0 0x19 0x4>; 118 reg = <0xe0004000 0x1000>; 119 #address-cells = <0x1>; 120 #size-cells = <0x0>; 121 }; 122 123 i2c@e0005000 { 124 compatible = "cdns,i2c-r1p10"; 125 status = "disabled"; 126 clocks = <0x2 0x27>; 127 interrupt-parent = <0x1>; 128 interrupts = <0x0 0x30 0x4>; 129 reg = <0xe0005000 0x1000>; 130 #address-cells = <0x1>; 131 #size-cells = <0x0>; 132 }; 133 134 interrupt-controller@f8f01000 { 135 compatible = "arm,cortex-a9-gic"; 136 #interrupt-cells = <0x3>; 137 interrupt-controller; 138 reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; 139 linux,phandle = <0x1>; 140 phandle = <0x1>; 141 }; 142 143 cache-controller@f8f02000 { 144 compatible = "arm,pl310-cache"; 145 reg = <0xf8f02000 0x1000>; 146 interrupts = <0x0 0x2 0x4>; 147 arm,data-latency = <0x3 0x2 0x2>; 148 arm,tag-latency = <0x2 0x2 0x2>; 149 cache-unified; 150 cache-level = <0x2>; 151 }; 152 153 memory-controller@f8006000 { 154 compatible = "xlnx,zynq-ddrc-a05"; 155 reg = <0xf8006000 0x1000>; 156 }; 157 158 ocmc@f800c000 { 159 compatible = "xlnx,zynq-ocmc-1.0"; 160 interrupt-parent = <0x1>; 161 interrupts = <0x0 0x3 0x4>; 162 reg = <0xf800c000 0x1000>; 163 }; 164 165 serial@e0000000 { 166 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 167 status = "disabled"; 168 clocks = <0x2 0x17 0x2 0x28>; 169 clock-names = "uart_clk", "pclk"; 170 reg = <0xe0000000 0x1000>; 171 interrupts = <0x0 0x1b 0x4>; 172 }; 173 174 serial@e0001000 { 175 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 176 status = "okay"; 177 clocks = <0x2 0x18 0x2 0x29>; 178 clock-names = "uart_clk", "pclk"; 179 reg = <0xe0001000 0x1000>; 180 interrupts = <0x0 0x32 0x4>; 181 }; 182 183 spi@e0006000 { 184 compatible = "xlnx,zynq-spi-r1p6"; 185 reg = <0xe0006000 0x1000>; 186 status = "okay"; 187 interrupt-parent = <0x1>; 188 interrupts = <0x0 0x1a 0x4>; 189 clocks = <0x2 0x19 0x2 0x22>; 190 clock-names = "ref_clk", "pclk"; 191 #address-cells = <0x1>; 192 #size-cells = <0x0>; 193 194 ad9361-phy@0 { 195 compatible = "adi,ad9361"; 196 reg = <0x0>; 197 spi-cpha; 198 spi-max-frequency = <0x989680>; 199 clocks = <0x5 0x0>; 200 clock-names = "ad9361_ext_refclk"; 201 clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; 202 #clock-cells = <0x1>; 203 adi,digital-interface-tune-skip-mode = <0x0>; 204 adi,pp-tx-swap-enable; 205 adi,pp-rx-swap-enable; 206 adi,rx-frame-pulse-mode-enable; 207 adi,lvds-mode-enable; 208 adi,lvds-bias-mV = <0x96>; 209 adi,lvds-rx-onchip-termination-enable; 210 adi,rx-data-delay = <0x4>; 211 adi,tx-fb-clock-delay = <0x7>; 212 adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>; 213 adi,2rx-2tx-mode-enable; 214 adi,frequency-division-duplex-mode-enable; 215 adi,rx-rf-port-input-select = <0x0>; 216 adi,tx-rf-port-input-select = <0x0>; 217 adi,tx-attenuation-mdB = <0x2710>; 218 adi,tx-lo-powerdown-managed-enable; 219 adi,rf-rx-bandwidth-hz = <0x112a880>; 220 adi,rf-tx-bandwidth-hz = <0x112a880>; 221 adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; 222 adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>; 223 adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 224 adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 225 adi,gc-rx1-mode = <0x2>; 226 adi,gc-rx2-mode = <0x2>; 227 adi,gc-adc-ovr-sample-size = <0x4>; 228 adi,gc-adc-small-overload-thresh = <0x2f>; 229 adi,gc-adc-large-overload-thresh = <0x3a>; 230 adi,gc-lmt-overload-high-thresh = <0x320>; 231 adi,gc-lmt-overload-low-thresh = <0x2c0>; 232 adi,gc-dec-pow-measurement-duration = <0x2000>; 233 adi,gc-low-power-thresh = <0x18>; 234 adi,mgc-inc-gain-step = <0x2>; 235 adi,mgc-dec-gain-step = <0x2>; 236 adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>; 237 adi,agc-attack-delay-extra-margin-us = <0x1>; 238 adi,agc-outer-thresh-high = <0x5>; 239 adi,agc-outer-thresh-high-dec-steps = <0x2>; 240 adi,agc-inner-thresh-high = <0xa>; 241 adi,agc-inner-thresh-high-dec-steps = <0x1>; 242 adi,agc-inner-thresh-low = <0xc>; 243 adi,agc-inner-thresh-low-inc-steps = <0x1>; 244 adi,agc-outer-thresh-low = <0x12>; 245 adi,agc-outer-thresh-low-inc-steps = <0x2>; 246 adi,agc-adc-small-overload-exceed-counter = <0xa>; 247 adi,agc-adc-large-overload-exceed-counter = <0xa>; 248 adi,agc-adc-large-overload-inc-steps = <0x2>; 249 adi,agc-lmt-overload-large-exceed-counter = <0xa>; 250 adi,agc-lmt-overload-small-exceed-counter = <0xa>; 251 adi,agc-lmt-overload-large-inc-steps = <0x2>; 252 adi,agc-gain-update-interval-us = <0x3e8>; 253 adi,fagc-dec-pow-measurement-duration = <0x40>; 254 adi,fagc-lp-thresh-increment-steps = <0x1>; 255 adi,fagc-lp-thresh-increment-time = <0x5>; 256 adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>; 257 adi,fagc-final-overrange-count = <0x3>; 258 adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>; 259 adi,fagc-lmt-final-settling-steps = <0x1>; 260 adi,fagc-lock-level = <0xa>; 261 adi,fagc-lock-level-gain-increase-upper-limit = <0x5>; 262 adi,fagc-lock-level-lmt-gain-increase-enable; 263 adi,fagc-lpf-final-settling-steps = <0x1>; 264 adi,fagc-optimized-gain-offset = <0x5>; 265 adi,fagc-power-measurement-duration-in-state5 = <0x40>; 266 adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable; 267 adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>; 268 adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable; 269 adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>; 270 adi,fagc-rst-gla-large-adc-overload-enable; 271 adi,fagc-rst-gla-large-lmt-overload-enable; 272 adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>; 273 adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable; 274 adi,fagc-state-wait-time-ns = <0x104>; 275 adi,fagc-use-last-lock-level-for-set-gain-enable; 276 adi,rssi-restart-mode = <0x3>; 277 adi,rssi-delay = <0x1>; 278 adi,rssi-wait = <0x1>; 279 adi,rssi-duration = <0x3e8>; 280 adi,ctrl-outs-index = <0x0>; 281 adi,ctrl-outs-enable-mask = <0xff>; 282 adi,temp-sense-measurement-interval-ms = <0x3e8>; 283 adi,temp-sense-offset-signed = <0xce>; 284 adi,temp-sense-periodic-measurement-enable; 285 adi,aux-dac-manual-mode-enable; 286 adi,aux-dac1-default-value-mV = <0x0>; 287 adi,aux-dac1-rx-delay-us = <0x0>; 288 adi,aux-dac1-tx-delay-us = <0x0>; 289 adi,aux-dac2-default-value-mV = <0x0>; 290 adi,aux-dac2-rx-delay-us = <0x0>; 291 adi,aux-dac2-tx-delay-us = <0x0>; 292 en_agc-gpios = <0x6 0x62 0x0>; 293 sync-gpios = <0x6 0x63 0x0>; 294 reset-gpios = <0x6 0x64 0x0>; 295 enable-gpios = <0x6 0x65 0x0>; 296 txnrx-gpios = <0x6 0x66 0x0>; 297 linux,phandle = <0x11>; 298 phandle = <0x11>; 299 }; 300 }; 301 302 spi@e0007000 { 303 compatible = "xlnx,zynq-spi-r1p6"; 304 reg = <0xe0007000 0x1000>; 305 status = "okay"; 306 interrupt-parent = <0x1>; 307 interrupts = <0x0 0x31 0x4>; 308 clocks = <0x2 0x1a 0x2 0x23>; 309 clock-names = "ref_clk", "pclk"; 310 #address-cells = <0x1>; 311 #size-cells = <0x0>; 312 313 adf4351-udc-tx-pmod@0 { 314 compatible = "adi,adf4351"; 315 reg = <0x0>; 316 spi-max-frequency = <0x989680>; 317 clocks = <0x7>; 318 clock-names = "clkin"; 319 adi,channel-spacing = <0xf4240>; 320 adi,power-up-frequency = <0x160dc080>; 321 adi,phase-detector-polarity-positive-enable; 322 adi,charge-pump-current = <0x9c4>; 323 adi,output-power = <0x3>; 324 adi,mute-till-lock-enable; 325 adi,muxout-select = <0x6>; 326 gpios = <0x6 0x68 0x0>; 327 }; 328 329 adf4351-udc-rx-pmod@1 { 330 compatible = "adi,adf4351"; 331 reg = <0x1>; 332 spi-max-frequency = <0x989680>; 333 clocks = <0x7>; 334 clock-names = "clkin"; 335 adi,channel-spacing = <0xf4240>; 336 adi,power-up-frequency = <0x1443fd00>; 337 adi,phase-detector-polarity-positive-enable; 338 adi,charge-pump-current = <0x9c4>; 339 adi,output-power = <0x3>; 340 adi,mute-till-lock-enable; 341 adi,muxout-select = <0x6>; 342 gpios = <0x6 0x67 0x0>; 343 }; 344 }; 345 346 spi@e000d000 { 347 clock-names = "ref_clk", "pclk"; 348 clocks = <0x2 0xa 0x2 0x2b>; 349 compatible = "xlnx,zynq-qspi-1.0"; 350 status = "okay"; 351 interrupt-parent = <0x1>; 352 interrupts = <0x0 0x13 0x4>; 353 reg = <0xe000d000 0x1000>; 354 #address-cells = <0x1>; 355 #size-cells = <0x0>; 356 is-dual = <0x0>; 357 num-cs = <0x1>; 358 359 ps7-qspi@0 { 360 #address-cells = <0x1>; 361 #size-cells = <0x1>; 362 compatible = "n25q128a11"; 363 reg = <0x0>; 364 spi-max-frequency = <0x2faf080>; 365 366 partition@0 { 367 label = "boot"; 368 reg = <0x0 0x500000>; 369 }; 370 371 partition@500000 { 372 label = "bootenv"; 373 reg = <0x500000 0x20000>; 374 }; 375 376 partition@520000 { 377 label = "config"; 378 reg = <0x520000 0x20000>; 379 }; 380 381 partition@540000 { 382 label = "image"; 383 reg = <0x540000 0xa80000>; 384 }; 385 386 partition@fc0000 { 387 label = "spare"; 388 reg = <0xfc0000 0x0>; 389 }; 390 }; 391 }; 392 393 memory-controller@e000e000 { 394 #address-cells = <0x1>; 395 #size-cells = <0x1>; 396 status = "disabled"; 397 clock-names = "memclk", "aclk"; 398 clocks = <0x2 0xb 0x2 0x2c>; 399 compatible = "arm,pl353-smc-r2p1"; 400 interrupt-parent = <0x1>; 401 interrupts = <0x0 0x12 0x4>; 402 ranges; 403 reg = <0xe000e000 0x1000>; 404 405 flash@e1000000 { 406 status = "disabled"; 407 compatible = "arm,pl353-nand-r2p1"; 408 reg = <0xe1000000 0x1000000>; 409 #address-cells = <0x1>; 410 #size-cells = <0x1>; 411 }; 412 413 flash@e2000000 { 414 status = "disabled"; 415 compatible = "cfi-flash"; 416 reg = <0xe2000000 0x2000000>; 417 #address-cells = <0x1>; 418 #size-cells = <0x1>; 419 }; 420 }; 421 422 ethernet@e000b000 { 423 compatible = "cdns,zynq-gem", "cdns,gem"; 424 reg = <0xe000b000 0x1000>; 425 status = "okay"; 426 interrupts = <0x0 0x16 0x4>; 427 clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>; 428 clock-names = "pclk", "hclk", "tx_clk"; 429 #address-cells = <0x1>; 430 #size-cells = <0x0>; 431 phy-handle = <0x8>; 432 phy-mode = "rgmii-id"; 433 434 phy@0 { 435 device_type = "ethernet-phy"; 436 reg = <0x0>; 437 marvell,reg-init = <0x3 0x10 0xff00 0x1e 0x3 0x11 0xfff0 0xa>; 438 linux,phandle = <0x8>; 439 phandle = <0x8>; 440 }; 441 }; 442 443 ethernet@e000c000 { 444 compatible = "cdns,zynq-gem", "cdns,gem"; 445 reg = <0xe000c000 0x1000>; 446 status = "disabled"; 447 interrupts = <0x0 0x2d 0x4>; 448 clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>; 449 clock-names = "pclk", "hclk", "tx_clk"; 450 #address-cells = <0x1>; 451 #size-cells = <0x0>; 452 }; 453 454 mmc@e0100000 { 455 compatible = "arasan,sdhci-8.9a"; 456 status = "okay"; 457 clock-names = "clk_xin", "clk_ahb"; 458 clocks = <0x2 0x15 0x2 0x20>; 459 interrupt-parent = <0x1>; 460 interrupts = <0x0 0x18 0x4>; 461 reg = <0xe0100000 0x1000>; 462 }; 463 464 mmc@e0101000 { 465 compatible = "arasan,sdhci-8.9a"; 466 status = "disabled"; 467 clock-names = "clk_xin", "clk_ahb"; 468 clocks = <0x2 0x16 0x2 0x21>; 469 interrupt-parent = <0x1>; 470 interrupts = <0x0 0x2f 0x4>; 471 reg = <0xe0101000 0x1000>; 472 }; 473 474 slcr@f8000000 { 475 u-boot,dm-pre-reloc; 476 #address-cells = <0x1>; 477 #size-cells = <0x1>; 478 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; 479 reg = <0xf8000000 0x1000>; 480 ranges; 481 linux,phandle = <0x9>; 482 phandle = <0x9>; 483 484 clkc@100 { 485 u-boot,dm-pre-reloc; 486 #clock-cells = <0x1>; 487 compatible = "xlnx,ps7-clkc"; 488 fclk-enable = <0xf>; 489 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb"; 490 reg = <0x100 0x100>; 491 ps-clk-frequency = <0x1fca055>; 492 linux,phandle = <0x2>; 493 phandle = <0x2>; 494 }; 495 496 rstc@200 { 497 compatible = "xlnx,zynq-reset"; 498 reg = <0x200 0x48>; 499 #reset-cells = <0x1>; 500 syscon = <0x9>; 501 }; 502 503 pinctrl@700 { 504 compatible = "xlnx,pinctrl-zynq"; 505 reg = <0x700 0x200>; 506 syscon = <0x9>; 507 }; 508 }; 509 510 dmac@f8003000 { 511 compatible = "arm,pl330", "arm,primecell"; 512 reg = <0xf8003000 0x1000>; 513 interrupt-parent = <0x1>; 514 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7"; 515 interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>; 516 #dma-cells = <0x1>; 517 #dma-channels = <0x8>; 518 #dma-requests = <0x4>; 519 clocks = <0x2 0x1b>; 520 clock-names = "apb_pclk"; 521 linux,phandle = <0xf>; 522 phandle = <0xf>; 523 }; 524 525 devcfg@f8007000 { 526 compatible = "xlnx,zynq-devcfg-1.0"; 527 interrupt-parent = <0x1>; 528 interrupts = <0x0 0x8 0x4>; 529 reg = <0xf8007000 0x100>; 530 clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>; 531 clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; 532 syscon = <0x9>; 533 linux,phandle = <0x4>; 534 phandle = <0x4>; 535 }; 536 537 efuse@f800d000 { 538 compatible = "xlnx,zynq-efuse"; 539 reg = <0xf800d000 0x20>; 540 }; 541 542 timer@f8f00200 { 543 compatible = "arm,cortex-a9-global-timer"; 544 reg = <0xf8f00200 0x20>; 545 interrupts = <0x1 0xb 0x301>; 546 interrupt-parent = <0x1>; 547 clocks = <0x2 0x4>; 548 }; 549 550 timer@f8001000 { 551 interrupt-parent = <0x1>; 552 interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>; 553 compatible = "cdns,ttc"; 554 clocks = <0x2 0x6>; 555 reg = <0xf8001000 0x1000>; 556 }; 557 558 timer@f8002000 { 559 interrupt-parent = <0x1>; 560 interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>; 561 compatible = "cdns,ttc"; 562 clocks = <0x2 0x6>; 563 reg = <0xf8002000 0x1000>; 564 }; 565 566 timer@f8f00600 { 567 interrupt-parent = <0x1>; 568 interrupts = <0x1 0xd 0x301>; 569 compatible = "arm,cortex-a9-twd-timer"; 570 reg = <0xf8f00600 0x20>; 571 clocks = <0x2 0x4>; 572 }; 573 574 usb@e0002000 { 575 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 576 status = "okay"; 577 clocks = <0x2 0x1c>; 578 interrupt-parent = <0x1>; 579 interrupts = <0x0 0x15 0x4>; 580 reg = <0xe0002000 0x1000>; 581 phy_type = "ulpi"; 582 dr_mode = "host"; 583 xlnx,phy-reset-gpio = <0x6 0x55 0x0>; 584 }; 585 586 usb@e0003000 { 587 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 588 status = "disabled"; 589 clocks = <0x2 0x1d>; 590 interrupt-parent = <0x1>; 591 interrupts = <0x0 0x2c 0x4>; 592 reg = <0xe0003000 0x1000>; 593 phy_type = "ulpi"; 594 }; 595 596 watchdog@f8005000 { 597 clocks = <0x2 0x2d>; 598 compatible = "cdns,wdt-r1p2"; 599 interrupt-parent = <0x1>; 600 interrupts = <0x0 0x9 0x1>; 601 reg = <0xf8005000 0x1000>; 602 timeout-sec = <0xa>; 603 }; 604 }; 605 606 aliases { 607 ethernet0 = "/amba/ethernet@e000b000"; 608 serial0 = "/amba/serial@e0001000"; 609 }; 610 611 memory { 612 device_type = "memory"; 613 reg = <0x0 0x20000000>; 614 }; 615 616 chosen { 617 bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait"; 618 linux,stdout-path = "/amba@0/uart@E0001000"; 619 }; 620 621 fpga-axi@0 { 622 compatible = "simple-bus"; 623 #address-cells = <0x1>; 624 #size-cells = <0x1>; 625 ranges; 626 627 i2c@41600000 { 628 compatible = "xlnx,axi-iic-1.01.b", "xlnx,xps-iic-2.00.a"; 629 reg = <0x41600000 0x10000>; 630 interrupt-parent = <0x1>; 631 interrupts = <0x0 0x3a 0x4>; 632 clocks = <0x2 0xf>; 633 clock-names = "pclk"; 634 #size-cells = <0x0>; 635 #address-cells = <0x1>; 636 637 adv7511@39 { 638 compatible = "adi,adv7511"; 639 reg = <0x39 0x3f>; 640 reg-names = "primary", "edid"; 641 adi,input-depth = <0x8>; 642 adi,input-colorspace = "yuv422"; 643 adi,input-clock = "1x"; 644 adi,input-style = <0x1>; 645 adi,input-justification = "right"; 646 adi,clock-delay = <0x0>; 647 #sound-dai-cells = <0x0>; 648 linux,phandle = <0x14>; 649 phandle = <0x14>; 650 651 ports { 652 #address-cells = <0x1>; 653 #size-cells = <0x0>; 654 655 port@0 { 656 reg = <0x0>; 657 658 endpoint { 659 remote-endpoint = <0xa>; 660 linux,phandle = <0xe>; 661 phandle = <0xe>; 662 }; 663 }; 664 665 port@1 { 666 reg = <0x1>; 667 }; 668 }; 669 }; 670 671 adau1761@3b { 672 compatible = "adi,adau1761"; 673 reg = <0x3b>; 674 clocks = <0xb>; 675 clock-names = "mclk"; 676 #sound-dai-cells = <0x0>; 677 linux,phandle = <0x16>; 678 phandle = <0x16>; 679 }; 680 }; 681 682/* 683 dma@43000000 { 684 compatible = "adi,axi-dmac-1.00.a"; 685 reg = <0x43000000 0x10000>; 686 #dma-cells = <0x1>; 687 interrupts = <0x0 0x3b 0x0>; 688 clocks = <0x2 0x10>; 689 linux,phandle = <0xc>; 690 phandle = <0xc>; 691 692 adi,channels { 693 #size-cells = <0x0>; 694 #address-cells = <0x1>; 695 696 dma-channel@0 { 697 reg = <0x0>; 698 adi,source-bus-width = <0x40>; 699 adi,source-bus-type = <0x0>; 700 adi,destination-bus-width = <0x40>; 701 adi,destination-bus-type = <0x1>; 702 }; 703 }; 704 }; 705 706 axi-clkgen@79000000 { 707 compatible = "adi,axi-clkgen-2.00.a"; 708 reg = <0x79000000 0x10000>; 709 #clock-cells = <0x0>; 710 clocks = <0x2 0x10>; 711 linux,phandle = <0xd>; 712 phandle = <0xd>; 713 }; 714 715 axi_hdmi@70e00000 { 716 compatible = "adi,axi-hdmi-tx-1.00.a"; 717 reg = <0x70e00000 0x10000>; 718 dmas = <0xc 0x0>; 719 dma-names = "video"; 720 clocks = <0xd>; 721 722 port { 723 724 endpoint { 725 remote-endpoint = <0xe>; 726 linux,phandle = <0xa>; 727 phandle = <0xa>; 728 }; 729 }; 730 }; 731 732 axi-spdif-tx@75c00000 { 733 compatible = "adi,axi-spdif-tx-1.00.a"; 734 reg = <0x75c00000 0x1000>; 735 dmas = <0xf 0x0>; 736 dma-names = "tx"; 737 clocks = <0x2 0xf 0xb>; 738 clock-names = "axi", "ref"; 739 #sound-dai-cells = <0x0>; 740 linux,phandle = <0x13>; 741 phandle = <0x13>; 742 }; 743*/ 744 745 axi-i2s@77600000 { 746 compatible = "adi,axi-i2s-1.00.a"; 747 reg = <0x77600000 0x1000>; 748 dmas = <0xf 0x1 0xf 0x2>; 749 dma-names = "tx", "rx"; 750 clocks = <0x2 0xf 0xb>; 751 clock-names = "axi", "ref"; 752 #sound-dai-cells = <0x0>; 753 linux,phandle = <0x15>; 754 phandle = <0x15>; 755 }; 756 757 /*axi-sysid-0@45000000 { 758 compatible = "adi,axi-sysid-1.00.a"; 759 reg = <0x45000000 0x10000>; 760 };*/ 761 762 i2c@41620000 { 763 compatible = "xlnx,axi-iic-1.01.b", "xlnx,xps-iic-2.00.a"; 764 reg = <0x41620000 0x10000>; 765 interrupt-parent = <0x1>; 766 interrupts = <0x0 0x37 0x4>; 767 clocks = <0x2 0xf>; 768 clock-names = "pclk"; 769 #size-cells = <0x0>; 770 #address-cells = <0x1>; 771 772 ad7291@2f { 773 compatible = "adi,ad7291"; 774 reg = <0x2f>; 775 }; 776 777 eeprom@50 { 778 compatible = "at24,24c02"; 779 reg = <0x50>; 780 }; 781 }; 782 783 dma@7c400000 { 784 compatible = "adi,axi-dmac-1.00.a"; 785 reg = <0x7c400000 0x10000>; 786 #dma-cells = <0x1>; 787 interrupts = <0x0 0x39 0x0>; 788 clocks = <0x2 0x10>; 789 linux,phandle = <0x10>; 790 phandle = <0x10>; 791 792 adi,channels { 793 #size-cells = <0x0>; 794 #address-cells = <0x1>; 795 796 dma-channel@0 { 797 reg = <0x0>; 798 adi,source-bus-width = <0x40>; 799 adi,source-bus-type = <0x2>; 800 adi,destination-bus-width = <0x40>; 801 adi,destination-bus-type = <0x0>; 802 }; 803 }; 804 }; 805 806 dma@7c420000 { 807 compatible = "adi,axi-dmac-1.00.a"; 808 reg = <0x7c420000 0x10000>; 809 #dma-cells = <0x1>; 810 interrupts = <0x0 0x38 0x0>; 811 clocks = <0x2 0x10>; 812 linux,phandle = <0x12>; 813 phandle = <0x12>; 814 815 adi,channels { 816 #size-cells = <0x0>; 817 #address-cells = <0x1>; 818 819 dma-channel@0 { 820 reg = <0x0>; 821 adi,source-bus-width = <0x40>; 822 adi,source-bus-type = <0x0>; 823 adi,destination-bus-width = <0x40>; 824 adi,destination-bus-type = <0x2>; 825 }; 826 }; 827 }; 828 829 sdr: sdr { 830 compatible ="sdr,sdr"; 831 dmas = <&rx_dma 1 832 &tx_dma 0>; 833 dma-names = "rx_dma_s2mm", "tx_dma_mm2s"; 834 interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt"; 835 interrupt-parent = <1>; 836 interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>; 837 } ; 838 839 axidmatest_1: axidmatest@1 { 840 compatible ="xlnx,axi-dma-test-1.00.a"; 841 dmas = <&rx_dma 0 842 &rx_dma 1>; 843 dma-names = "axidma0", "axidma1"; 844 } ; 845 846 tx_dma: dma@80400000 { 847 #dma-cells = <1>; 848 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 849 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 850 compatible = "xlnx,axi-dma-1.00.a"; 851 interrupt-names = "mm2s_introut", "s2mm_introut"; 852 interrupt-parent = <1>; 853 interrupts = <0 35 4 0 36 4>; 854 reg = <0x80400000 0x10000>; 855 xlnx,addrwidth = <0x20>; 856 xlnx,include-sg ; 857 xlnx,sg-length-width = <0xe>; 858 dma-channel@80400000 { 859 compatible = "xlnx,axi-dma-mm2s-channel"; 860 dma-channels = <0x1>; 861 interrupts = <0 35 4>; 862 xlnx,datawidth = <0x40>; 863 xlnx,device-id = <0x0>; 864 }; 865 dma-channel@80400030 { 866 compatible = "xlnx,axi-dma-s2mm-channel"; 867 dma-channels = <0x1>; 868 interrupts = <0 36 4>; 869 xlnx,datawidth = <0x40>; 870 xlnx,device-id = <0x0>; 871 }; 872 }; 873 874 rx_dma: dma@80410000 { 875 #dma-cells = <1>; 876 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 877 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 878 compatible = "xlnx,axi-dma-1.00.a"; 879 //dma-coherent ; 880 interrupt-names = "mm2s_introut", "s2mm_introut"; 881 interrupt-parent = <1>; 882 interrupts = <0 31 4 0 32 4>; 883 reg = <0x80410000 0x10000>; 884 xlnx,addrwidth = <0x20>; 885 xlnx,include-sg ; 886 xlnx,sg-length-width = <0xe>; 887 dma-channel@80410000 { 888 compatible = "xlnx,axi-dma-mm2s-channel"; 889 dma-channels = <0x1>; 890 interrupts = <0 31 4>; 891 xlnx,datawidth = <0x40>; 892 xlnx,device-id = <0x1>; 893 }; 894 dma-channel@80410030 { 895 compatible = "xlnx,axi-dma-s2mm-channel"; 896 dma-channels = <0x1>; 897 interrupts = <0 32 4>; 898 xlnx,datawidth = <0x40>; 899 xlnx,device-id = <0x1>; 900 }; 901 }; 902 903 tx_intf_0: tx_intf@83c00000 { 904 clock-names = "s00_axi_aclk", "s00_axis_aclk";//, "s01_axis_aclk", "m00_axis_aclk"; 905 clocks = <0x2 0x11>, <0x2 0x11>;//, <0x2 0x11>, <0x2 0x11>; 906 compatible = "sdr,tx_intf"; 907 interrupt-names = "tx_itrpt"; 908 interrupt-parent = <1>; 909 interrupts = <0 34 1>; 910 reg = <0x83c00000 0x10000>; 911 xlnx,s00-axi-addr-width = <0x7>; 912 xlnx,s00-axi-data-width = <0x20>; 913 }; 914 915 rx_intf_0: rx_intf@83c20000 { 916 clock-names = "s00_axi_aclk", "m00_axis_aclk";//, "s00_axis_aclk"; 917 clocks = <0x2 0x11>, <0x2 0x11>;//, <0x2 0x11>; 918 compatible = "sdr,rx_intf"; 919 interrupt-names = "not_valid_anymore", "rx_pkt_intr"; 920 interrupt-parent = <1>; 921 interrupts = <0 29 1 0 30 1>; 922 reg = <0x83c20000 0x10000>; 923 xlnx,s00-axi-addr-width = <0x7>; 924 xlnx,s00-axi-data-width = <0x20>; 925 }; 926 927 openofdm_tx_0: openofdm_tx@83c10000 { 928 clock-names = "clk"; 929 clocks = <0x2 0x11>; 930 compatible = "sdr,openofdm_tx"; 931 reg = <0x83c10000 0x10000>; 932 }; 933 934 openofdm_rx_0: openofdm_rx@83c30000 { 935 clock-names = "clk"; 936 clocks = <0x2 0x11>; 937 compatible = "sdr,openofdm_rx"; 938 reg = <0x83c30000 0x10000>; 939 }; 940 941 xpu_0: xpu@83c40000 { 942 clock-names = "s00_axi_aclk"; 943 clocks = <0x2 0x11>; 944 compatible = "sdr,xpu"; 945 reg = <0x83c40000 0x10000>; 946 }; 947 948 side_ch_0: side_ch@83c50000 { 949 clock-names = "s00_axi_aclk"; 950 clocks = <0x2 0x11>; 951 compatible = "sdr,side_ch"; 952 reg = <0x83c50000 0x10000>; 953 dmas = <&rx_dma 0 954 &tx_dma 1>; 955 dma-names = "rx_dma_mm2s", "tx_dma_s2mm"; 956 }; 957 958 cf-ad9361-lpc@79020000 { 959 compatible = "adi,axi-ad9361-6.00.a"; 960 reg = <0x79020000 0x6000>; 961 dmas = <0x10 0x0>; 962 dma-names = "rx"; 963 spibus-connected = <0x11>; 964 }; 965 966 cf-ad9361-dds-core-lpc@79024000 { 967 compatible = "adi,axi-ad9361-dds-6.00.a"; 968 reg = <0x79024000 0x1000>; 969 clocks = <0x11 0xd>; 970 clock-names = "sampl_clk"; 971 dmas = <0x12 0x0>; 972 dma-names = "tx"; 973 }; 974 }; 975 976/* 977 audio_clock { 978 compatible = "fixed-clock"; 979 #clock-cells = <0x0>; 980 clock-frequency = <0xbb8000>; 981 linux,phandle = <0xb>; 982 phandle = <0xb>; 983 }; 984 985 adv7511_hdmi_snd { 986 compatible = "simple-audio-card"; 987 simple-audio-card,name = "HDMI monitor"; 988 simple-audio-card,widgets = "Speaker", "Speaker"; 989 simple-audio-card,routing = "Speaker", "TX"; 990 991 simple-audio-card,dai-link@0 { 992 format = "spdif"; 993 994 cpu { 995 sound-dai = <0x13>; 996 frame-master; 997 bitclock-master; 998 }; 999 1000 codec { 1001 sound-dai = <0x14>; 1002 }; 1003 }; 1004 }; 1005 1006 zed_sound { 1007 compatible = "simple-audio-card"; 1008 simple-audio-card,name = "ZED ADAU1761"; 1009 simple-audio-card,widgets = "Microphone", "Mic In", "Headphone", "Headphone Out", "Line", "Line In", "Line", "Line Out"; 1010 simple-audio-card,routing = "Line Out", "LOUT", "Line Out", "ROUT", "Headphone Out", "LHP", "Headphone Out", "RHP", "Mic In", "MICBIAS", "LINN", "Mic In", "RINN", "Mic In", "LAUX", "Line In", "RAUX", "Line In"; 1011 1012 simple-audio-card,dai-link@0 { 1013 format = "i2s"; 1014 1015 cpu { 1016 sound-dai = <0x15>; 1017 frame-master; 1018 bitclock-master; 1019 }; 1020 1021 codec { 1022 sound-dai = <0x16>; 1023 }; 1024 }; 1025 }; 1026*/ 1027 1028 leds { 1029 compatible = "gpio-leds"; 1030 1031 ld0 { 1032 label = "ld0:red"; 1033 gpios = <0x6 0x49 0x0>; 1034 }; 1035 1036 ld1 { 1037 label = "ld1:red"; 1038 gpios = <0x6 0x4a 0x0>; 1039 }; 1040 1041 ld2 { 1042 label = "ld2:red"; 1043 gpios = <0x6 0x4b 0x0>; 1044 }; 1045 1046 ld3 { 1047 label = "ld3:red"; 1048 gpios = <0x6 0x4c 0x0>; 1049 }; 1050 1051 ld4 { 1052 label = "ld4:red"; 1053 gpios = <0x6 0x4d 0x0>; 1054 }; 1055 1056 ld5 { 1057 label = "ld5:red"; 1058 gpios = <0x6 0x4e 0x0>; 1059 }; 1060 1061 ld6 { 1062 label = "ld6:red"; 1063 gpios = <0x6 0x4f 0x0>; 1064 }; 1065 1066 ld7 { 1067 label = "ld7:red"; 1068 gpios = <0x6 0x50 0x0>; 1069 }; 1070 }; 1071 1072 clocks { 1073 1074 clock@0 { 1075 compatible = "fixed-clock"; 1076 clock-frequency = <0x2625a00>; 1077 clock-output-names = "ad9361_ext_refclk"; 1078 #clock-cells = <0x0>; 1079 linux,phandle = <0x5>; 1080 phandle = <0x5>; 1081 }; 1082 1083 clock@1 { 1084 compatible = "fixed-clock"; 1085 clock-frequency = <0x17d7840>; 1086 clock-output-names = "refclk"; 1087 #clock-cells = <0x0>; 1088 linux,phandle = <0x7>; 1089 phandle = <0x7>; 1090 }; 1091 }; 1092}; 1093