1*b73660adSXianjun Jiao/dts-v1/; 2*b73660adSXianjun Jiao 3*b73660adSXianjun Jiao/ { 4*b73660adSXianjun Jiao #address-cells = <0x1>; 5*b73660adSXianjun Jiao #size-cells = <0x1>; 6*b73660adSXianjun Jiao compatible = "xlnx,zynq-7000"; 7*b73660adSXianjun Jiao interrupt-parent = <0x1>; 8*b73660adSXianjun Jiao model = "Xilinx Zynq ZED"; 9*b73660adSXianjun Jiao 10*b73660adSXianjun Jiao cpus { 11*b73660adSXianjun Jiao #address-cells = <0x1>; 12*b73660adSXianjun Jiao #size-cells = <0x0>; 13*b73660adSXianjun Jiao 14*b73660adSXianjun Jiao cpu@0 { 15*b73660adSXianjun Jiao compatible = "arm,cortex-a9"; 16*b73660adSXianjun Jiao device_type = "cpu"; 17*b73660adSXianjun Jiao reg = <0x0>; 18*b73660adSXianjun Jiao clocks = <0x2 0x3>; 19*b73660adSXianjun Jiao clock-latency = <0x3e8>; 20*b73660adSXianjun Jiao cpu0-supply = <0x3>; 21*b73660adSXianjun Jiao operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>; 22*b73660adSXianjun Jiao }; 23*b73660adSXianjun Jiao 24*b73660adSXianjun Jiao cpu@1 { 25*b73660adSXianjun Jiao compatible = "arm,cortex-a9"; 26*b73660adSXianjun Jiao device_type = "cpu"; 27*b73660adSXianjun Jiao reg = <0x1>; 28*b73660adSXianjun Jiao clocks = <0x2 0x3>; 29*b73660adSXianjun Jiao }; 30*b73660adSXianjun Jiao }; 31*b73660adSXianjun Jiao 32*b73660adSXianjun Jiao fpga-full { 33*b73660adSXianjun Jiao compatible = "fpga-region"; 34*b73660adSXianjun Jiao fpga-mgr = <0x4>; 35*b73660adSXianjun Jiao #address-cells = <0x1>; 36*b73660adSXianjun Jiao #size-cells = <0x1>; 37*b73660adSXianjun Jiao ranges; 38*b73660adSXianjun Jiao }; 39*b73660adSXianjun Jiao 40*b73660adSXianjun Jiao pmu@f8891000 { 41*b73660adSXianjun Jiao compatible = "arm,cortex-a9-pmu"; 42*b73660adSXianjun Jiao interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>; 43*b73660adSXianjun Jiao interrupt-parent = <0x1>; 44*b73660adSXianjun Jiao reg = <0xf8891000 0x1000 0xf8893000 0x1000>; 45*b73660adSXianjun Jiao }; 46*b73660adSXianjun Jiao 47*b73660adSXianjun Jiao fixedregulator { 48*b73660adSXianjun Jiao compatible = "regulator-fixed"; 49*b73660adSXianjun Jiao regulator-name = "VCCPINT"; 50*b73660adSXianjun Jiao regulator-min-microvolt = <0xf4240>; 51*b73660adSXianjun Jiao regulator-max-microvolt = <0xf4240>; 52*b73660adSXianjun Jiao regulator-boot-on; 53*b73660adSXianjun Jiao regulator-always-on; 54*b73660adSXianjun Jiao linux,phandle = <0x3>; 55*b73660adSXianjun Jiao phandle = <0x3>; 56*b73660adSXianjun Jiao }; 57*b73660adSXianjun Jiao 58*b73660adSXianjun Jiao amba { 59*b73660adSXianjun Jiao u-boot,dm-pre-reloc; 60*b73660adSXianjun Jiao compatible = "simple-bus"; 61*b73660adSXianjun Jiao #address-cells = <0x1>; 62*b73660adSXianjun Jiao #size-cells = <0x1>; 63*b73660adSXianjun Jiao interrupt-parent = <0x1>; 64*b73660adSXianjun Jiao ranges; 65*b73660adSXianjun Jiao 66*b73660adSXianjun Jiao adc@f8007100 { 67*b73660adSXianjun Jiao compatible = "xlnx,zynq-xadc-1.00.a"; 68*b73660adSXianjun Jiao reg = <0xf8007100 0x20>; 69*b73660adSXianjun Jiao interrupts = <0x0 0x7 0x4>; 70*b73660adSXianjun Jiao interrupt-parent = <0x1>; 71*b73660adSXianjun Jiao clocks = <0x2 0xc>; 72*b73660adSXianjun Jiao }; 73*b73660adSXianjun Jiao 74*b73660adSXianjun Jiao can@e0008000 { 75*b73660adSXianjun Jiao compatible = "xlnx,zynq-can-1.0"; 76*b73660adSXianjun Jiao status = "disabled"; 77*b73660adSXianjun Jiao clocks = <0x2 0x13 0x2 0x24>; 78*b73660adSXianjun Jiao clock-names = "can_clk", "pclk"; 79*b73660adSXianjun Jiao reg = <0xe0008000 0x1000>; 80*b73660adSXianjun Jiao interrupts = <0x0 0x1c 0x4>; 81*b73660adSXianjun Jiao interrupt-parent = <0x1>; 82*b73660adSXianjun Jiao tx-fifo-depth = <0x40>; 83*b73660adSXianjun Jiao rx-fifo-depth = <0x40>; 84*b73660adSXianjun Jiao }; 85*b73660adSXianjun Jiao 86*b73660adSXianjun Jiao can@e0009000 { 87*b73660adSXianjun Jiao compatible = "xlnx,zynq-can-1.0"; 88*b73660adSXianjun Jiao status = "disabled"; 89*b73660adSXianjun Jiao clocks = <0x2 0x14 0x2 0x25>; 90*b73660adSXianjun Jiao clock-names = "can_clk", "pclk"; 91*b73660adSXianjun Jiao reg = <0xe0009000 0x1000>; 92*b73660adSXianjun Jiao interrupts = <0x0 0x33 0x4>; 93*b73660adSXianjun Jiao interrupt-parent = <0x1>; 94*b73660adSXianjun Jiao tx-fifo-depth = <0x40>; 95*b73660adSXianjun Jiao rx-fifo-depth = <0x40>; 96*b73660adSXianjun Jiao }; 97*b73660adSXianjun Jiao 98*b73660adSXianjun Jiao gpio@e000a000 { 99*b73660adSXianjun Jiao compatible = "xlnx,zynq-gpio-1.0"; 100*b73660adSXianjun Jiao #gpio-cells = <0x2>; 101*b73660adSXianjun Jiao clocks = <0x2 0x2a>; 102*b73660adSXianjun Jiao gpio-controller; 103*b73660adSXianjun Jiao interrupt-controller; 104*b73660adSXianjun Jiao #interrupt-cells = <0x2>; 105*b73660adSXianjun Jiao interrupt-parent = <0x1>; 106*b73660adSXianjun Jiao interrupts = <0x0 0x14 0x4>; 107*b73660adSXianjun Jiao reg = <0xe000a000 0x1000>; 108*b73660adSXianjun Jiao linux,phandle = <0x6>; 109*b73660adSXianjun Jiao phandle = <0x6>; 110*b73660adSXianjun Jiao }; 111*b73660adSXianjun Jiao 112*b73660adSXianjun Jiao i2c@e0004000 { 113*b73660adSXianjun Jiao compatible = "cdns,i2c-r1p10"; 114*b73660adSXianjun Jiao status = "disabled"; 115*b73660adSXianjun Jiao clocks = <0x2 0x26>; 116*b73660adSXianjun Jiao interrupt-parent = <0x1>; 117*b73660adSXianjun Jiao interrupts = <0x0 0x19 0x4>; 118*b73660adSXianjun Jiao reg = <0xe0004000 0x1000>; 119*b73660adSXianjun Jiao #address-cells = <0x1>; 120*b73660adSXianjun Jiao #size-cells = <0x0>; 121*b73660adSXianjun Jiao }; 122*b73660adSXianjun Jiao 123*b73660adSXianjun Jiao i2c@e0005000 { 124*b73660adSXianjun Jiao compatible = "cdns,i2c-r1p10"; 125*b73660adSXianjun Jiao status = "disabled"; 126*b73660adSXianjun Jiao clocks = <0x2 0x27>; 127*b73660adSXianjun Jiao interrupt-parent = <0x1>; 128*b73660adSXianjun Jiao interrupts = <0x0 0x30 0x4>; 129*b73660adSXianjun Jiao reg = <0xe0005000 0x1000>; 130*b73660adSXianjun Jiao #address-cells = <0x1>; 131*b73660adSXianjun Jiao #size-cells = <0x0>; 132*b73660adSXianjun Jiao }; 133*b73660adSXianjun Jiao 134*b73660adSXianjun Jiao interrupt-controller@f8f01000 { 135*b73660adSXianjun Jiao compatible = "arm,cortex-a9-gic"; 136*b73660adSXianjun Jiao #interrupt-cells = <0x3>; 137*b73660adSXianjun Jiao interrupt-controller; 138*b73660adSXianjun Jiao reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; 139*b73660adSXianjun Jiao linux,phandle = <0x1>; 140*b73660adSXianjun Jiao phandle = <0x1>; 141*b73660adSXianjun Jiao }; 142*b73660adSXianjun Jiao 143*b73660adSXianjun Jiao cache-controller@f8f02000 { 144*b73660adSXianjun Jiao compatible = "arm,pl310-cache"; 145*b73660adSXianjun Jiao reg = <0xf8f02000 0x1000>; 146*b73660adSXianjun Jiao interrupts = <0x0 0x2 0x4>; 147*b73660adSXianjun Jiao arm,data-latency = <0x3 0x2 0x2>; 148*b73660adSXianjun Jiao arm,tag-latency = <0x2 0x2 0x2>; 149*b73660adSXianjun Jiao cache-unified; 150*b73660adSXianjun Jiao cache-level = <0x2>; 151*b73660adSXianjun Jiao }; 152*b73660adSXianjun Jiao 153*b73660adSXianjun Jiao memory-controller@f8006000 { 154*b73660adSXianjun Jiao compatible = "xlnx,zynq-ddrc-a05"; 155*b73660adSXianjun Jiao reg = <0xf8006000 0x1000>; 156*b73660adSXianjun Jiao }; 157*b73660adSXianjun Jiao 158*b73660adSXianjun Jiao ocmc@f800c000 { 159*b73660adSXianjun Jiao compatible = "xlnx,zynq-ocmc-1.0"; 160*b73660adSXianjun Jiao interrupt-parent = <0x1>; 161*b73660adSXianjun Jiao interrupts = <0x0 0x3 0x4>; 162*b73660adSXianjun Jiao reg = <0xf800c000 0x1000>; 163*b73660adSXianjun Jiao }; 164*b73660adSXianjun Jiao 165*b73660adSXianjun Jiao serial@e0000000 { 166*b73660adSXianjun Jiao compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 167*b73660adSXianjun Jiao status = "disabled"; 168*b73660adSXianjun Jiao clocks = <0x2 0x17 0x2 0x28>; 169*b73660adSXianjun Jiao clock-names = "uart_clk", "pclk"; 170*b73660adSXianjun Jiao reg = <0xe0000000 0x1000>; 171*b73660adSXianjun Jiao interrupts = <0x0 0x1b 0x4>; 172*b73660adSXianjun Jiao }; 173*b73660adSXianjun Jiao 174*b73660adSXianjun Jiao serial@e0001000 { 175*b73660adSXianjun Jiao compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 176*b73660adSXianjun Jiao status = "okay"; 177*b73660adSXianjun Jiao clocks = <0x2 0x18 0x2 0x29>; 178*b73660adSXianjun Jiao clock-names = "uart_clk", "pclk"; 179*b73660adSXianjun Jiao reg = <0xe0001000 0x1000>; 180*b73660adSXianjun Jiao interrupts = <0x0 0x32 0x4>; 181*b73660adSXianjun Jiao }; 182*b73660adSXianjun Jiao 183*b73660adSXianjun Jiao spi@e0006000 { 184*b73660adSXianjun Jiao compatible = "xlnx,zynq-spi-r1p6"; 185*b73660adSXianjun Jiao reg = <0xe0006000 0x1000>; 186*b73660adSXianjun Jiao status = "okay"; 187*b73660adSXianjun Jiao interrupt-parent = <0x1>; 188*b73660adSXianjun Jiao interrupts = <0x0 0x1a 0x4>; 189*b73660adSXianjun Jiao clocks = <0x2 0x19 0x2 0x22>; 190*b73660adSXianjun Jiao clock-names = "ref_clk", "pclk"; 191*b73660adSXianjun Jiao #address-cells = <0x1>; 192*b73660adSXianjun Jiao #size-cells = <0x0>; 193*b73660adSXianjun Jiao 194*b73660adSXianjun Jiao ad9361-phy@0 { 195*b73660adSXianjun Jiao #address-cells = <0x1>; 196*b73660adSXianjun Jiao #size-cells = <0x0>; 197*b73660adSXianjun Jiao #clock-cells = <0x1>; 198*b73660adSXianjun Jiao compatible = "adi,ad9361"; 199*b73660adSXianjun Jiao reg = <0x0>; 200*b73660adSXianjun Jiao spi-cpha; 201*b73660adSXianjun Jiao spi-max-frequency = <0x989680>; 202*b73660adSXianjun Jiao clocks = <0x5 0x0>; 203*b73660adSXianjun Jiao clock-names = "ad9361_ext_refclk"; 204*b73660adSXianjun Jiao clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; 205*b73660adSXianjun Jiao adi,digital-interface-tune-skip-mode = <0x0>; 206*b73660adSXianjun Jiao adi,pp-tx-swap-enable; 207*b73660adSXianjun Jiao adi,pp-rx-swap-enable; 208*b73660adSXianjun Jiao adi,rx-frame-pulse-mode-enable; 209*b73660adSXianjun Jiao adi,lvds-mode-enable; 210*b73660adSXianjun Jiao adi,lvds-bias-mV = <0x96>; 211*b73660adSXianjun Jiao adi,lvds-rx-onchip-termination-enable; 212*b73660adSXianjun Jiao adi,rx-data-delay = <0x4>; 213*b73660adSXianjun Jiao adi,tx-fb-clock-delay = <0x7>; 214*b73660adSXianjun Jiao adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>; 215*b73660adSXianjun Jiao adi,2rx-2tx-mode-enable; 216*b73660adSXianjun Jiao adi,frequency-division-duplex-mode-enable; 217*b73660adSXianjun Jiao adi,rx-rf-port-input-select = <0x0>; 218*b73660adSXianjun Jiao adi,tx-rf-port-input-select = <0x0>; 219*b73660adSXianjun Jiao adi,tx-attenuation-mdB = <0x2710>; 220*b73660adSXianjun Jiao adi,rf-rx-bandwidth-hz = <0x112a880>; 221*b73660adSXianjun Jiao adi,rf-tx-bandwidth-hz = <0x112a880>; 222*b73660adSXianjun Jiao adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; 223*b73660adSXianjun Jiao adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>; 224*b73660adSXianjun Jiao adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 225*b73660adSXianjun Jiao adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 226*b73660adSXianjun Jiao adi,gc-rx1-mode = <0x2>; 227*b73660adSXianjun Jiao adi,gc-rx2-mode = <0x2>; 228*b73660adSXianjun Jiao adi,gc-adc-ovr-sample-size = <0x4>; 229*b73660adSXianjun Jiao adi,gc-adc-small-overload-thresh = <0x2f>; 230*b73660adSXianjun Jiao adi,gc-adc-large-overload-thresh = <0x3a>; 231*b73660adSXianjun Jiao adi,gc-lmt-overload-high-thresh = <0x320>; 232*b73660adSXianjun Jiao adi,gc-lmt-overload-low-thresh = <0x2c0>; 233*b73660adSXianjun Jiao adi,gc-dec-pow-measurement-duration = <0x2000>; 234*b73660adSXianjun Jiao adi,gc-low-power-thresh = <0x18>; 235*b73660adSXianjun Jiao adi,mgc-inc-gain-step = <0x2>; 236*b73660adSXianjun Jiao adi,mgc-dec-gain-step = <0x2>; 237*b73660adSXianjun Jiao adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>; 238*b73660adSXianjun Jiao adi,agc-attack-delay-extra-margin-us = <0x1>; 239*b73660adSXianjun Jiao adi,agc-outer-thresh-high = <0x5>; 240*b73660adSXianjun Jiao adi,agc-outer-thresh-high-dec-steps = <0x2>; 241*b73660adSXianjun Jiao adi,agc-inner-thresh-high = <0xa>; 242*b73660adSXianjun Jiao adi,agc-inner-thresh-high-dec-steps = <0x1>; 243*b73660adSXianjun Jiao adi,agc-inner-thresh-low = <0xc>; 244*b73660adSXianjun Jiao adi,agc-inner-thresh-low-inc-steps = <0x1>; 245*b73660adSXianjun Jiao adi,agc-outer-thresh-low = <0x12>; 246*b73660adSXianjun Jiao adi,agc-outer-thresh-low-inc-steps = <0x2>; 247*b73660adSXianjun Jiao adi,agc-adc-small-overload-exceed-counter = <0xa>; 248*b73660adSXianjun Jiao adi,agc-adc-large-overload-exceed-counter = <0xa>; 249*b73660adSXianjun Jiao adi,agc-adc-large-overload-inc-steps = <0x2>; 250*b73660adSXianjun Jiao adi,agc-lmt-overload-large-exceed-counter = <0xa>; 251*b73660adSXianjun Jiao adi,agc-lmt-overload-small-exceed-counter = <0xa>; 252*b73660adSXianjun Jiao adi,agc-lmt-overload-large-inc-steps = <0x2>; 253*b73660adSXianjun Jiao adi,agc-gain-update-interval-us = <0x3e8>; 254*b73660adSXianjun Jiao adi,fagc-dec-pow-measurement-duration = <0x40>; 255*b73660adSXianjun Jiao adi,fagc-lp-thresh-increment-steps = <0x1>; 256*b73660adSXianjun Jiao adi,fagc-lp-thresh-increment-time = <0x5>; 257*b73660adSXianjun Jiao adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>; 258*b73660adSXianjun Jiao adi,fagc-final-overrange-count = <0x3>; 259*b73660adSXianjun Jiao adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>; 260*b73660adSXianjun Jiao adi,fagc-lmt-final-settling-steps = <0x1>; 261*b73660adSXianjun Jiao adi,fagc-lock-level = <0xa>; 262*b73660adSXianjun Jiao adi,fagc-lock-level-gain-increase-upper-limit = <0x5>; 263*b73660adSXianjun Jiao adi,fagc-lock-level-lmt-gain-increase-enable; 264*b73660adSXianjun Jiao adi,fagc-lpf-final-settling-steps = <0x1>; 265*b73660adSXianjun Jiao adi,fagc-optimized-gain-offset = <0x5>; 266*b73660adSXianjun Jiao adi,fagc-power-measurement-duration-in-state5 = <0x40>; 267*b73660adSXianjun Jiao adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable; 268*b73660adSXianjun Jiao adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>; 269*b73660adSXianjun Jiao adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable; 270*b73660adSXianjun Jiao adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>; 271*b73660adSXianjun Jiao adi,fagc-rst-gla-large-adc-overload-enable; 272*b73660adSXianjun Jiao adi,fagc-rst-gla-large-lmt-overload-enable; 273*b73660adSXianjun Jiao adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>; 274*b73660adSXianjun Jiao adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable; 275*b73660adSXianjun Jiao adi,fagc-state-wait-time-ns = <0x104>; 276*b73660adSXianjun Jiao adi,fagc-use-last-lock-level-for-set-gain-enable; 277*b73660adSXianjun Jiao adi,rssi-restart-mode = <0x3>; 278*b73660adSXianjun Jiao adi,rssi-delay = <0x1>; 279*b73660adSXianjun Jiao adi,rssi-wait = <0x1>; 280*b73660adSXianjun Jiao adi,rssi-duration = <0x3e8>; 281*b73660adSXianjun Jiao adi,ctrl-outs-index = <0x0>; 282*b73660adSXianjun Jiao adi,ctrl-outs-enable-mask = <0xff>; 283*b73660adSXianjun Jiao adi,temp-sense-measurement-interval-ms = <0x3e8>; 284*b73660adSXianjun Jiao adi,temp-sense-offset-signed = <0xce>; 285*b73660adSXianjun Jiao adi,temp-sense-periodic-measurement-enable; 286*b73660adSXianjun Jiao adi,aux-dac-manual-mode-enable; 287*b73660adSXianjun Jiao adi,aux-dac1-default-value-mV = <0x0>; 288*b73660adSXianjun Jiao adi,aux-dac1-rx-delay-us = <0x0>; 289*b73660adSXianjun Jiao adi,aux-dac1-tx-delay-us = <0x0>; 290*b73660adSXianjun Jiao adi,aux-dac2-default-value-mV = <0x0>; 291*b73660adSXianjun Jiao adi,aux-dac2-rx-delay-us = <0x0>; 292*b73660adSXianjun Jiao adi,aux-dac2-tx-delay-us = <0x0>; 293*b73660adSXianjun Jiao en_agc-gpios = <0x6 0x62 0x0>; 294*b73660adSXianjun Jiao sync-gpios = <0x6 0x63 0x0>; 295*b73660adSXianjun Jiao reset-gpios = <0x6 0x64 0x0>; 296*b73660adSXianjun Jiao enable-gpios = <0x6 0x65 0x0>; 297*b73660adSXianjun Jiao txnrx-gpios = <0x6 0x66 0x0>; 298*b73660adSXianjun Jiao linux,phandle = <0x11>; 299*b73660adSXianjun Jiao phandle = <0x11>; 300*b73660adSXianjun Jiao }; 301*b73660adSXianjun Jiao }; 302*b73660adSXianjun Jiao 303*b73660adSXianjun Jiao spi@e0007000 { 304*b73660adSXianjun Jiao compatible = "xlnx,zynq-spi-r1p6"; 305*b73660adSXianjun Jiao reg = <0xe0007000 0x1000>; 306*b73660adSXianjun Jiao status = "okay"; 307*b73660adSXianjun Jiao interrupt-parent = <0x1>; 308*b73660adSXianjun Jiao interrupts = <0x0 0x31 0x4>; 309*b73660adSXianjun Jiao clocks = <0x2 0x1a 0x2 0x23>; 310*b73660adSXianjun Jiao clock-names = "ref_clk", "pclk"; 311*b73660adSXianjun Jiao #address-cells = <0x1>; 312*b73660adSXianjun Jiao #size-cells = <0x0>; 313*b73660adSXianjun Jiao 314*b73660adSXianjun Jiao adf4351-udc-tx-pmod@0 { 315*b73660adSXianjun Jiao #address-cells = <0x1>; 316*b73660adSXianjun Jiao #size-cells = <0x0>; 317*b73660adSXianjun Jiao compatible = "adi,adf4351"; 318*b73660adSXianjun Jiao reg = <0x0>; 319*b73660adSXianjun Jiao spi-max-frequency = <0x989680>; 320*b73660adSXianjun Jiao clocks = <0x7>; 321*b73660adSXianjun Jiao clock-names = "clkin"; 322*b73660adSXianjun Jiao adi,channel-spacing = <0xf4240>; 323*b73660adSXianjun Jiao adi,power-up-frequency = <0x160dc080>; 324*b73660adSXianjun Jiao adi,phase-detector-polarity-positive-enable; 325*b73660adSXianjun Jiao adi,charge-pump-current = <0x9c4>; 326*b73660adSXianjun Jiao adi,output-power = <0x3>; 327*b73660adSXianjun Jiao adi,mute-till-lock-enable; 328*b73660adSXianjun Jiao adi,muxout-select = <0x6>; 329*b73660adSXianjun Jiao gpios = <0x6 0x68 0x0>; 330*b73660adSXianjun Jiao }; 331*b73660adSXianjun Jiao 332*b73660adSXianjun Jiao adf4351-udc-rx-pmod@1 { 333*b73660adSXianjun Jiao #address-cells = <0x1>; 334*b73660adSXianjun Jiao #size-cells = <0x0>; 335*b73660adSXianjun Jiao compatible = "adi,adf4351"; 336*b73660adSXianjun Jiao reg = <0x1>; 337*b73660adSXianjun Jiao spi-max-frequency = <0x989680>; 338*b73660adSXianjun Jiao clocks = <0x7>; 339*b73660adSXianjun Jiao clock-names = "clkin"; 340*b73660adSXianjun Jiao adi,channel-spacing = <0xf4240>; 341*b73660adSXianjun Jiao adi,power-up-frequency = <0x1443fd00>; 342*b73660adSXianjun Jiao adi,phase-detector-polarity-positive-enable; 343*b73660adSXianjun Jiao adi,charge-pump-current = <0x9c4>; 344*b73660adSXianjun Jiao adi,output-power = <0x3>; 345*b73660adSXianjun Jiao adi,mute-till-lock-enable; 346*b73660adSXianjun Jiao adi,muxout-select = <0x6>; 347*b73660adSXianjun Jiao gpios = <0x6 0x67 0x0>; 348*b73660adSXianjun Jiao }; 349*b73660adSXianjun Jiao }; 350*b73660adSXianjun Jiao 351*b73660adSXianjun Jiao spi@e000d000 { 352*b73660adSXianjun Jiao clock-names = "ref_clk", "pclk"; 353*b73660adSXianjun Jiao clocks = <0x2 0xa 0x2 0x2b>; 354*b73660adSXianjun Jiao compatible = "xlnx,zynq-qspi-1.0"; 355*b73660adSXianjun Jiao status = "okay"; 356*b73660adSXianjun Jiao interrupt-parent = <0x1>; 357*b73660adSXianjun Jiao interrupts = <0x0 0x13 0x4>; 358*b73660adSXianjun Jiao reg = <0xe000d000 0x1000>; 359*b73660adSXianjun Jiao #address-cells = <0x1>; 360*b73660adSXianjun Jiao #size-cells = <0x0>; 361*b73660adSXianjun Jiao is-dual = <0x0>; 362*b73660adSXianjun Jiao num-cs = <0x1>; 363*b73660adSXianjun Jiao 364*b73660adSXianjun Jiao ps7-qspi@0 { 365*b73660adSXianjun Jiao #address-cells = <0x1>; 366*b73660adSXianjun Jiao #size-cells = <0x1>; 367*b73660adSXianjun Jiao compatible = "n25q128a11"; 368*b73660adSXianjun Jiao reg = <0x0>; 369*b73660adSXianjun Jiao spi-max-frequency = <0x2faf080>; 370*b73660adSXianjun Jiao 371*b73660adSXianjun Jiao partition@0 { 372*b73660adSXianjun Jiao label = "boot"; 373*b73660adSXianjun Jiao reg = <0x0 0x500000>; 374*b73660adSXianjun Jiao }; 375*b73660adSXianjun Jiao 376*b73660adSXianjun Jiao partition@500000 { 377*b73660adSXianjun Jiao label = "bootenv"; 378*b73660adSXianjun Jiao reg = <0x500000 0x20000>; 379*b73660adSXianjun Jiao }; 380*b73660adSXianjun Jiao 381*b73660adSXianjun Jiao partition@520000 { 382*b73660adSXianjun Jiao label = "config"; 383*b73660adSXianjun Jiao reg = <0x520000 0x20000>; 384*b73660adSXianjun Jiao }; 385*b73660adSXianjun Jiao 386*b73660adSXianjun Jiao partition@540000 { 387*b73660adSXianjun Jiao label = "image"; 388*b73660adSXianjun Jiao reg = <0x540000 0xa80000>; 389*b73660adSXianjun Jiao }; 390*b73660adSXianjun Jiao 391*b73660adSXianjun Jiao partition@fc0000 { 392*b73660adSXianjun Jiao label = "spare"; 393*b73660adSXianjun Jiao reg = <0xfc0000 0x0>; 394*b73660adSXianjun Jiao }; 395*b73660adSXianjun Jiao }; 396*b73660adSXianjun Jiao }; 397*b73660adSXianjun Jiao 398*b73660adSXianjun Jiao memory-controller@e000e000 { 399*b73660adSXianjun Jiao #address-cells = <0x1>; 400*b73660adSXianjun Jiao #size-cells = <0x1>; 401*b73660adSXianjun Jiao status = "disabled"; 402*b73660adSXianjun Jiao clock-names = "memclk", "aclk"; 403*b73660adSXianjun Jiao clocks = <0x2 0xb 0x2 0x2c>; 404*b73660adSXianjun Jiao compatible = "arm,pl353-smc-r2p1"; 405*b73660adSXianjun Jiao interrupt-parent = <0x1>; 406*b73660adSXianjun Jiao interrupts = <0x0 0x12 0x4>; 407*b73660adSXianjun Jiao ranges; 408*b73660adSXianjun Jiao reg = <0xe000e000 0x1000>; 409*b73660adSXianjun Jiao 410*b73660adSXianjun Jiao flash@e1000000 { 411*b73660adSXianjun Jiao status = "disabled"; 412*b73660adSXianjun Jiao compatible = "arm,pl353-nand-r2p1"; 413*b73660adSXianjun Jiao reg = <0xe1000000 0x1000000>; 414*b73660adSXianjun Jiao #address-cells = <0x1>; 415*b73660adSXianjun Jiao #size-cells = <0x1>; 416*b73660adSXianjun Jiao }; 417*b73660adSXianjun Jiao 418*b73660adSXianjun Jiao flash@e2000000 { 419*b73660adSXianjun Jiao status = "disabled"; 420*b73660adSXianjun Jiao compatible = "cfi-flash"; 421*b73660adSXianjun Jiao reg = <0xe2000000 0x2000000>; 422*b73660adSXianjun Jiao #address-cells = <0x1>; 423*b73660adSXianjun Jiao #size-cells = <0x1>; 424*b73660adSXianjun Jiao }; 425*b73660adSXianjun Jiao }; 426*b73660adSXianjun Jiao 427*b73660adSXianjun Jiao ethernet@e000b000 { 428*b73660adSXianjun Jiao compatible = "cdns,zynq-gem", "cdns,gem"; 429*b73660adSXianjun Jiao reg = <0xe000b000 0x1000>; 430*b73660adSXianjun Jiao status = "okay"; 431*b73660adSXianjun Jiao interrupts = <0x0 0x16 0x4>; 432*b73660adSXianjun Jiao clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>; 433*b73660adSXianjun Jiao clock-names = "pclk", "hclk", "tx_clk"; 434*b73660adSXianjun Jiao #address-cells = <0x1>; 435*b73660adSXianjun Jiao #size-cells = <0x0>; 436*b73660adSXianjun Jiao phy-handle = <0x8>; 437*b73660adSXianjun Jiao phy-mode = "rgmii-id"; 438*b73660adSXianjun Jiao 439*b73660adSXianjun Jiao phy@0 { 440*b73660adSXianjun Jiao device_type = "ethernet-phy"; 441*b73660adSXianjun Jiao reg = <0x0>; 442*b73660adSXianjun Jiao marvell,reg-init = <0x3 0x10 0xff00 0x1e 0x3 0x11 0xfff0 0xa>; 443*b73660adSXianjun Jiao linux,phandle = <0x8>; 444*b73660adSXianjun Jiao phandle = <0x8>; 445*b73660adSXianjun Jiao }; 446*b73660adSXianjun Jiao }; 447*b73660adSXianjun Jiao 448*b73660adSXianjun Jiao ethernet@e000c000 { 449*b73660adSXianjun Jiao compatible = "cdns,zynq-gem", "cdns,gem"; 450*b73660adSXianjun Jiao reg = <0xe000c000 0x1000>; 451*b73660adSXianjun Jiao status = "disabled"; 452*b73660adSXianjun Jiao interrupts = <0x0 0x2d 0x4>; 453*b73660adSXianjun Jiao clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>; 454*b73660adSXianjun Jiao clock-names = "pclk", "hclk", "tx_clk"; 455*b73660adSXianjun Jiao #address-cells = <0x1>; 456*b73660adSXianjun Jiao #size-cells = <0x0>; 457*b73660adSXianjun Jiao }; 458*b73660adSXianjun Jiao 459*b73660adSXianjun Jiao sdhci@e0100000 { 460*b73660adSXianjun Jiao compatible = "arasan,sdhci-8.9a"; 461*b73660adSXianjun Jiao status = "okay"; 462*b73660adSXianjun Jiao clock-names = "clk_xin", "clk_ahb"; 463*b73660adSXianjun Jiao clocks = <0x2 0x15 0x2 0x20>; 464*b73660adSXianjun Jiao interrupt-parent = <0x1>; 465*b73660adSXianjun Jiao interrupts = <0x0 0x18 0x4>; 466*b73660adSXianjun Jiao reg = <0xe0100000 0x1000>; 467*b73660adSXianjun Jiao broken-adma2; 468*b73660adSXianjun Jiao }; 469*b73660adSXianjun Jiao 470*b73660adSXianjun Jiao sdhci@e0101000 { 471*b73660adSXianjun Jiao compatible = "arasan,sdhci-8.9a"; 472*b73660adSXianjun Jiao status = "disabled"; 473*b73660adSXianjun Jiao clock-names = "clk_xin", "clk_ahb"; 474*b73660adSXianjun Jiao clocks = <0x2 0x16 0x2 0x21>; 475*b73660adSXianjun Jiao interrupt-parent = <0x1>; 476*b73660adSXianjun Jiao interrupts = <0x0 0x2f 0x4>; 477*b73660adSXianjun Jiao reg = <0xe0101000 0x1000>; 478*b73660adSXianjun Jiao broken-adma2; 479*b73660adSXianjun Jiao }; 480*b73660adSXianjun Jiao 481*b73660adSXianjun Jiao slcr@f8000000 { 482*b73660adSXianjun Jiao #address-cells = <0x1>; 483*b73660adSXianjun Jiao #size-cells = <0x1>; 484*b73660adSXianjun Jiao compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; 485*b73660adSXianjun Jiao reg = <0xf8000000 0x1000>; 486*b73660adSXianjun Jiao ranges; 487*b73660adSXianjun Jiao linux,phandle = <0x9>; 488*b73660adSXianjun Jiao phandle = <0x9>; 489*b73660adSXianjun Jiao 490*b73660adSXianjun Jiao clkc@100 { 491*b73660adSXianjun Jiao #clock-cells = <0x1>; 492*b73660adSXianjun Jiao compatible = "xlnx,ps7-clkc"; 493*b73660adSXianjun Jiao fclk-enable = <0xf>; 494*b73660adSXianjun Jiao clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb"; 495*b73660adSXianjun Jiao reg = <0x100 0x100>; 496*b73660adSXianjun Jiao ps-clk-frequency = <0x1fca055>; 497*b73660adSXianjun Jiao linux,phandle = <0x2>; 498*b73660adSXianjun Jiao phandle = <0x2>; 499*b73660adSXianjun Jiao }; 500*b73660adSXianjun Jiao 501*b73660adSXianjun Jiao rstc@200 { 502*b73660adSXianjun Jiao compatible = "xlnx,zynq-reset"; 503*b73660adSXianjun Jiao reg = <0x200 0x48>; 504*b73660adSXianjun Jiao #reset-cells = <0x1>; 505*b73660adSXianjun Jiao syscon = <0x9>; 506*b73660adSXianjun Jiao }; 507*b73660adSXianjun Jiao 508*b73660adSXianjun Jiao pinctrl@700 { 509*b73660adSXianjun Jiao compatible = "xlnx,pinctrl-zynq"; 510*b73660adSXianjun Jiao reg = <0x700 0x200>; 511*b73660adSXianjun Jiao syscon = <0x9>; 512*b73660adSXianjun Jiao }; 513*b73660adSXianjun Jiao }; 514*b73660adSXianjun Jiao 515*b73660adSXianjun Jiao dmac@f8003000 { 516*b73660adSXianjun Jiao compatible = "arm,pl330", "arm,primecell"; 517*b73660adSXianjun Jiao reg = <0xf8003000 0x1000>; 518*b73660adSXianjun Jiao interrupt-parent = <0x1>; 519*b73660adSXianjun Jiao interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7"; 520*b73660adSXianjun Jiao interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>; 521*b73660adSXianjun Jiao #dma-cells = <0x1>; 522*b73660adSXianjun Jiao #dma-channels = <0x8>; 523*b73660adSXianjun Jiao #dma-requests = <0x4>; 524*b73660adSXianjun Jiao clocks = <0x2 0x1b>; 525*b73660adSXianjun Jiao clock-names = "apb_pclk"; 526*b73660adSXianjun Jiao linux,phandle = <0xf>; 527*b73660adSXianjun Jiao phandle = <0xf>; 528*b73660adSXianjun Jiao }; 529*b73660adSXianjun Jiao 530*b73660adSXianjun Jiao devcfg@f8007000 { 531*b73660adSXianjun Jiao compatible = "xlnx,zynq-devcfg-1.0"; 532*b73660adSXianjun Jiao interrupt-parent = <0x1>; 533*b73660adSXianjun Jiao interrupts = <0x0 0x8 0x4>; 534*b73660adSXianjun Jiao reg = <0xf8007000 0x100>; 535*b73660adSXianjun Jiao clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>; 536*b73660adSXianjun Jiao clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; 537*b73660adSXianjun Jiao syscon = <0x9>; 538*b73660adSXianjun Jiao linux,phandle = <0x4>; 539*b73660adSXianjun Jiao phandle = <0x4>; 540*b73660adSXianjun Jiao }; 541*b73660adSXianjun Jiao 542*b73660adSXianjun Jiao efuse@f800d000 { 543*b73660adSXianjun Jiao compatible = "xlnx,zynq-efuse"; 544*b73660adSXianjun Jiao reg = <0xf800d000 0x20>; 545*b73660adSXianjun Jiao }; 546*b73660adSXianjun Jiao 547*b73660adSXianjun Jiao timer@f8f00200 { 548*b73660adSXianjun Jiao compatible = "arm,cortex-a9-global-timer"; 549*b73660adSXianjun Jiao reg = <0xf8f00200 0x20>; 550*b73660adSXianjun Jiao interrupts = <0x1 0xb 0x301>; 551*b73660adSXianjun Jiao interrupt-parent = <0x1>; 552*b73660adSXianjun Jiao clocks = <0x2 0x4>; 553*b73660adSXianjun Jiao }; 554*b73660adSXianjun Jiao 555*b73660adSXianjun Jiao timer@f8001000 { 556*b73660adSXianjun Jiao interrupt-parent = <0x1>; 557*b73660adSXianjun Jiao interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>; 558*b73660adSXianjun Jiao compatible = "cdns,ttc"; 559*b73660adSXianjun Jiao clocks = <0x2 0x6>; 560*b73660adSXianjun Jiao reg = <0xf8001000 0x1000>; 561*b73660adSXianjun Jiao }; 562*b73660adSXianjun Jiao 563*b73660adSXianjun Jiao timer@f8002000 { 564*b73660adSXianjun Jiao interrupt-parent = <0x1>; 565*b73660adSXianjun Jiao interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>; 566*b73660adSXianjun Jiao compatible = "cdns,ttc"; 567*b73660adSXianjun Jiao clocks = <0x2 0x6>; 568*b73660adSXianjun Jiao reg = <0xf8002000 0x1000>; 569*b73660adSXianjun Jiao }; 570*b73660adSXianjun Jiao 571*b73660adSXianjun Jiao timer@f8f00600 { 572*b73660adSXianjun Jiao interrupt-parent = <0x1>; 573*b73660adSXianjun Jiao interrupts = <0x1 0xd 0x301>; 574*b73660adSXianjun Jiao compatible = "arm,cortex-a9-twd-timer"; 575*b73660adSXianjun Jiao reg = <0xf8f00600 0x20>; 576*b73660adSXianjun Jiao clocks = <0x2 0x4>; 577*b73660adSXianjun Jiao }; 578*b73660adSXianjun Jiao 579*b73660adSXianjun Jiao usb@e0002000 { 580*b73660adSXianjun Jiao compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 581*b73660adSXianjun Jiao status = "okay"; 582*b73660adSXianjun Jiao clocks = <0x2 0x1c>; 583*b73660adSXianjun Jiao interrupt-parent = <0x1>; 584*b73660adSXianjun Jiao interrupts = <0x0 0x15 0x4>; 585*b73660adSXianjun Jiao reg = <0xe0002000 0x1000>; 586*b73660adSXianjun Jiao phy_type = "ulpi"; 587*b73660adSXianjun Jiao dr_mode = "host"; 588*b73660adSXianjun Jiao xlnx,phy-reset-gpio = <0x6 0x55 0x0>; 589*b73660adSXianjun Jiao }; 590*b73660adSXianjun Jiao 591*b73660adSXianjun Jiao usb@e0003000 { 592*b73660adSXianjun Jiao compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 593*b73660adSXianjun Jiao status = "disabled"; 594*b73660adSXianjun Jiao clocks = <0x2 0x1d>; 595*b73660adSXianjun Jiao interrupt-parent = <0x1>; 596*b73660adSXianjun Jiao interrupts = <0x0 0x2c 0x4>; 597*b73660adSXianjun Jiao reg = <0xe0003000 0x1000>; 598*b73660adSXianjun Jiao phy_type = "ulpi"; 599*b73660adSXianjun Jiao }; 600*b73660adSXianjun Jiao 601*b73660adSXianjun Jiao watchdog@f8005000 { 602*b73660adSXianjun Jiao clocks = <0x2 0x2d>; 603*b73660adSXianjun Jiao compatible = "cdns,wdt-r1p2"; 604*b73660adSXianjun Jiao interrupt-parent = <0x1>; 605*b73660adSXianjun Jiao interrupts = <0x0 0x9 0x1>; 606*b73660adSXianjun Jiao reg = <0xf8005000 0x1000>; 607*b73660adSXianjun Jiao timeout-sec = <0xa>; 608*b73660adSXianjun Jiao }; 609*b73660adSXianjun Jiao }; 610*b73660adSXianjun Jiao 611*b73660adSXianjun Jiao aliases { 612*b73660adSXianjun Jiao ethernet0 = "/amba/ethernet@e000b000"; 613*b73660adSXianjun Jiao serial0 = "/amba/serial@e0001000"; 614*b73660adSXianjun Jiao }; 615*b73660adSXianjun Jiao 616*b73660adSXianjun Jiao memory { 617*b73660adSXianjun Jiao device_type = "memory"; 618*b73660adSXianjun Jiao reg = <0x0 0x20000000>; 619*b73660adSXianjun Jiao }; 620*b73660adSXianjun Jiao 621*b73660adSXianjun Jiao chosen { 622*b73660adSXianjun Jiao bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait"; 623*b73660adSXianjun Jiao linux,stdout-path = "/amba@0/uart@E0001000"; 624*b73660adSXianjun Jiao }; 625*b73660adSXianjun Jiao 626*b73660adSXianjun Jiao fpga-axi@0 { 627*b73660adSXianjun Jiao compatible = "simple-bus"; 628*b73660adSXianjun Jiao #address-cells = <0x1>; 629*b73660adSXianjun Jiao #size-cells = <0x1>; 630*b73660adSXianjun Jiao ranges; 631*b73660adSXianjun Jiao 632*b73660adSXianjun Jiao i2c@41600000 { 633*b73660adSXianjun Jiao compatible = "xlnx,axi-iic-1.01.b", "xlnx,xps-iic-2.00.a"; 634*b73660adSXianjun Jiao reg = <0x41600000 0x10000>; 635*b73660adSXianjun Jiao interrupt-parent = <0x1>; 636*b73660adSXianjun Jiao interrupts = <0x0 0x3a 0x4>; 637*b73660adSXianjun Jiao clocks = <0x2 0xf>; 638*b73660adSXianjun Jiao clock-names = "pclk"; 639*b73660adSXianjun Jiao #size-cells = <0x0>; 640*b73660adSXianjun Jiao #address-cells = <0x1>; 641*b73660adSXianjun Jiao 642*b73660adSXianjun Jiao adv7511@39 { 643*b73660adSXianjun Jiao compatible = "adi,adv7511"; 644*b73660adSXianjun Jiao reg = <0x39 0x3f>; 645*b73660adSXianjun Jiao reg-names = "primary", "edid"; 646*b73660adSXianjun Jiao adi,input-depth = <0x8>; 647*b73660adSXianjun Jiao adi,input-colorspace = "yuv422"; 648*b73660adSXianjun Jiao adi,input-clock = "1x"; 649*b73660adSXianjun Jiao adi,input-style = <0x1>; 650*b73660adSXianjun Jiao adi,input-justification = "right"; 651*b73660adSXianjun Jiao adi,clock-delay = <0x0>; 652*b73660adSXianjun Jiao #sound-dai-cells = <0x0>; 653*b73660adSXianjun Jiao linux,phandle = <0x14>; 654*b73660adSXianjun Jiao phandle = <0x14>; 655*b73660adSXianjun Jiao 656*b73660adSXianjun Jiao ports { 657*b73660adSXianjun Jiao #address-cells = <0x1>; 658*b73660adSXianjun Jiao #size-cells = <0x0>; 659*b73660adSXianjun Jiao 660*b73660adSXianjun Jiao port@0 { 661*b73660adSXianjun Jiao reg = <0x0>; 662*b73660adSXianjun Jiao 663*b73660adSXianjun Jiao endpoint { 664*b73660adSXianjun Jiao remote-endpoint = <0xa>; 665*b73660adSXianjun Jiao linux,phandle = <0xe>; 666*b73660adSXianjun Jiao phandle = <0xe>; 667*b73660adSXianjun Jiao }; 668*b73660adSXianjun Jiao }; 669*b73660adSXianjun Jiao 670*b73660adSXianjun Jiao port@1 { 671*b73660adSXianjun Jiao reg = <0x1>; 672*b73660adSXianjun Jiao }; 673*b73660adSXianjun Jiao }; 674*b73660adSXianjun Jiao }; 675*b73660adSXianjun Jiao 676*b73660adSXianjun Jiao adau1761@3b { 677*b73660adSXianjun Jiao compatible = "adi,adau1761"; 678*b73660adSXianjun Jiao reg = <0x3b>; 679*b73660adSXianjun Jiao clocks = <0xb>; 680*b73660adSXianjun Jiao clock-names = "mclk"; 681*b73660adSXianjun Jiao #sound-dai-cells = <0x0>; 682*b73660adSXianjun Jiao linux,phandle = <0x16>; 683*b73660adSXianjun Jiao phandle = <0x16>; 684*b73660adSXianjun Jiao }; 685*b73660adSXianjun Jiao }; 686*b73660adSXianjun Jiao 687*b73660adSXianjun Jiao/* 688*b73660adSXianjun Jiao axivdma@43000000 { 689*b73660adSXianjun Jiao compatible = "xlnx,axi-vdma-1.00.a"; 690*b73660adSXianjun Jiao #address-cells = <0x1>; 691*b73660adSXianjun Jiao #size-cells = <0x1>; 692*b73660adSXianjun Jiao #dma-cells = <0x1>; 693*b73660adSXianjun Jiao #dma-channels = <0x1>; 694*b73660adSXianjun Jiao reg = <0x43000000 0x1000>; 695*b73660adSXianjun Jiao xlnx,num-fstores = <0x3>; 696*b73660adSXianjun Jiao linux,phandle = <0xc>; 697*b73660adSXianjun Jiao phandle = <0xc>; 698*b73660adSXianjun Jiao 699*b73660adSXianjun Jiao dma-channel@43000000 { 700*b73660adSXianjun Jiao compatible = "xlnx,axi-vdma-mm2s-channel"; 701*b73660adSXianjun Jiao interrupts = <0x0 0x3b 0x4>; 702*b73660adSXianjun Jiao xlnx,datawidth = <0x40>; 703*b73660adSXianjun Jiao xlnx,genlock-mode = <0x0>; 704*b73660adSXianjun Jiao xlnx,include-dre = <0x0>; 705*b73660adSXianjun Jiao }; 706*b73660adSXianjun Jiao }; 707*b73660adSXianjun Jiao 708*b73660adSXianjun Jiao axi-clkgen@79000000 { 709*b73660adSXianjun Jiao compatible = "adi,axi-clkgen-2.00.a"; 710*b73660adSXianjun Jiao reg = <0x79000000 0x10000>; 711*b73660adSXianjun Jiao #clock-cells = <0x0>; 712*b73660adSXianjun Jiao clocks = <0x2 0x10>; 713*b73660adSXianjun Jiao linux,phandle = <0xd>; 714*b73660adSXianjun Jiao phandle = <0xd>; 715*b73660adSXianjun Jiao }; 716*b73660adSXianjun Jiao 717*b73660adSXianjun Jiao axi_hdmi@70e00000 { 718*b73660adSXianjun Jiao compatible = "adi,axi-hdmi-tx-1.00.a"; 719*b73660adSXianjun Jiao reg = <0x70e00000 0x10000>; 720*b73660adSXianjun Jiao dmas = <0xc 0x0>; 721*b73660adSXianjun Jiao dma-names = "video"; 722*b73660adSXianjun Jiao clocks = <0xd>; 723*b73660adSXianjun Jiao 724*b73660adSXianjun Jiao port { 725*b73660adSXianjun Jiao 726*b73660adSXianjun Jiao endpoint { 727*b73660adSXianjun Jiao remote-endpoint = <0xe>; 728*b73660adSXianjun Jiao linux,phandle = <0xa>; 729*b73660adSXianjun Jiao phandle = <0xa>; 730*b73660adSXianjun Jiao }; 731*b73660adSXianjun Jiao }; 732*b73660adSXianjun Jiao }; 733*b73660adSXianjun Jiao 734*b73660adSXianjun Jiao axi-spdif-tx@75c00000 { 735*b73660adSXianjun Jiao compatible = "adi,axi-spdif-tx-1.00.a"; 736*b73660adSXianjun Jiao reg = <0x75c00000 0x1000>; 737*b73660adSXianjun Jiao dmas = <0xf 0x0>; 738*b73660adSXianjun Jiao dma-names = "tx"; 739*b73660adSXianjun Jiao clocks = <0x2 0xf 0xb>; 740*b73660adSXianjun Jiao clock-names = "axi", "ref"; 741*b73660adSXianjun Jiao #sound-dai-cells = <0x0>; 742*b73660adSXianjun Jiao linux,phandle = <0x13>; 743*b73660adSXianjun Jiao phandle = <0x13>; 744*b73660adSXianjun Jiao }; 745*b73660adSXianjun Jiao*/ 746*b73660adSXianjun Jiao 747*b73660adSXianjun Jiao axi-i2s@77600000 { 748*b73660adSXianjun Jiao compatible = "adi,axi-i2s-1.00.a"; 749*b73660adSXianjun Jiao reg = <0x77600000 0x1000>; 750*b73660adSXianjun Jiao dmas = <0xf 0x1 0xf 0x2>; 751*b73660adSXianjun Jiao dma-names = "tx", "rx"; 752*b73660adSXianjun Jiao clocks = <0x2 0xf 0xb>; 753*b73660adSXianjun Jiao clock-names = "axi", "ref"; 754*b73660adSXianjun Jiao #sound-dai-cells = <0x0>; 755*b73660adSXianjun Jiao linux,phandle = <0x15>; 756*b73660adSXianjun Jiao phandle = <0x15>; 757*b73660adSXianjun Jiao }; 758*b73660adSXianjun Jiao 759*b73660adSXianjun Jiao i2c@41620000 { 760*b73660adSXianjun Jiao compatible = "xlnx,axi-iic-1.01.b", "xlnx,xps-iic-2.00.a"; 761*b73660adSXianjun Jiao reg = <0x41620000 0x10000>; 762*b73660adSXianjun Jiao interrupt-parent = <0x1>; 763*b73660adSXianjun Jiao interrupts = <0x0 0x37 0x4>; 764*b73660adSXianjun Jiao clocks = <0x2 0xf>; 765*b73660adSXianjun Jiao clock-names = "pclk"; 766*b73660adSXianjun Jiao #size-cells = <0x0>; 767*b73660adSXianjun Jiao #address-cells = <0x1>; 768*b73660adSXianjun Jiao 769*b73660adSXianjun Jiao ad7291@2f { 770*b73660adSXianjun Jiao compatible = "adi,ad7291"; 771*b73660adSXianjun Jiao reg = <0x2f>; 772*b73660adSXianjun Jiao }; 773*b73660adSXianjun Jiao 774*b73660adSXianjun Jiao eeprom@50 { 775*b73660adSXianjun Jiao compatible = "at24,24c02"; 776*b73660adSXianjun Jiao reg = <0x50>; 777*b73660adSXianjun Jiao }; 778*b73660adSXianjun Jiao }; 779*b73660adSXianjun Jiao 780*b73660adSXianjun Jiao dma@7c400000 { 781*b73660adSXianjun Jiao compatible = "adi,axi-dmac-1.00.a"; 782*b73660adSXianjun Jiao reg = <0x7c400000 0x10000>; 783*b73660adSXianjun Jiao #dma-cells = <0x1>; 784*b73660adSXianjun Jiao interrupts = <0x0 0x39 0x0>; 785*b73660adSXianjun Jiao clocks = <0x2 0x10>; 786*b73660adSXianjun Jiao linux,phandle = <0x10>; 787*b73660adSXianjun Jiao phandle = <0x10>; 788*b73660adSXianjun Jiao 789*b73660adSXianjun Jiao adi,channels { 790*b73660adSXianjun Jiao #size-cells = <0x0>; 791*b73660adSXianjun Jiao #address-cells = <0x1>; 792*b73660adSXianjun Jiao 793*b73660adSXianjun Jiao dma-channel@0 { 794*b73660adSXianjun Jiao reg = <0x0>; 795*b73660adSXianjun Jiao adi,source-bus-width = <0x40>; 796*b73660adSXianjun Jiao adi,source-bus-type = <0x2>; 797*b73660adSXianjun Jiao adi,destination-bus-width = <0x40>; 798*b73660adSXianjun Jiao adi,destination-bus-type = <0x0>; 799*b73660adSXianjun Jiao adi,length-width = <0x18>; 800*b73660adSXianjun Jiao }; 801*b73660adSXianjun Jiao }; 802*b73660adSXianjun Jiao }; 803*b73660adSXianjun Jiao 804*b73660adSXianjun Jiao dma@7c420000 { 805*b73660adSXianjun Jiao compatible = "adi,axi-dmac-1.00.a"; 806*b73660adSXianjun Jiao reg = <0x7c420000 0x10000>; 807*b73660adSXianjun Jiao #dma-cells = <0x1>; 808*b73660adSXianjun Jiao interrupts = <0x0 0x38 0x0>; 809*b73660adSXianjun Jiao clocks = <0x2 0x10>; 810*b73660adSXianjun Jiao linux,phandle = <0x12>; 811*b73660adSXianjun Jiao phandle = <0x12>; 812*b73660adSXianjun Jiao 813*b73660adSXianjun Jiao adi,channels { 814*b73660adSXianjun Jiao #size-cells = <0x0>; 815*b73660adSXianjun Jiao #address-cells = <0x1>; 816*b73660adSXianjun Jiao 817*b73660adSXianjun Jiao dma-channel@0 { 818*b73660adSXianjun Jiao reg = <0x0>; 819*b73660adSXianjun Jiao adi,source-bus-width = <0x40>; 820*b73660adSXianjun Jiao adi,source-bus-type = <0x0>; 821*b73660adSXianjun Jiao adi,destination-bus-width = <0x40>; 822*b73660adSXianjun Jiao adi,destination-bus-type = <0x2>; 823*b73660adSXianjun Jiao adi,length-width = <0x18>; 824*b73660adSXianjun Jiao adi,cyclic; 825*b73660adSXianjun Jiao }; 826*b73660adSXianjun Jiao }; 827*b73660adSXianjun Jiao }; 828*b73660adSXianjun Jiao 829*b73660adSXianjun Jiao sdr: sdr { 830*b73660adSXianjun Jiao compatible ="sdr,sdr"; 831*b73660adSXianjun Jiao dmas = <&rx_dma 0 832*b73660adSXianjun Jiao &rx_dma 1 833*b73660adSXianjun Jiao &tx_dma 0 834*b73660adSXianjun Jiao &tx_dma 1>; 835*b73660adSXianjun Jiao dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm"; 836*b73660adSXianjun Jiao interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1"; 837*b73660adSXianjun Jiao interrupt-parent = <1>; 838*b73660adSXianjun Jiao interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>; 839*b73660adSXianjun Jiao } ; 840*b73660adSXianjun Jiao 841*b73660adSXianjun Jiao axidmatest_1: axidmatest@1 { 842*b73660adSXianjun Jiao compatible ="xlnx,axi-dma-test-1.00.a"; 843*b73660adSXianjun Jiao dmas = <&rx_dma 0 844*b73660adSXianjun Jiao &rx_dma 1>; 845*b73660adSXianjun Jiao dma-names = "axidma0", "axidma1"; 846*b73660adSXianjun Jiao } ; 847*b73660adSXianjun Jiao 848*b73660adSXianjun Jiao tx_dma: dma@80400000 { 849*b73660adSXianjun Jiao #dma-cells = <1>; 850*b73660adSXianjun Jiao clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 851*b73660adSXianjun Jiao clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 852*b73660adSXianjun Jiao compatible = "xlnx,axi-dma-1.00.a"; 853*b73660adSXianjun Jiao interrupt-names = "mm2s_introut", "s2mm_introut"; 854*b73660adSXianjun Jiao interrupt-parent = <1>; 855*b73660adSXianjun Jiao interrupts = <0 35 4 0 36 4>; 856*b73660adSXianjun Jiao reg = <0x80400000 0x10000>; 857*b73660adSXianjun Jiao xlnx,addrwidth = <0x20>; 858*b73660adSXianjun Jiao xlnx,include-sg ; 859*b73660adSXianjun Jiao xlnx,sg-length-width = <0xe>; 860*b73660adSXianjun Jiao dma-channel@80400000 { 861*b73660adSXianjun Jiao compatible = "xlnx,axi-dma-mm2s-channel"; 862*b73660adSXianjun Jiao dma-channels = <0x1>; 863*b73660adSXianjun Jiao interrupts = <0 35 4>; 864*b73660adSXianjun Jiao xlnx,datawidth = <0x40>; 865*b73660adSXianjun Jiao xlnx,device-id = <0x0>; 866*b73660adSXianjun Jiao }; 867*b73660adSXianjun Jiao dma-channel@80400030 { 868*b73660adSXianjun Jiao compatible = "xlnx,axi-dma-s2mm-channel"; 869*b73660adSXianjun Jiao dma-channels = <0x1>; 870*b73660adSXianjun Jiao interrupts = <0 36 4>; 871*b73660adSXianjun Jiao xlnx,datawidth = <0x40>; 872*b73660adSXianjun Jiao xlnx,device-id = <0x0>; 873*b73660adSXianjun Jiao }; 874*b73660adSXianjun Jiao }; 875*b73660adSXianjun Jiao 876*b73660adSXianjun Jiao rx_dma: dma@80410000 { 877*b73660adSXianjun Jiao #dma-cells = <1>; 878*b73660adSXianjun Jiao clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 879*b73660adSXianjun Jiao clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 880*b73660adSXianjun Jiao compatible = "xlnx,axi-dma-1.00.a"; 881*b73660adSXianjun Jiao //dma-coherent ; 882*b73660adSXianjun Jiao interrupt-names = "mm2s_introut", "s2mm_introut"; 883*b73660adSXianjun Jiao interrupt-parent = <1>; 884*b73660adSXianjun Jiao interrupts = <0 31 4 0 32 4>; 885*b73660adSXianjun Jiao reg = <0x80410000 0x10000>; 886*b73660adSXianjun Jiao xlnx,addrwidth = <0x20>; 887*b73660adSXianjun Jiao xlnx,include-sg ; 888*b73660adSXianjun Jiao xlnx,sg-length-width = <0xe>; 889*b73660adSXianjun Jiao dma-channel@80410000 { 890*b73660adSXianjun Jiao compatible = "xlnx,axi-dma-mm2s-channel"; 891*b73660adSXianjun Jiao dma-channels = <0x1>; 892*b73660adSXianjun Jiao interrupts = <0 31 4>; 893*b73660adSXianjun Jiao xlnx,datawidth = <0x40>; 894*b73660adSXianjun Jiao xlnx,device-id = <0x1>; 895*b73660adSXianjun Jiao }; 896*b73660adSXianjun Jiao dma-channel@80410030 { 897*b73660adSXianjun Jiao compatible = "xlnx,axi-dma-s2mm-channel"; 898*b73660adSXianjun Jiao dma-channels = <0x1>; 899*b73660adSXianjun Jiao interrupts = <0 32 4>; 900*b73660adSXianjun Jiao xlnx,datawidth = <0x40>; 901*b73660adSXianjun Jiao xlnx,device-id = <0x1>; 902*b73660adSXianjun Jiao }; 903*b73660adSXianjun Jiao }; 904*b73660adSXianjun Jiao 905*b73660adSXianjun Jiao tx_intf_0: tx_intf@83c00000 { 906*b73660adSXianjun Jiao clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk"; 907*b73660adSXianjun Jiao clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 908*b73660adSXianjun Jiao compatible = "sdr,tx_intf"; 909*b73660adSXianjun Jiao interrupt-names = "tx_itrpt0", "tx_itrpt1"; 910*b73660adSXianjun Jiao interrupt-parent = <1>; 911*b73660adSXianjun Jiao interrupts = <0 33 1 0 34 1>; 912*b73660adSXianjun Jiao reg = <0x83c00000 0x10000>; 913*b73660adSXianjun Jiao xlnx,s00-axi-addr-width = <0x7>; 914*b73660adSXianjun Jiao xlnx,s00-axi-data-width = <0x20>; 915*b73660adSXianjun Jiao }; 916*b73660adSXianjun Jiao 917*b73660adSXianjun Jiao rx_intf_0: rx_intf@83c20000 { 918*b73660adSXianjun Jiao clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk"; 919*b73660adSXianjun Jiao clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 920*b73660adSXianjun Jiao compatible = "sdr,rx_intf"; 921*b73660adSXianjun Jiao interrupt-names = "not_valid_anymore", "rx_pkt_intr"; 922*b73660adSXianjun Jiao interrupt-parent = <1>; 923*b73660adSXianjun Jiao interrupts = <0 29 1 0 30 1>; 924*b73660adSXianjun Jiao reg = <0x83c20000 0x10000>; 925*b73660adSXianjun Jiao xlnx,s00-axi-addr-width = <0x7>; 926*b73660adSXianjun Jiao xlnx,s00-axi-data-width = <0x20>; 927*b73660adSXianjun Jiao }; 928*b73660adSXianjun Jiao 929*b73660adSXianjun Jiao openofdm_tx_0: openofdm_tx@83c10000 { 930*b73660adSXianjun Jiao clock-names = "clk"; 931*b73660adSXianjun Jiao clocks = <0x2 0x11>; 932*b73660adSXianjun Jiao compatible = "sdr,openofdm_tx"; 933*b73660adSXianjun Jiao reg = <0x83c10000 0x10000>; 934*b73660adSXianjun Jiao }; 935*b73660adSXianjun Jiao 936*b73660adSXianjun Jiao openofdm_rx_0: openofdm_rx@83c30000 { 937*b73660adSXianjun Jiao clock-names = "clk"; 938*b73660adSXianjun Jiao clocks = <0x2 0x11>; 939*b73660adSXianjun Jiao compatible = "sdr,openofdm_rx"; 940*b73660adSXianjun Jiao reg = <0x83c30000 0x10000>; 941*b73660adSXianjun Jiao }; 942*b73660adSXianjun Jiao 943*b73660adSXianjun Jiao xpu_0: xpu@83c40000 { 944*b73660adSXianjun Jiao clock-names = "s00_axi_aclk"; 945*b73660adSXianjun Jiao clocks = <0x2 0x11>; 946*b73660adSXianjun Jiao compatible = "sdr,xpu"; 947*b73660adSXianjun Jiao reg = <0x83c40000 0x10000>; 948*b73660adSXianjun Jiao }; 949*b73660adSXianjun Jiao 950*b73660adSXianjun Jiao cf-ad9361-lpc@79020000 { 951*b73660adSXianjun Jiao compatible = "adi,axi-ad9361-6.00.a"; 952*b73660adSXianjun Jiao reg = <0x79020000 0x6000>; 953*b73660adSXianjun Jiao dmas = <0x10 0x0>; 954*b73660adSXianjun Jiao dma-names = "rx"; 955*b73660adSXianjun Jiao spibus-connected = <0x11>; 956*b73660adSXianjun Jiao }; 957*b73660adSXianjun Jiao 958*b73660adSXianjun Jiao cf-ad9361-dds-core-lpc@79024000 { 959*b73660adSXianjun Jiao compatible = "adi,axi-ad9361-dds-6.00.a"; 960*b73660adSXianjun Jiao reg = <0x79024000 0x1000>; 961*b73660adSXianjun Jiao clocks = <0x11 0xd>; 962*b73660adSXianjun Jiao clock-names = "sampl_clk"; 963*b73660adSXianjun Jiao dmas = <0x12 0x0>; 964*b73660adSXianjun Jiao dma-names = "tx"; 965*b73660adSXianjun Jiao }; 966*b73660adSXianjun Jiao }; 967*b73660adSXianjun Jiao 968*b73660adSXianjun Jiao/* 969*b73660adSXianjun Jiao audio_clock { 970*b73660adSXianjun Jiao compatible = "fixed-clock"; 971*b73660adSXianjun Jiao #clock-cells = <0x0>; 972*b73660adSXianjun Jiao clock-frequency = <0xbb8000>; 973*b73660adSXianjun Jiao linux,phandle = <0xb>; 974*b73660adSXianjun Jiao phandle = <0xb>; 975*b73660adSXianjun Jiao }; 976*b73660adSXianjun Jiao 977*b73660adSXianjun Jiao adv7511_hdmi_snd { 978*b73660adSXianjun Jiao compatible = "simple-audio-card"; 979*b73660adSXianjun Jiao simple-audio-card,name = "HDMI monitor"; 980*b73660adSXianjun Jiao simple-audio-card,widgets = "Speaker", "Speaker"; 981*b73660adSXianjun Jiao simple-audio-card,routing = "Speaker", "TX"; 982*b73660adSXianjun Jiao 983*b73660adSXianjun Jiao simple-audio-card,dai-link@0 { 984*b73660adSXianjun Jiao format = "spdif"; 985*b73660adSXianjun Jiao 986*b73660adSXianjun Jiao cpu { 987*b73660adSXianjun Jiao sound-dai = <0x13>; 988*b73660adSXianjun Jiao frame-master; 989*b73660adSXianjun Jiao bitclock-master; 990*b73660adSXianjun Jiao }; 991*b73660adSXianjun Jiao 992*b73660adSXianjun Jiao codec { 993*b73660adSXianjun Jiao sound-dai = <0x14>; 994*b73660adSXianjun Jiao }; 995*b73660adSXianjun Jiao }; 996*b73660adSXianjun Jiao }; 997*b73660adSXianjun Jiao 998*b73660adSXianjun Jiao zed_sound { 999*b73660adSXianjun Jiao compatible = "simple-audio-card"; 1000*b73660adSXianjun Jiao simple-audio-card,name = "ZED ADAU1761"; 1001*b73660adSXianjun Jiao simple-audio-card,widgets = "Microphone", "Mic In", "Headphone", "Headphone Out", "Line", "Line In", "Line", "Line Out"; 1002*b73660adSXianjun Jiao simple-audio-card,routing = "Line Out", "LOUT", "Line Out", "ROUT", "Headphone Out", "LHP", "Headphone Out", "RHP", "Mic In", "MICBIAS", "LINN", "Mic In", "RINN", "Mic In", "LAUX", "Line In", "RAUX", "Line In"; 1003*b73660adSXianjun Jiao 1004*b73660adSXianjun Jiao simple-audio-card,dai-link@0 { 1005*b73660adSXianjun Jiao format = "i2s"; 1006*b73660adSXianjun Jiao 1007*b73660adSXianjun Jiao cpu { 1008*b73660adSXianjun Jiao sound-dai = <0x15>; 1009*b73660adSXianjun Jiao frame-master; 1010*b73660adSXianjun Jiao bitclock-master; 1011*b73660adSXianjun Jiao }; 1012*b73660adSXianjun Jiao 1013*b73660adSXianjun Jiao codec { 1014*b73660adSXianjun Jiao sound-dai = <0x16>; 1015*b73660adSXianjun Jiao }; 1016*b73660adSXianjun Jiao }; 1017*b73660adSXianjun Jiao }; 1018*b73660adSXianjun Jiao*/ 1019*b73660adSXianjun Jiao 1020*b73660adSXianjun Jiao leds { 1021*b73660adSXianjun Jiao compatible = "gpio-leds"; 1022*b73660adSXianjun Jiao 1023*b73660adSXianjun Jiao ld0 { 1024*b73660adSXianjun Jiao label = "ld0:red"; 1025*b73660adSXianjun Jiao gpios = <0x6 0x49 0x0>; 1026*b73660adSXianjun Jiao }; 1027*b73660adSXianjun Jiao 1028*b73660adSXianjun Jiao ld1 { 1029*b73660adSXianjun Jiao label = "ld1:red"; 1030*b73660adSXianjun Jiao gpios = <0x6 0x4a 0x0>; 1031*b73660adSXianjun Jiao }; 1032*b73660adSXianjun Jiao 1033*b73660adSXianjun Jiao ld2 { 1034*b73660adSXianjun Jiao label = "ld2:red"; 1035*b73660adSXianjun Jiao gpios = <0x6 0x4b 0x0>; 1036*b73660adSXianjun Jiao }; 1037*b73660adSXianjun Jiao 1038*b73660adSXianjun Jiao ld3 { 1039*b73660adSXianjun Jiao label = "ld3:red"; 1040*b73660adSXianjun Jiao gpios = <0x6 0x4c 0x0>; 1041*b73660adSXianjun Jiao }; 1042*b73660adSXianjun Jiao 1043*b73660adSXianjun Jiao ld4 { 1044*b73660adSXianjun Jiao label = "ld4:red"; 1045*b73660adSXianjun Jiao gpios = <0x6 0x4d 0x0>; 1046*b73660adSXianjun Jiao }; 1047*b73660adSXianjun Jiao 1048*b73660adSXianjun Jiao ld5 { 1049*b73660adSXianjun Jiao label = "ld5:red"; 1050*b73660adSXianjun Jiao gpios = <0x6 0x4e 0x0>; 1051*b73660adSXianjun Jiao }; 1052*b73660adSXianjun Jiao 1053*b73660adSXianjun Jiao ld6 { 1054*b73660adSXianjun Jiao label = "ld6:red"; 1055*b73660adSXianjun Jiao gpios = <0x6 0x4f 0x0>; 1056*b73660adSXianjun Jiao }; 1057*b73660adSXianjun Jiao 1058*b73660adSXianjun Jiao ld7 { 1059*b73660adSXianjun Jiao label = "ld7:red"; 1060*b73660adSXianjun Jiao gpios = <0x6 0x50 0x0>; 1061*b73660adSXianjun Jiao }; 1062*b73660adSXianjun Jiao }; 1063*b73660adSXianjun Jiao 1064*b73660adSXianjun Jiao clocks { 1065*b73660adSXianjun Jiao 1066*b73660adSXianjun Jiao clock@0 { 1067*b73660adSXianjun Jiao #clock-cells = <0x0>; 1068*b73660adSXianjun Jiao compatible = "fixed-clock"; 1069*b73660adSXianjun Jiao clock-frequency = <0x2625a00>; 1070*b73660adSXianjun Jiao clock-output-names = "ad9361_ext_refclk"; 1071*b73660adSXianjun Jiao linux,phandle = <0x5>; 1072*b73660adSXianjun Jiao phandle = <0x5>; 1073*b73660adSXianjun Jiao }; 1074*b73660adSXianjun Jiao 1075*b73660adSXianjun Jiao clock@1 { 1076*b73660adSXianjun Jiao #clock-cells = <0x0>; 1077*b73660adSXianjun Jiao compatible = "fixed-clock"; 1078*b73660adSXianjun Jiao clock-frequency = <0x17d7840>; 1079*b73660adSXianjun Jiao clock-output-names = "refclk"; 1080*b73660adSXianjun Jiao linux,phandle = <0x7>; 1081*b73660adSXianjun Jiao phandle = <0x7>; 1082*b73660adSXianjun Jiao }; 1083*b73660adSXianjun Jiao }; 1084*b73660adSXianjun Jiao}; 1085