1/dts-v1/; 2 3/ { 4 #address-cells = <0x1>; 5 #size-cells = <0x1>; 6 compatible = "xlnx,zynq-7000"; 7 interrupt-parent = <0x1>; 8 model = "Xilinx Zynq ZC706"; 9 10 cpus { 11 #address-cells = <0x1>; 12 #size-cells = <0x0>; 13 14 cpu@0 { 15 compatible = "arm,cortex-a9"; 16 device_type = "cpu"; 17 reg = <0x0>; 18 clocks = <0x2 0x3>; 19 clock-latency = <0x3e8>; 20 cpu0-supply = <0x3>; 21 operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>; 22 }; 23 24 cpu@1 { 25 compatible = "arm,cortex-a9"; 26 device_type = "cpu"; 27 reg = <0x1>; 28 clocks = <0x2 0x3>; 29 }; 30 }; 31 32 fpga-full { 33 compatible = "fpga-region"; 34 fpga-mgr = <0x4>; 35 #address-cells = <0x1>; 36 #size-cells = <0x1>; 37 ranges; 38 }; 39 40 pmu@f8891000 { 41 compatible = "arm,cortex-a9-pmu"; 42 interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>; 43 interrupt-parent = <0x1>; 44 reg = <0xf8891000 0x1000 0xf8893000 0x1000>; 45 }; 46 47 fixedregulator { 48 compatible = "regulator-fixed"; 49 regulator-name = "VCCPINT"; 50 regulator-min-microvolt = <0xf4240>; 51 regulator-max-microvolt = <0xf4240>; 52 regulator-boot-on; 53 regulator-always-on; 54 linux,phandle = <0x3>; 55 phandle = <0x3>; 56 }; 57 58 amba { 59 u-boot,dm-pre-reloc; 60 compatible = "simple-bus"; 61 #address-cells = <0x1>; 62 #size-cells = <0x1>; 63 interrupt-parent = <0x1>; 64 ranges; 65 66 adc@f8007100 { 67 compatible = "xlnx,zynq-xadc-1.00.a"; 68 reg = <0xf8007100 0x20>; 69 interrupts = <0x0 0x7 0x4>; 70 interrupt-parent = <0x1>; 71 clocks = <0x2 0xc>; 72 }; 73 74 can@e0008000 { 75 compatible = "xlnx,zynq-can-1.0"; 76 status = "disabled"; 77 clocks = <0x2 0x13 0x2 0x24>; 78 clock-names = "can_clk", "pclk"; 79 reg = <0xe0008000 0x1000>; 80 interrupts = <0x0 0x1c 0x4>; 81 interrupt-parent = <0x1>; 82 tx-fifo-depth = <0x40>; 83 rx-fifo-depth = <0x40>; 84 }; 85 86 can@e0009000 { 87 compatible = "xlnx,zynq-can-1.0"; 88 status = "disabled"; 89 clocks = <0x2 0x14 0x2 0x25>; 90 clock-names = "can_clk", "pclk"; 91 reg = <0xe0009000 0x1000>; 92 interrupts = <0x0 0x33 0x4>; 93 interrupt-parent = <0x1>; 94 tx-fifo-depth = <0x40>; 95 rx-fifo-depth = <0x40>; 96 }; 97 98 gpio@e000a000 { 99 compatible = "xlnx,zynq-gpio-1.0"; 100 #gpio-cells = <0x2>; 101 clocks = <0x2 0x2a>; 102 gpio-controller; 103 interrupt-controller; 104 #interrupt-cells = <0x2>; 105 interrupt-parent = <0x1>; 106 interrupts = <0x0 0x14 0x4>; 107 reg = <0xe000a000 0x1000>; 108 linux,phandle = <0x6>; 109 phandle = <0x6>; 110 }; 111 112 i2c@e0004000 { 113 compatible = "cdns,i2c-r1p10"; 114 status = "disabled"; 115 clocks = <0x2 0x26>; 116 interrupt-parent = <0x1>; 117 interrupts = <0x0 0x19 0x4>; 118 reg = <0xe0004000 0x1000>; 119 #address-cells = <0x1>; 120 #size-cells = <0x0>; 121 }; 122 123 i2c@e0005000 { 124 compatible = "cdns,i2c-r1p10"; 125 status = "disabled"; 126 clocks = <0x2 0x27>; 127 interrupt-parent = <0x1>; 128 interrupts = <0x0 0x30 0x4>; 129 reg = <0xe0005000 0x1000>; 130 #address-cells = <0x1>; 131 #size-cells = <0x0>; 132 }; 133 134 interrupt-controller@f8f01000 { 135 compatible = "arm,cortex-a9-gic"; 136 #interrupt-cells = <0x3>; 137 interrupt-controller; 138 reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; 139 linux,phandle = <0x1>; 140 phandle = <0x1>; 141 }; 142 143 cache-controller@f8f02000 { 144 compatible = "arm,pl310-cache"; 145 reg = <0xf8f02000 0x1000>; 146 interrupts = <0x0 0x2 0x4>; 147 arm,data-latency = <0x3 0x2 0x2>; 148 arm,tag-latency = <0x2 0x2 0x2>; 149 cache-unified; 150 cache-level = <0x2>; 151 }; 152 153 memory-controller@f8006000 { 154 compatible = "xlnx,zynq-ddrc-a05"; 155 reg = <0xf8006000 0x1000>; 156 }; 157 158 ocmc@f800c000 { 159 compatible = "xlnx,zynq-ocmc-1.0"; 160 interrupt-parent = <0x1>; 161 interrupts = <0x0 0x3 0x4>; 162 reg = <0xf800c000 0x1000>; 163 }; 164 165 serial@e0000000 { 166 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 167 status = "disabled"; 168 clocks = <0x2 0x17 0x2 0x28>; 169 clock-names = "uart_clk", "pclk"; 170 reg = <0xe0000000 0x1000>; 171 interrupts = <0x0 0x1b 0x4>; 172 }; 173 174 serial@e0001000 { 175 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 176 status = "okay"; 177 clocks = <0x2 0x18 0x2 0x29>; 178 clock-names = "uart_clk", "pclk"; 179 reg = <0xe0001000 0x1000>; 180 interrupts = <0x0 0x32 0x4>; 181 }; 182 183 spi@e0006000 { 184 compatible = "xlnx,zynq-spi-r1p6"; 185 reg = <0xe0006000 0x1000>; 186 status = "okay"; 187 interrupt-parent = <0x1>; 188 interrupts = <0x0 0x1a 0x4>; 189 clocks = <0x2 0x19 0x2 0x22>; 190 clock-names = "ref_clk", "pclk"; 191 #address-cells = <0x1>; 192 #size-cells = <0x0>; 193 194 ad9361-phy@0 { 195 #address-cells = <0x1>; 196 #size-cells = <0x0>; 197 #clock-cells = <0x1>; 198 compatible = "adi,ad9361"; 199 reg = <0x0>; 200 spi-cpha; 201 spi-max-frequency = <0x989680>; 202 clocks = <0x5 0x0>; 203 clock-names = "ad9361_ext_refclk"; 204 clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; 205 adi,digital-interface-tune-skip-mode = <0x0>; 206 adi,pp-tx-swap-enable; 207 adi,pp-rx-swap-enable; 208 adi,rx-frame-pulse-mode-enable; 209 adi,lvds-mode-enable; 210 adi,lvds-bias-mV = <0x96>; 211 adi,lvds-rx-onchip-termination-enable; 212 adi,rx-data-delay = <0x4>; 213 adi,tx-fb-clock-delay = <0x7>; 214 adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>; 215 adi,2rx-2tx-mode-enable; 216 adi,frequency-division-duplex-mode-enable; 217 adi,rx-rf-port-input-select = <0x0>; 218 adi,tx-rf-port-input-select = <0x0>; 219 adi,tx-attenuation-mdB = <0x2710>; 220 adi,rf-rx-bandwidth-hz = <0x112a880>; 221 adi,rf-tx-bandwidth-hz = <0x112a880>; 222 adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; 223 adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>; 224 adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 225 adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 226 adi,gc-rx1-mode = <0x2>; 227 adi,gc-rx2-mode = <0x2>; 228 adi,gc-adc-ovr-sample-size = <0x4>; 229 adi,gc-adc-small-overload-thresh = <0x2f>; 230 adi,gc-adc-large-overload-thresh = <0x3a>; 231 adi,gc-lmt-overload-high-thresh = <0x320>; 232 adi,gc-lmt-overload-low-thresh = <0x2c0>; 233 adi,gc-dec-pow-measurement-duration = <0x2000>; 234 adi,gc-low-power-thresh = <0x18>; 235 adi,mgc-inc-gain-step = <0x2>; 236 adi,mgc-dec-gain-step = <0x2>; 237 adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>; 238 adi,agc-attack-delay-extra-margin-us = <0x1>; 239 adi,agc-outer-thresh-high = <0x5>; 240 adi,agc-outer-thresh-high-dec-steps = <0x2>; 241 adi,agc-inner-thresh-high = <0xa>; 242 adi,agc-inner-thresh-high-dec-steps = <0x1>; 243 adi,agc-inner-thresh-low = <0xc>; 244 adi,agc-inner-thresh-low-inc-steps = <0x1>; 245 adi,agc-outer-thresh-low = <0x12>; 246 adi,agc-outer-thresh-low-inc-steps = <0x2>; 247 adi,agc-adc-small-overload-exceed-counter = <0xa>; 248 adi,agc-adc-large-overload-exceed-counter = <0xa>; 249 adi,agc-adc-large-overload-inc-steps = <0x2>; 250 adi,agc-lmt-overload-large-exceed-counter = <0xa>; 251 adi,agc-lmt-overload-small-exceed-counter = <0xa>; 252 adi,agc-lmt-overload-large-inc-steps = <0x2>; 253 adi,agc-gain-update-interval-us = <0x3e8>; 254 adi,fagc-dec-pow-measurement-duration = <0x40>; 255 adi,fagc-lp-thresh-increment-steps = <0x1>; 256 adi,fagc-lp-thresh-increment-time = <0x5>; 257 adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>; 258 adi,fagc-final-overrange-count = <0x3>; 259 adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>; 260 adi,fagc-lmt-final-settling-steps = <0x1>; 261 adi,fagc-lock-level = <0xa>; 262 adi,fagc-lock-level-gain-increase-upper-limit = <0x5>; 263 adi,fagc-lock-level-lmt-gain-increase-enable; 264 adi,fagc-lpf-final-settling-steps = <0x1>; 265 adi,fagc-optimized-gain-offset = <0x5>; 266 adi,fagc-power-measurement-duration-in-state5 = <0x40>; 267 adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable; 268 adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>; 269 adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable; 270 adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>; 271 adi,fagc-rst-gla-large-adc-overload-enable; 272 adi,fagc-rst-gla-large-lmt-overload-enable; 273 adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>; 274 adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable; 275 adi,fagc-state-wait-time-ns = <0x104>; 276 adi,fagc-use-last-lock-level-for-set-gain-enable; 277 adi,rssi-restart-mode = <0x3>; 278 adi,rssi-delay = <0x1>; 279 adi,rssi-wait = <0x1>; 280 adi,rssi-duration = <0x3e8>; 281 adi,ctrl-outs-index = <0x0>; 282 adi,ctrl-outs-enable-mask = <0xff>; 283 adi,temp-sense-measurement-interval-ms = <0x3e8>; 284 adi,temp-sense-offset-signed = <0xce>; 285 adi,temp-sense-periodic-measurement-enable; 286 adi,aux-dac-manual-mode-enable; 287 adi,aux-dac1-default-value-mV = <0x0>; 288 adi,aux-dac1-rx-delay-us = <0x0>; 289 adi,aux-dac1-tx-delay-us = <0x0>; 290 adi,aux-dac2-default-value-mV = <0x0>; 291 adi,aux-dac2-rx-delay-us = <0x0>; 292 adi,aux-dac2-tx-delay-us = <0x0>; 293 en_agc-gpios = <0x6 0x62 0x0>; 294 sync-gpios = <0x6 0x63 0x0>; 295 reset-gpios = <0x6 0x64 0x0>; 296 enable-gpios = <0x6 0x65 0x0>; 297 txnrx-gpios = <0x6 0x66 0x0>; 298 linux,phandle = <0x11>; 299 phandle = <0x11>; 300 }; 301 }; 302 303 spi@e0007000 { 304 compatible = "xlnx,zynq-spi-r1p6"; 305 reg = <0xe0007000 0x1000>; 306 status = "okay"; 307 interrupt-parent = <0x1>; 308 interrupts = <0x0 0x31 0x4>; 309 clocks = <0x2 0x1a 0x2 0x23>; 310 clock-names = "ref_clk", "pclk"; 311 #address-cells = <0x1>; 312 #size-cells = <0x0>; 313 314 adf4351-udc-tx-pmod@0 { 315 #address-cells = <0x1>; 316 #size-cells = <0x0>; 317 compatible = "adi,adf4351"; 318 reg = <0x0>; 319 spi-max-frequency = <0x989680>; 320 clocks = <0x7>; 321 clock-names = "clkin"; 322 adi,channel-spacing = <0xf4240>; 323 adi,power-up-frequency = <0x160dc080>; 324 adi,phase-detector-polarity-positive-enable; 325 adi,charge-pump-current = <0x9c4>; 326 adi,output-power = <0x3>; 327 adi,mute-till-lock-enable; 328 adi,muxout-select = <0x6>; 329 gpios = <0x6 0x68 0x0>; 330 }; 331 332 adf4351-udc-rx-pmod@1 { 333 #address-cells = <0x1>; 334 #size-cells = <0x0>; 335 compatible = "adi,adf4351"; 336 reg = <0x1>; 337 spi-max-frequency = <0x989680>; 338 clocks = <0x7>; 339 clock-names = "clkin"; 340 adi,channel-spacing = <0xf4240>; 341 adi,power-up-frequency = <0x1443fd00>; 342 adi,phase-detector-polarity-positive-enable; 343 adi,charge-pump-current = <0x9c4>; 344 adi,output-power = <0x3>; 345 adi,mute-till-lock-enable; 346 adi,muxout-select = <0x6>; 347 gpios = <0x6 0x67 0x0>; 348 }; 349 }; 350 351 spi@e000d000 { 352 clock-names = "ref_clk", "pclk"; 353 clocks = <0x2 0xa 0x2 0x2b>; 354 compatible = "xlnx,zynq-qspi-1.0"; 355 status = "okay"; 356 interrupt-parent = <0x1>; 357 interrupts = <0x0 0x13 0x4>; 358 reg = <0xe000d000 0x1000>; 359 #address-cells = <0x1>; 360 #size-cells = <0x0>; 361 is-dual = <0x1>; 362 num-cs = <0x1>; 363 364 ps7-qspi@0 { 365 #address-cells = <0x1>; 366 #size-cells = <0x1>; 367 spi-tx-bus-width = <0x1>; 368 spi-rx-bus-width = <0x4>; 369 compatible = "n25q128a11"; 370 reg = <0x0>; 371 spi-max-frequency = <0x2faf080>; 372 373 partition@0 { 374 label = "boot"; 375 reg = <0x0 0x500000>; 376 }; 377 378 partition@500000 { 379 label = "bootenv"; 380 reg = <0x500000 0x20000>; 381 }; 382 383 partition@520000 { 384 label = "config"; 385 reg = <0x520000 0x20000>; 386 }; 387 388 partition@540000 { 389 label = "image"; 390 reg = <0x540000 0xa80000>; 391 }; 392 393 partition@fc0000 { 394 label = "spare"; 395 reg = <0xfc0000 0x0>; 396 }; 397 }; 398 }; 399 400 memory-controller@e000e000 { 401 #address-cells = <0x1>; 402 #size-cells = <0x1>; 403 status = "disabled"; 404 clock-names = "memclk", "aclk"; 405 clocks = <0x2 0xb 0x2 0x2c>; 406 compatible = "arm,pl353-smc-r2p1"; 407 interrupt-parent = <0x1>; 408 interrupts = <0x0 0x12 0x4>; 409 ranges; 410 reg = <0xe000e000 0x1000>; 411 412 flash@e1000000 { 413 status = "disabled"; 414 compatible = "arm,pl353-nand-r2p1"; 415 reg = <0xe1000000 0x1000000>; 416 #address-cells = <0x1>; 417 #size-cells = <0x1>; 418 }; 419 420 flash@e2000000 { 421 status = "disabled"; 422 compatible = "cfi-flash"; 423 reg = <0xe2000000 0x2000000>; 424 #address-cells = <0x1>; 425 #size-cells = <0x1>; 426 }; 427 }; 428 429 ethernet@e000b000 { 430 compatible = "cdns,zynq-gem", "cdns,gem"; 431 reg = <0xe000b000 0x1000>; 432 status = "okay"; 433 interrupts = <0x0 0x16 0x4>; 434 clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>; 435 clock-names = "pclk", "hclk", "tx_clk"; 436 #address-cells = <0x1>; 437 #size-cells = <0x0>; 438 phy-handle = <0x8>; 439 phy-mode = "rgmii-id"; 440 441 phy@7 { 442 device_type = "ethernet-phy"; 443 reg = <0x7>; 444 linux,phandle = <0x8>; 445 phandle = <0x8>; 446 }; 447 }; 448 449 ethernet@e000c000 { 450 compatible = "cdns,zynq-gem", "cdns,gem"; 451 reg = <0xe000c000 0x1000>; 452 status = "disabled"; 453 interrupts = <0x0 0x2d 0x4>; 454 clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>; 455 clock-names = "pclk", "hclk", "tx_clk"; 456 #address-cells = <0x1>; 457 #size-cells = <0x0>; 458 }; 459 460 sdhci@e0100000 { 461 compatible = "arasan,sdhci-8.9a"; 462 status = "okay"; 463 clock-names = "clk_xin", "clk_ahb"; 464 clocks = <0x2 0x15 0x2 0x20>; 465 interrupt-parent = <0x1>; 466 interrupts = <0x0 0x18 0x4>; 467 reg = <0xe0100000 0x1000>; 468 broken-adma2; 469 }; 470 471 sdhci@e0101000 { 472 compatible = "arasan,sdhci-8.9a"; 473 status = "disabled"; 474 clock-names = "clk_xin", "clk_ahb"; 475 clocks = <0x2 0x16 0x2 0x21>; 476 interrupt-parent = <0x1>; 477 interrupts = <0x0 0x2f 0x4>; 478 reg = <0xe0101000 0x1000>; 479 broken-adma2; 480 }; 481 482 slcr@f8000000 { 483 #address-cells = <0x1>; 484 #size-cells = <0x1>; 485 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; 486 reg = <0xf8000000 0x1000>; 487 ranges; 488 linux,phandle = <0x9>; 489 phandle = <0x9>; 490 491 clkc@100 { 492 #clock-cells = <0x1>; 493 compatible = "xlnx,ps7-clkc"; 494 fclk-enable = <0xf>; 495 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb"; 496 reg = <0x100 0x100>; 497 ps-clk-frequency = <0x1fca055>; 498 linux,phandle = <0x2>; 499 phandle = <0x2>; 500 }; 501 502 rstc@200 { 503 compatible = "xlnx,zynq-reset"; 504 reg = <0x200 0x48>; 505 #reset-cells = <0x1>; 506 syscon = <0x9>; 507 }; 508 509 pinctrl@700 { 510 compatible = "xlnx,pinctrl-zynq"; 511 reg = <0x700 0x200>; 512 syscon = <0x9>; 513 }; 514 }; 515 516 dmac@f8003000 { 517 compatible = "arm,pl330", "arm,primecell"; 518 reg = <0xf8003000 0x1000>; 519 interrupt-parent = <0x1>; 520 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7"; 521 interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>; 522 #dma-cells = <0x1>; 523 #dma-channels = <0x8>; 524 #dma-requests = <0x4>; 525 clocks = <0x2 0x1b>; 526 clock-names = "apb_pclk"; 527 linux,phandle = <0xe>; 528 phandle = <0xe>; 529 }; 530 531 devcfg@f8007000 { 532 compatible = "xlnx,zynq-devcfg-1.0"; 533 interrupt-parent = <0x1>; 534 interrupts = <0x0 0x8 0x4>; 535 reg = <0xf8007000 0x100>; 536 clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>; 537 clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; 538 syscon = <0x9>; 539 linux,phandle = <0x4>; 540 phandle = <0x4>; 541 }; 542 543 efuse@f800d000 { 544 compatible = "xlnx,zynq-efuse"; 545 reg = <0xf800d000 0x20>; 546 }; 547 548 timer@f8f00200 { 549 compatible = "arm,cortex-a9-global-timer"; 550 reg = <0xf8f00200 0x20>; 551 interrupts = <0x1 0xb 0x301>; 552 interrupt-parent = <0x1>; 553 clocks = <0x2 0x4>; 554 }; 555 556 timer@f8001000 { 557 interrupt-parent = <0x1>; 558 interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>; 559 compatible = "cdns,ttc"; 560 clocks = <0x2 0x6>; 561 reg = <0xf8001000 0x1000>; 562 }; 563 564 timer@f8002000 { 565 interrupt-parent = <0x1>; 566 interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>; 567 compatible = "cdns,ttc"; 568 clocks = <0x2 0x6>; 569 reg = <0xf8002000 0x1000>; 570 }; 571 572 timer@f8f00600 { 573 interrupt-parent = <0x1>; 574 interrupts = <0x1 0xd 0x301>; 575 compatible = "arm,cortex-a9-twd-timer"; 576 reg = <0xf8f00600 0x20>; 577 clocks = <0x2 0x4>; 578 }; 579 580 usb@e0002000 { 581 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 582 status = "okay"; 583 clocks = <0x2 0x1c>; 584 interrupt-parent = <0x1>; 585 interrupts = <0x0 0x15 0x4>; 586 reg = <0xe0002000 0x1000>; 587 phy_type = "ulpi"; 588 dr_mode = "host"; 589 xlnx,phy-reset-gpio = <0x6 0x7 0x0>; 590 }; 591 592 usb@e0003000 { 593 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 594 status = "disabled"; 595 clocks = <0x2 0x1d>; 596 interrupt-parent = <0x1>; 597 interrupts = <0x0 0x2c 0x4>; 598 reg = <0xe0003000 0x1000>; 599 phy_type = "ulpi"; 600 }; 601 602 watchdog@f8005000 { 603 clocks = <0x2 0x2d>; 604 compatible = "cdns,wdt-r1p2"; 605 interrupt-parent = <0x1>; 606 interrupts = <0x0 0x9 0x1>; 607 reg = <0xf8005000 0x1000>; 608 timeout-sec = <0xa>; 609 }; 610 }; 611 612 aliases { 613 ethernet0 = "/amba/ethernet@e000b000"; 614 serial0 = "/amba/serial@e0001000"; 615 }; 616 617 memory { 618 device_type = "memory"; 619 reg = <0x0 0x40000000>; 620 }; 621 622 chosen { 623 bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait"; 624 linux,stdout-path = "/amba@0/uart@E0001000"; 625 }; 626 627 leds { 628 compatible = "gpio-leds"; 629 630 ds8 { 631 label = "ds12:green"; 632 gpios = <0x6 0x3d 0x0>; 633 //gpios = <0x6 7 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3d 634 default-state = "off"; 635 }; 636 637 ds9 { 638 label = "ds15:green"; 639 gpios = <0x6 0x3e 0x0>; 640 //gpios = <0x6 8 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3e 641 default-state = "off"; 642 }; 643 644 ds10 { 645 label = "ds16:green"; 646 gpios = <0x6 0x3f 0x0>; 647 //gpios = <0x6 9 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3f 648 default-state = "off"; 649 }; 650 651 ds35 { 652 label = "ds17:green"; 653 gpios = <0x6 0x40 0x0>; 654 //gpios = <0x6 10 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x40 655 default-state = "on"; 656 }; 657 }; 658 659 gpio_keys { 660 compatible = "gpio-keys"; 661 #address-cells = <0x1>; 662 #size-cells = <0x0>; 663 autorepeat; 664 665 sw7 { 666 label = "Left"; 667 linux,code = <0x69>; 668 gpios = <0x6 0x3a 0x0>; 669 }; 670 671 sw8 { 672 label = "Right"; 673 linux,code = <0x6a>; 674 gpios = <0x6 0x3c 0x0>; 675 }; 676 677 sw9 { 678 label = "Select"; 679 linux,code = <0x1c>; 680 gpios = <0x6 0x3b 0x0>; 681 }; 682 }; 683 684 fpga-axi@0 { 685 compatible = "simple-bus"; 686 #address-cells = <0x1>; 687 #size-cells = <0x1>; 688 ranges; 689 690 i2c@41600000 { 691 compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a"; 692 reg = <0x41600000 0x10000>; 693 interrupt-parent = <0x1>; 694 interrupts = <0x0 0x3a 0x4>; 695 clocks = <0x2 0xf>; 696 clock-names = "pclk"; 697 #address-cells = <0x1>; 698 #size-cells = <0x0>; 699 700 i2cswitch@74 { 701 compatible = "nxp,pca9548"; 702 #address-cells = <0x1>; 703 #size-cells = <0x0>; 704 reg = <0x74>; 705 706 i2c@0 { 707 #address-cells = <0x1>; 708 #size-cells = <0x0>; 709 reg = <0x0>; 710 711 osc@5d { 712 compatible = "si570"; 713 temperature-stability = <0x32>; 714 reg = <0x5d>; 715 factory-fout = <0x9502f90>; 716 initial-fout = <0x8d9ee20>; 717 }; 718 }; 719 720 i2c@1 { 721 #address-cells = <0x1>; 722 #size-cells = <0x0>; 723 reg = <0x1>; 724 725 adv7511 { 726 compatible = "adi,adv7511"; 727 reg = <0x39 0x3f>; 728 reg-names = "primary", "edid"; 729 adi,input-depth = <0x8>; 730 adi,input-colorspace = "rgb"; 731 adi,input-clock = "1x"; 732 adi,clock-delay = <0x0>; 733 #sound-dai-cells = <0x0>; 734 linux,phandle = <0x14>; 735 phandle = <0x14>; 736 737 ports { 738 #address-cells = <0x1>; 739 #size-cells = <0x0>; 740 741 port@0 { 742 reg = <0x0>; 743 744 endpoint { 745 remote-endpoint = <0xa>; 746 linux,phandle = <0xd>; 747 phandle = <0xd>; 748 }; 749 }; 750 751 port@1 { 752 reg = <0x1>; 753 }; 754 }; 755 }; 756 }; 757 758 i2c@2 { 759 #address-cells = <0x1>; 760 #size-cells = <0x0>; 761 reg = <0x2>; 762 763 eeprom@54 { 764 compatible = "at,24c08"; 765 reg = <0x54>; 766 }; 767 }; 768 769 i2c@3 { 770 #address-cells = <0x1>; 771 #size-cells = <0x0>; 772 reg = <0x3>; 773 774 gpio@21 { 775 compatible = "ti,tca6416"; 776 reg = <0x21>; 777 gpio-controller; 778 #gpio-cells = <0x2>; 779 }; 780 }; 781 782 i2c@4 { 783 #address-cells = <0x1>; 784 #size-cells = <0x0>; 785 reg = <0x4>; 786 787 rtc@54 { 788 compatible = "nxp,pcf8563"; 789 reg = <0x51>; 790 }; 791 }; 792 793 i2c@6 { 794 #size-cells = <0x0>; 795 #address-cells = <0x1>; 796 reg = <0x6>; 797 798 ad7291@2f { 799 compatible = "adi,ad7291"; 800 reg = <0x2f>; 801 }; 802 803 eeprom@50 { 804 compatible = "at24,24c02"; 805 reg = <0x50>; 806 }; 807 }; 808 }; 809 }; 810 811 axivdma@43000000 { 812 #address-cells = <0x1>; 813 #size-cells = <0x1>; 814 #dma-cells = <0x1>; 815 clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_mm2s_aclk"; 816 clocks = <2 15>, <2 15>, <2 15>; 817 compatible = "xlnx,axi-vdma-1.00.a"; 818 interrupt-names = "mm2s_introut"; 819 interrupt-parent = <1>; 820 interrupts = <0 59 4>; 821 reg = <0x43000000 0x1000>; 822 xlnx,addrwidth = <0x20>; 823 xlnx,flush-fsync = <0x1>; 824 xlnx,num-fstores = <0x3>; 825 linux,phandle = <0xb>; 826 phandle = <0xb>; 827 828 dma-channel@43000000 { 829 compatible = "xlnx,axi-vdma-mm2s-channel"; 830 interrupts = <0 59 4>; 831 xlnx,datawidth = <0x40>; 832 xlnx,device-id = <0x0>; 833 xlnx,genlock-mode ; 834 xlnx,include-dre = <0x0>; 835 }; 836 }; 837 838 axi-clkgen@79000000 { 839 compatible = "adi,axi-clkgen-2.00.a"; 840 reg = <0x79000000 0x10000>; 841 #clock-cells = <0x0>; 842 clocks = <0x2 0x10>; 843 linux,phandle = <0xc>; 844 phandle = <0xc>; 845 }; 846 847 axi_hdmi@70e00000 { 848 compatible = "adi,axi-hdmi-tx-1.00.a"; 849 reg = <0x70e00000 0x10000>; 850 dmas = <0xb 0x0>; 851 dma-names = "video"; 852 clocks = <0xc>; 853 adi,is-rgb; 854 855 port { 856 857 endpoint { 858 remote-endpoint = <0xd>; 859 linux,phandle = <0xa>; 860 phandle = <0xa>; 861 }; 862 }; 863 }; 864 865 axi-spdif-tx@75c00000 { 866 compatible = "adi,axi-spdif-tx-1.00.a"; 867 reg = <0x75c00000 0x1000>; 868 dmas = <0xe 0x0>; 869 dma-names = "tx"; 870 clocks = <0x2 0xf 0xf>; 871 clock-names = "axi", "ref"; 872 #sound-dai-cells = <0x0>; 873 linux,phandle = <0x13>; 874 phandle = <0x13>; 875 }; 876 877 dma@7c400000 { 878 compatible = "adi,axi-dmac-1.00.a"; 879 reg = <0x7c400000 0x10000>; 880 #dma-cells = <0x1>; 881 interrupts = <0 57 4>; 882 clocks = <0x2 0xf 0xf>; 883 linux,phandle = <0x10>; 884 phandle = <0x10>; 885 886 adi,channels { 887 #size-cells = <0x0>; 888 #address-cells = <0x1>; 889 890 dma-channel@0 { 891 reg = <0x0>; 892 adi,source-bus-width = <0x40>; 893 adi,source-bus-type = <0x2>; 894 adi,destination-bus-width = <0x40>; 895 adi,destination-bus-type = <0x0>; 896 adi,length-width = <0x18>; 897 }; 898 }; 899 }; 900 901 dma@7c420000 { 902 compatible = "adi,axi-dmac-1.00.a"; 903 reg = <0x7c420000 0x10000>; 904 #dma-cells = <0x1>; 905 interrupts = <0 56 4>; 906 clocks = <0x2 0xf 0xf>; 907 linux,phandle = <0x12>; 908 phandle = <0x12>; 909 910 adi,channels { 911 #size-cells = <0x0>; 912 #address-cells = <0x1>; 913 914 dma-channel@0 { 915 reg = <0x0>; 916 adi,source-bus-width = <0x40>; 917 adi,source-bus-type = <0x0>; 918 adi,destination-bus-width = <0x40>; 919 adi,destination-bus-type = <0x2>; 920 adi,length-width = <0x18>; 921 adi,cyclic; 922 }; 923 }; 924 }; 925 926 sdr: sdr { 927 compatible ="sdr,sdr"; 928 dmas = <&rx_dma 0 929 &rx_dma 1 930 &tx_dma 0 931 &tx_dma 1>; 932 dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm"; 933 interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1"; 934 interrupt-parent = <1>; 935 interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>; 936 } ; 937 938 axidmatest_1: axidmatest@1 { 939 compatible ="xlnx,axi-dma-test-1.00.a"; 940 dmas = <&rx_dma 0 941 &rx_dma 1>; 942 dma-names = "axidma0", "axidma1"; 943 } ; 944 945 tx_dma: dma@80400000 { 946 #dma-cells = <1>; 947 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 948 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 949 compatible = "xlnx,axi-dma-1.00.a"; 950 interrupt-names = "mm2s_introut", "s2mm_introut"; 951 interrupt-parent = <1>; 952 interrupts = <0 35 4 0 36 4>; 953 reg = <0x80400000 0x10000>; 954 xlnx,addrwidth = <0x20>; 955 xlnx,include-sg ; 956 xlnx,sg-length-width = <0xe>; 957 dma-channel@80400000 { 958 compatible = "xlnx,axi-dma-mm2s-channel"; 959 dma-channels = <0x1>; 960 interrupts = <0 35 4>; 961 xlnx,datawidth = <0x40>; 962 xlnx,device-id = <0x0>; 963 }; 964 dma-channel@80400030 { 965 compatible = "xlnx,axi-dma-s2mm-channel"; 966 dma-channels = <0x1>; 967 interrupts = <0 36 4>; 968 xlnx,datawidth = <0x40>; 969 xlnx,device-id = <0x0>; 970 }; 971 }; 972 973 rx_dma: dma@80410000 { 974 #dma-cells = <1>; 975 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 976 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 977 compatible = "xlnx,axi-dma-1.00.a"; 978 //dma-coherent ; 979 interrupt-names = "mm2s_introut", "s2mm_introut"; 980 interrupt-parent = <1>; 981 interrupts = <0 31 4 0 32 4>; 982 reg = <0x80410000 0x10000>; 983 xlnx,addrwidth = <0x20>; 984 xlnx,include-sg ; 985 xlnx,sg-length-width = <0xe>; 986 dma-channel@80410000 { 987 compatible = "xlnx,axi-dma-mm2s-channel"; 988 dma-channels = <0x1>; 989 interrupts = <0 31 4>; 990 xlnx,datawidth = <0x40>; 991 xlnx,device-id = <0x1>; 992 }; 993 dma-channel@80410030 { 994 compatible = "xlnx,axi-dma-s2mm-channel"; 995 dma-channels = <0x1>; 996 interrupts = <0 32 4>; 997 xlnx,datawidth = <0x40>; 998 xlnx,device-id = <0x1>; 999 }; 1000 }; 1001 1002 tx_intf_0: tx_intf@83c00000 { 1003 clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk"; 1004 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 1005 compatible = "sdr,tx_intf"; 1006 interrupt-names = "tx_itrpt0", "tx_itrpt1"; 1007 interrupt-parent = <1>; 1008 interrupts = <0 33 1 0 34 1>; 1009 reg = <0x83c00000 0x10000>; 1010 xlnx,s00-axi-addr-width = <0x7>; 1011 xlnx,s00-axi-data-width = <0x20>; 1012 }; 1013 1014 rx_intf_0: rx_intf@83c20000 { 1015 clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk"; 1016 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 1017 compatible = "sdr,rx_intf"; 1018 interrupt-names = "not_valid_anymore", "rx_pkt_intr"; 1019 interrupt-parent = <1>; 1020 interrupts = <0 29 1 0 30 1>; 1021 reg = <0x83c20000 0x10000>; 1022 xlnx,s00-axi-addr-width = <0x7>; 1023 xlnx,s00-axi-data-width = <0x20>; 1024 }; 1025 1026 openofdm_tx_0: openofdm_tx@83c10000 { 1027 clock-names = "clk"; 1028 clocks = <0x2 0x11>; 1029 compatible = "sdr,openofdm_tx"; 1030 reg = <0x83c10000 0x10000>; 1031 }; 1032 1033 openofdm_rx_0: openofdm_rx@83c30000 { 1034 clock-names = "clk"; 1035 clocks = <0x2 0x11>; 1036 compatible = "sdr,openofdm_rx"; 1037 reg = <0x83c30000 0x10000>; 1038 }; 1039 1040 xpu_0: xpu@83c40000 { 1041 clock-names = "s00_axi_aclk"; 1042 clocks = <0x2 0x11>; 1043 compatible = "sdr,xpu"; 1044 reg = <0x83c40000 0x10000>; 1045 }; 1046 1047 cf-ad9361-lpc@79020000 { 1048 compatible = "adi,axi-ad9361-6.00.a"; 1049 reg = <0x79020000 0x6000>; 1050 dmas = <0x10 0x0>; 1051 dma-names = "rx"; 1052 spibus-connected = <0x11>; 1053 }; 1054 1055 cf-ad9361-dds-core-lpc@79024000 { 1056 compatible = "adi,axi-ad9361-dds-6.00.a"; 1057 reg = <0x79024000 0x1000>; 1058 clocks = <0x11 0xd>; 1059 clock-names = "sampl_clk"; 1060 dmas = <0x12 0x0>; 1061 dma-names = "tx"; 1062 adi,axi-dds-rate = <0x1>; 1063 adi,axi-dds-1-rf-channel; 1064 }; 1065 1066 mwipcore@43c00000 { 1067 compatible = "mathworks,mwipcore-axi4lite-v1.00"; 1068 reg = <0x43c00000 0xffff>; 1069 }; 1070 }; 1071 1072 audio_clock { 1073 compatible = "fixed-clock"; 1074 #clock-cells = <0x0>; 1075 clock-frequency = <0xbb8000>; 1076 linux,phandle = <0xf>; 1077 phandle = <0xf>; 1078 }; 1079 1080 adv7511_hdmi_snd { 1081 compatible = "simple-audio-card"; 1082 simple-audio-card,name = "HDMI monitor"; 1083 simple-audio-card,widgets = "Speaker", "Speaker"; 1084 simple-audio-card,routing = "Speaker", "TX"; 1085 1086 simple-audio-card,dai-link@0 { 1087 format = "spdif"; 1088 1089 cpu { 1090 sound-dai = <0x13>; 1091 frame-master; 1092 bitclock-master; 1093 }; 1094 1095 codec { 1096 sound-dai = <0x14>; 1097 }; 1098 }; 1099 }; 1100 1101 clocks { 1102 1103 clock@0 { 1104 #clock-cells = <0x0>; 1105 compatible = "fixed-clock"; 1106 clock-frequency = <0x2625a00>; 1107 clock-output-names = "ad9361_ext_refclk"; 1108 linux,phandle = <0x5>; 1109 phandle = <0x5>; 1110 }; 1111 1112 clock@1 { 1113 #clock-cells = <0x0>; 1114 compatible = "fixed-clock"; 1115 clock-frequency = <0x17d7840>; 1116 clock-output-names = "refclk"; 1117 linux,phandle = <0x7>; 1118 phandle = <0x7>; 1119 }; 1120 }; 1121}; 1122